DETAILED ACTION
This action is responsive to claims filed 11/17/2023.
Claims 1–20 are pending for examination.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 11/17/2023 and 05/22/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered and attached by the examiner.
Drawings
The drawings are objected to because “[e]ach group of waveforms must be presented as a single figure, using a common vertical axis with time extending along the horizontal axis.” See MPEP 608.02.V(d). Specifically, figures 5 and 6 includes waveforms not presented in a single figure using a common vertical axis. Figures 3 and 4 are scans of word docs.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitations uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are:
“approximation component” in claim 1.
“initialization component” in claim 1.
“a measurement component” in claim 1.
“optimization component” in claim 1.
“iteration component” in claim 5.
Because these claim limitations are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 2–3, 9–10, and 15–16 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Regarding claims 2, 9, and 15, these claims recite “wherein the parameters comprise a parameterized quantum circuit.” However, it is unclear as to how parameters i.e., data can include a quantum circuit i.e., physical components. In the interest of compact prosecution, examiner is construing the limitation as “wherein the parameters comprise [[a]] parameterized quantum circuit values.”
Regarding claim 3, 10, and 16, these claims each respectively depend from a claim that had been rejected under § 112(b). Each claim necessarily includes all of the limitations of the claim from which they depend, respectively. Thus, claims 3, 10, and 16 are also rejected.
Appropriate correction is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title
Claims 1–20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Regarding Claim 1:
Step 1 — Is the claim to a process, machine, manufacture, or composition of matter?
Yes, claim 1 is directed to a system i.e., a machine.
Step 2A — Prong 1 Does the claim recite an abstract idea, law of nature, or natural phenomenon?
Yes, the claim recites an abstract idea.
“that approximates a minimum value of a function based on a monotonic transformation”
“determines a monotonic transformation of the function”
“estimates amplitudes of the function based on the measured bitstrings”
These limitations, under their broadest reasonable interpretation, cover mental processes, concepts performed in the human mind (including an observation, evaluation, judgment, opinion). See MPEP 2106.04(a)(2). In particular, with the aid of pen and paper, a human can approximate values of a function based on transformations, determine a monotonic function, and estimate amplitudes based on bitstrings.
Step 2A — Prong 2 — Does the claim recite additional elements that integrate the judicial exception into a practical application?
No, there are no additional elements that integrate the judicial exception into a practical application. The additional elements:
“a memory that stores computer executable components” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“a processor that executes computer executable components stored in the memory” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“wherein the computer executable components comprise: an approximation component” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“an initialization component” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“that initializes parameters in a quantum computer for the function” — This limitation is insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1).
“a measurement component” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“that measures bitstrings of a quantum state of the function” — This limitation is insignificant extra-solution activity and is merely data gathering. See MPEP 2106.05(g).
“an optimization component” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“that updates the parameters based on the estimated amplitude and the monotonic transformation” — This limitation is reciting only the idea of a solution or outcome i.e., the claim fails to recite details of how a solution to a problem is accomplished such that it amounts no more than mere instructions to apply. See MPEP 2106.05(f); See also Electric Power Group, LLC v. Alstom, S.A., 830 F.3d 1350, 1356, 119 USPQ2d 1739 (Fed. Cir. 2016).
Step 2B — Does the claim recite additional elements that amount to significantly more than the judicial exception?
No, there are no additional elements that amount to significantly more than the judicial exception.
“that initializes parameters in a quantum computer for the function” — This limitation is directed to the activity of insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1); See Bilski v. Kappos, 561 U.S. 593, 611-12, 95 USPQ2d 1001, 1010 (2010). This limitation is well-understood, routine, and conventional because it involves retrieving information from a stored list to initialize parameters. See MPEP 2106.05(d)(II); See Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015).
“that measures bitstrings of a quantum state of the function” — This limitation is directed to the activity of acquiring data which is not an inventive concept because it is insignificant extra-solution activity of mere data gathering. See OIP Techs., Inc. v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1092-93 (Fed. Cir. 2015); MPEP 2106.05(g)(3). This limitation is well-understood, routine, and conventional because it involves receiving information over a network. MPEP 2106.05(d)(II).
Regarding claim 2:
The claim is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim is dependent on claim 1 which included an abstract idea (see rejection for claim 1 above). This claim merely recites a further limitation on the parameters limitation which is directed to an abstract idea that can be performed in the human mind. The additional limitation:
“wherein the parameters comprise a parameterized quantum circuit” — This limitation is insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1).
Thus, the judicial exception is not integrated into a practical application (see MPEP 2106.04(d)I.), failing Step 2A Prong 2.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception under step 2B.
“wherein the parameters comprise a parameterized quantum circuit” — This limitation is directed to the activity of insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1); See Bilski v. Kappos, 561 U.S. 593, 611-12, 95 USPQ2d 1001, 1010 (2010). This limitation is well-understood, routine, and conventional because it involves retrieving information from a stored list to initialize parameters. See MPEP 2106.05(d)(II); See Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015). Initializing parameters of a quantum circuit, without more, is merely pre-solution activity of establishing inputs which is well-understood, routine, and conventional.
Thus, the claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception (see MPEP 2106.05(I.), failing step 2B.
Regarding claim 3:
The claim is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim is dependent on claim 2 which included an abstract idea (see rejection for claim 2 above). This claim merely recites a further limitation on the parameters limitation which is directed to an abstract idea that can be performed in the human mind. The additional limitation:
“wherein the parameterized quantum circuit comprises fixed unitary gates and rotational gates” — This limitation is insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1).
Thus, the judicial exception is not integrated into a practical application (see MPEP 2106.04(d)I.), failing Step 2A Prong 2.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception under step 2B.
“wherein the parameterized quantum circuit comprises fixed unitary gates and rotational gates” — This limitation is directed to the activity of insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1); See Bilski v. Kappos, 561 U.S. 593, 611-12, 95 USPQ2d 1001, 1010 (2010). This limitation is well-understood, routine, and conventional because it involves retrieving information from a stored list to initialize parameters. See MPEP 2106.05(d)(II); See Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015). Initializing parameters of a quantum circuit, without more, is merely pre-solution activity of establishing inputs which is well-understood, routine, and conventional.
Thus, the claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception (see MPEP 2106.05(I.), failing step 2B.
Regarding Claim 4:
The claim is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim is dependent on claim 1 which included an abstract idea (see rejection for claim 1 above). This claim merely recites a further limitation on the estimating the amplitudes limitation which is directed to an abstract idea that can be performed in the human mind. The additional limitations:
“wherein the estimating the amplitudes of the function comprises a Monte Carlo approach” — These limitations are merely a continuation of the abstract idea in claim 1. Under their broadest reasonable interpretation, they cover mental processes, concepts performed in the human mind (including an observation, evaluation, judgment, opinion). See MPEP 2106.04(a)(2). In particular, with aid of pen of paper, a human can estimate outcomes of functions using a Monte Carlo approach.
Thus, the judicial exception is not integrated into a practical application (see MPEP 2106.04(d)I.), failing Step 2A Prong 2. The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception under step 2B.
Regarding claim 5:
The claim is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim is dependent on claim 1 which included an abstract idea (see rejection for claim 1 above). This claim recites a further limitation on the computer executable components limitation which is directed to generic computer components such that it amounts no more than mere instructions to apply the abstract idea using a generic computer component. The additional limitations:
“wherein the computer executable components further comprise: an iteration component” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“that iteratively updates the parameters until a defined criteria is met” — This limitation amounts to no more than mere instructions to apply the exception and is the equivalent to mere instruction to implement the abstract idea on a computer. See MPEP 2106.05(f). Iteratively updating parameters based on criteria merely invokes computers or other machinery as a tool to perform an existing process.
Thus, the judicial exception is not integrated into a practical application (see MPEP 2106.04(d)I.), failing Step 2A Prong 2. The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception under step 2B.
Regarding claim 6:
The claim is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim is dependent on claim 5 which included an abstract idea (see rejection for claim 5 above). This claim recites a further limitation on the computer executable components limitation which is directed to generic computer components such that it amounts no more than mere instructions to apply the abstract idea using a generic computer component. The additional limitations:
“wherein the defined criteria comprise a set number of update iterations” — This limitation amounts to no more than mere instructions to apply the exception and is the equivalent to mere instruction to implement the abstract idea on a computer. See MPEP 2106.05(f). Iteratively updating parameters based on criteria merely invokes computers or other machinery as a tool to perform an existing process.
Thus, the judicial exception is not integrated into a practical application (see MPEP 2106.04(d)I.), failing Step 2A Prong 2. The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception under step 2B.
Regarding claim 7:
The claim is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim is dependent on claim 5 which included an abstract idea (see rejection for claim 5 above). This claim recites a further limitation on the computer executable components limitation which is directed to generic computer components such that it amounts no more than mere instructions to apply the abstract idea using a generic computer component. The additional limitations:
“wherein the defined criteria comprise the estimated amplitude being less than or equal to an intended accuracy value” — This limitation amounts to no more than mere instructions to apply the exception and is the equivalent to mere instruction to implement the abstract idea on a computer. See MPEP 2106.05(f). Iteratively updating parameters based on criteria merely invokes computers or other machinery as a tool to perform an existing process.
Thus, the judicial exception is not integrated into a practical application (see MPEP 2106.04(d)I.), failing Step 2A Prong 2. The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception under step 2B.
Regarding Claim 8:
Step 1 — Is the claim to a process, machine, manufacture, or composition of matter?
Yes, claim 8 is directed to a method i.e., a process.
Step 2A — Prong 1 Does the claim recite an abstract idea, law of nature, or natural phenomenon?
Yes, the claim recites an abstract idea.
“ approximating, … , a minimum value of a function”
“determining, … , a monotonic transformation of the function”
“estimating, … , amplitude of the function based on the measured bitstrings”
These limitations, under their broadest reasonable interpretation, cover mental processes, concepts performed in the human mind (including an observation, evaluation, judgment, opinion). See MPEP 2106.04(a)(2). In particular, with the aid of pen and paper, a human can approximate values of a function based on transformations, determine a monotonic function, and estimate amplitudes based on bitstrings.
Step 2A — Prong 2 — Does the claim recite additional elements that integrate the judicial exception into a practical application?
No, there are no additional elements that integrate the judicial exception into a practical application. The additional elements:
“by a system operatively coupled to a processor” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“by the system” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“initializing, … , parameters in a quantum computer for the function” — This limitation is insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1).
“measuring, … , bitstrings of a quantum state of the function” — This limitation is insignificant extra-solution activity and is merely data gathering. See MPEP 2106.05(g).
“updating, … , the parameters based on the estimated amplitude and the monotonic transformation” — This limitation is reciting only the idea of a solution or outcome i.e., the claim fails to recite details of how a solution to a problem is accomplished such that it amounts no more than mere instructions to apply. See MPEP 2106.05(f); See also Electric Power Group, LLC v. Alstom, S.A., 830 F.3d 1350, 1356, 119 USPQ2d 1739 (Fed. Cir. 2016).
Step 2B — Does the claim recite additional elements that amount to significantly more than the judicial exception?
No, there are no additional elements that amount to significantly more than the judicial exception.
“initializing, … , parameters in a quantum computer for the function” — This limitation is directed to the activity of insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1); See Bilski v. Kappos, 561 U.S. 593, 611-12, 95 USPQ2d 1001, 1010 (2010). This limitation is well-understood, routine, and conventional because it involves retrieving information from a stored list to initialize parameters. See MPEP 2106.05(d)(II); See Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015).
“measuring, … , bitstrings of a quantum state of the function” — This limitation is directed to the activity of acquiring data which is not an inventive concept because it is insignificant extra-solution activity of mere data gathering. See OIP Techs., Inc. v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1092-93 (Fed. Cir. 2015); MPEP 2106.05(g)(3). This limitation is well-understood, routine, and conventional because it involves receiving information over a network. MPEP 2106.05(d)(II).
Regarding claims 9–14, although varying in scope, the limitations of claims 9–14 are substantially the same as the limitations of claims 2–7, respectively. Thus, claims 9–14 are rejected using the same reasoning and analysis as claims 2–7 above, respectively.
Regarding Claim 15:
Step 1 — Is the claim to a process, machine, manufacture, or composition of matter?
Yes, claim 15 is directed to a computer program product i.e., a machine.
Step 2A — Prong 1 Does the claim recite an abstract idea, law of nature, or natural phenomenon?
Yes, the claim recites an abstract idea.
“ approximate, … , a minimum value of a function”
“determine, … , a monotonic transformation of the function”
“estimate, … , amplitude of the function based on the measured bitstrings”
These limitations, under their broadest reasonable interpretation, cover mental processes, concepts performed in the human mind (including an observation, evaluation, judgment, opinion). See MPEP 2106.04(a)(2). In particular, with the aid of pen and paper, a human can approximate values of a function based on transformations, determine a monotonic function, and estimate amplitudes based on bitstrings.
Step 2A — Prong 2 — Does the claim recite additional elements that integrate the judicial exception into a practical application?
No, there are no additional elements that integrate the judicial exception into a practical application. The additional elements:
“a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“by the processor” — This limitation is reciting generic computer components at a high-level of generality (i.e., as a generic computer component performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. See MPEP 2106.05(f).
“initialize, … , parameters in a quantum computer for the function” — This limitation is insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1).
“measure, … , bitstrings of a quantum state of the function” — This limitation is insignificant extra-solution activity and is merely data gathering. See MPEP 2106.05(g).
“update, … , the parameters based on the estimated amplitude and the monotonic transformation” — This limitation is reciting only the idea of a solution or outcome i.e., the claim fails to recite details of how a solution to a problem is accomplished such that it amounts no more than mere instructions to apply. See MPEP 2106.05(f); See also Electric Power Group, LLC v. Alstom, S.A., 830 F.3d 1350, 1356, 119 USPQ2d 1739 (Fed. Cir. 2016).
Step 2B — Does the claim recite additional elements that amount to significantly more than the judicial exception?
No, there are no additional elements that amount to significantly more than the judicial exception.
“initialize, … , parameters in a quantum computer for the function” — This limitation is directed to the activity of insignificant extra-solution activity and is merely pre-solution activity of establishing inputs. See MPEP 2106.05(g)(1); See Bilski v. Kappos, 561 U.S. 593, 611-12, 95 USPQ2d 1001, 1010 (2010). This limitation is well-understood, routine, and conventional because it involves retrieving information from a stored list to initialize parameters. See MPEP 2106.05(d)(II); See Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015).
“measure, … , bitstrings of a quantum state of the function” — This limitation is directed to the activity of acquiring data which is not an inventive concept because it is insignificant extra-solution activity of mere data gathering. See OIP Techs., Inc. v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1092-93 (Fed. Cir. 2015); MPEP 2106.05(g)(3). This limitation is well-understood, routine, and conventional because it involves receiving information over a network. MPEP 2106.05(d)(II).
Regarding claims 16–20, although varying in scope, the limitations of claims 16–20 are substantially the same as the limitations of claims 2–3 and 5–7, respectively. Thus, claims 16–20 are rejected using the same reasoning and analysis as claims 2–3 and 5–7 above, respectively.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1–3, 5–10, and 12–20 are rejected under 35 U.S.C. 103 as being unpatentable over Amin et al., (US-20150363708-A1), hereinafter “Amin”, in view of Sarpeshkar et al., (US-20180150760-A1), hereinafter “Sarpeshkar”.
Regarding claim 1, Amin teaches:
a system comprising (Amin Fig. 1, ¶0030: “A system for use in quantum processing may be summarized as including”):
a memory that stores computer executable components (Amin Fig. 1, ¶0030: “at least one non-transitory processor-readable medium that stores at least one of processor executable instructions or data”—[wherein the BRI of the computer executable components is any software and/or instructions facilitate the specific task of the component]);
a processor that executes computer executable components stored in the memory (Amin Fig. 1, ¶0030: “and at least one processor communicatively coupled to the least one non-transitory processor-readable medium, and which, in response to execution of the at least one of processor executable instructions or data”),
wherein the computer executable components comprise: an approximation component that approximates a minimum value of a function based on a monotonic transformation (Amin Fig. 1, ¶0005–0009: “Quantum annealing is a computation method that may be used to find a low-energy state, typically preferably the ground state, of a system … ideally its global energy minimum … Two graphs are isomorphic if there is a correspondence between the vertices of a first graph and the vertices of a second graph where the first graph can be transformed to the second graph by relabeling the vertices”—[wherein the BRI of the approximation component is any software and/or instructions facilitate the specific task of the component]) and
an initialization component that initializes parameters in a quantum computer for the function (Amin Figs. 1, 3, 6, 9, 13, ¶0012, 0096, 0101: “A non-transitory computer-readable storage medium containing processor-executable instructions, which when executed cause at least one processor to: for a first computational problem, during a first iteration on the first computational problem: initialize an analog processor to a first initial state” and “he process of changing the Hamiltonian in adiabatic quantum computing and/or quantum annealing may be referred to as evolution. The process of evolution is effected by adjusting one or more parameters in the quantum processor”—[wherein the BRI of the initialization component is any software and/or instructions facilitate the specific task of the component]);
a measurement component that measures bitstrings of a quantum state of the function (Amin Fig. 12, ¶0162–0164: “At 1210, the hybrid computer measures the state of the quantum processor. In some implementations, this may involve reading out the state of all or a portion of the qubits in the hardware graph or working graph by, for example, a readout subsystem. In some examples, the readout subsystem uses one or more DC-SQUIDs to measure the persistent current state of each qubit.”—[wherein the BRI of the initialization component is any software and/or instructions facilitate the specific task of the component]).
Amin does not appear to explicitly teach:
determines a monotonic transformation of the function;
estimates amplitudes of the function based on the measured bitstrings; and
an optimization component that updates the parameters based on the estimated amplitude and the monotonic transformation.
However, Sarpeshkar teaches:
determines a monotonic transformation of the function (Sarpeshkar Figs. 1, 20A, 45, Claim 17, ¶0005, 0013, : “the computed signal variables are used to estimate a signal monotonically related to the probability of an emulated quantum signal with real and imaginary parts by summing or monotonically combining circuit outputs corresponding to the real and imaginary portions of said circuit”);
estimates amplitudes of the function based on the measured bitstrings (Sarpeshkar Fig. 20A ¶0033: “FIG. 20A illustrates an electronic transistor circuit that can be used with an emulated quantum state at eigenfrequency ω to create cos.sup.2 ωt, sin.sup.2 ωt, cos.sup.2 ωt, and −cos 2 ωt signals, all of which are useful for measuring probability or for architecting parametric amplification or attenuation via positive or negative feedback to control the oscillatory amplitude of the state, and in general for quantum control of one admittance or state by another”); and
an optimization component that updates the parameters based on the estimated amplitude and the monotonic transformation (Sarpeshkar Figs. 20A, 43B, ¶0005, 0141–0142: “FIG. 43B shows how multi-input and nonlinear quantum transadmittance circuits can implement effects such as the inhibition of a quantum particle's transport in a traveling-wave quantum system by the presence of a strong probability amplitude at a neighboring location, e.g., due to electron-electron repulsion caused by the motion of many simultaneous electrons in the lattice. In this case, we have shown inhibition of A, a place holder for a functional attenuation of quantum transport (indicated by the T junction synapsing on the A generator), if there is high probability at neighboring locations. Any lattice model could be emulated by choosing the appropriate traveling-wave parameters and interaction functions”—[wherein the BRI of the optimization component is any software and/or instructions facilitate the specific task of the component]).
The system of Amin, the teachings of Sarpeshkar, and the instant application are analogous art because they pertain to finding minimum value states of quantum systems to solve problems.
It would be obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the system of Amin with the teachings of Sarpeshkar to provide for determining monotonic transformations of the function. One would be motivated to do so to facilite emulation of quantum circuits with classical circuit building blocks (Sarpeshkar ¶0004: “there is both a need and an opportunity for efficient emulation of quantum circuits with classical circuit building blocks. Such emulation can not only be directly useful in applications that classically emulate quantum operation on transistor chips in hardware but it can also help create circuit-based software tools that design and analyze actual synthetic or natural quantum or quantum-inspired systems, e.g, as in Josephson-junction based superconducting quantum systems”).
Regarding claim 2, Amin in view of Sarpeshkar teaches all the limitations of claim 1.
Amin teaches:
wherein the parameters comprise a parameterized quantum circuit (Amin ¶0099–00102: “Techniques described herein are used to operate a quantum computer with a new evolution schedule. All previous evolution schedules known to applicant have been monotonic in that the evolution coefficient only increases, or only decreases, with time … The process of changing the Hamiltonian in adiabatic quantum computing and/or quantum annealing may be referred to as evolution. The process of evolution is effected by adjusting one or more parameters in the quantum processor”).
Regarding claim 3, Amin in view of Sarpeshkar teaches all the limitations of claim 2.
Amin teaches:
wherein the parameterized quantum circuit comprises fixed unitary gates and rotational gates (Amin ¶0004: “There are several types of quantum computers. An early proposal from Feynman in 1981 included creating artificial lattices of spins. More complicated proposals followed including a quantum circuit model where logical gates are applied to qubits in a time ordered way”).
Regarding claim 5, Amin in view of Sarpeshkar teaches all the limitations of claim 1.
Amin teaches:
wherein the computer executable components further comprise: an iteration component that iteratively updates the parameters until a defined criteria is met (Amin Fig. 3, ¶0097: “In some implementations, the transition time t* is varied over an iterative loop. For example, a for-loop wraps around method 300 in which the transition time is slowly increased from at or near the initiation of the evolution to a value at or near the end of the evolution”).
Regarding claim 6, Amin in view of Sarpeshkar teaches all the limitations of claim 5.
Amin teaches:
wherein the defined criteria comprise a set number of update iterations (Amin Fig. 3, ¶0097: “In some implementations, the transition time t* is varied over an iterative loop. For example, a for-loop wraps around method 300 in which the transition time is slowly increased from at or near the initiation of the evolution to a value at or near the end of the evolution. In another example, the variation of transition time can be slowly decreased. The data collected over these iterations can be returned for further processing, display, or the like. For example, the hybrid computer may create a plot showing the expectation value of the states of qubits versus transition time. Alternatively, the expectation value of the states of qubits can be described as the magnetization of the qubits. Another example of data for display or further processing is the expectation value of the second problem Hamiltonian, H′.sub.P, versus transition time”).
Regarding claim 7, Amin in view of Sarpeshkar teaches all the limitations of claim 5.
Amin teaches:
wherein the defined criteria comprise the estimated amplitude being less than or equal to an intended accuracy value (Amin Fig. 3, ¶0093, 0097: “Example of time-dependent coefficients include values that change in the following manners: step, ramping, logistic, and the like. In some embodiments, coefficients on qubit terms can change following a step function. For example, consider single qubit terms changing … Now, h.sub.1 can be greater than or less than h.sub.2 depending on the example”).
Regarding claim 8, Amin teaches:
A computer-implemented method comprising (Amin ¶0024: “A computational method may be summarized as including:”).
Regarding the remaining limitations of claim 8, these limitations are substantially the same as the limitations of claim 1. Thus, the remaining limitations of claim 8 are rejected using the same reasoning and analysis as claim 1 above, respectively.
Regarding claims 9–10 and 12–14, although varying in scope, the limitations of claims 9–10 and 12–14 are substantially the same as the limitations of claims 2–3 and 5–7, respectively. Thus, claims 9–10 and 12–14 are rejected using the same reasoning and analysis as claims 2–3 and 5–7 above, respectively.
Regarding claim 15, Amin teaches:
(Amin ¶0017: “A non-transitory computer-readable storage medium containing processor-executable instructions, which when executed cause at least one processor to: for a first computational problem defined by a problem Hamiltonian, during a first iteration on the first computational problem: initialize an analog processor to a first state; evolve the analog processor under a first non-monotonic evolution schedule; and read out a first final state of the analog processor”).
Regarding the remaining limitations of claim 15, these limitations are substantially the same as the limitations of claim 1. Thus, the remaining limitations of claim 15 are rejected using the same reasoning and analysis as claim 1 above, respectively.
Regarding claims 16–20, although varying in scope, the limitations of claims 16–20 are substantially the same as the limitations of claims 2–3 and 5–7, respectively. Thus, claims 16–20 are rejected using the same reasoning and analysis as claims 2–3 and 5–7 above, respectively.
Claims 4 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Amin in view of Sarpeshkar, and further in view of Zadeh et al., (US 20140201126 A1), hereinafter “Zadeh”.
Regarding claim 4, Amin in view of Sarpeshkar teaches all the limitations of claim 1.
Amin in view of Sarpeshkar does not appear to explicitly teach:
wherein the estimating the amplitudes of the function comprises a Monte Carlo approach.
However, Zadeh teaches:
wherein the estimating the amplitudes of the function comprises a Monte Carlo approach (Zadeh ¶0525: “Monte Carlo Methods in Fuzzy Optimization”).
The system of Amin in view of Sarpeshkar, the teachings of Zadeh, and the instant application are analogous art because they pertain to finding minimum value states of quantum systems to solve problems.
It would be obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the system of Amin in view of Sarpeshkar with the teachings of Zadeh to provide for determining monotonic transformations of the function using Monte Carlo approaches. One would be motivated to do so to increase informativeness (Zadeh ¶0524: “An important qualitative attribute of a Z-number is informativeness”).
Regarding claim 11, although varying in scope, the limitations of claim 11 are substantially the same as the limitations of claim 4. Thus, claim 11 is rejected using the same reasoning and analysis as claim 4 above.
Prior Art of Record
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Horesh et al., (“Meta-level Short-depth Quantum Computation Of K-eigenpairs”) discloses “Techniques and a system to facilitate meta-level quantum computation are provided. In one example, a system includes a quantum processor and a classical processor. The quantum processor can perform an expectation computation process to compute an expected value of a deflated operator and a quantum state associated with a quantum circuit description. The classical processor can execute computer executable components stored in a memory, where the computer executable components comprise a meta-level variational optimization component. The meta-level variational optimization component can perform a meta-level optimization process associated with a k-eigenvalue decomposition process to iteratively determine an inflation parameter and a variational parameterization for an eigenpair based on samples of the expectation computation process”. Horesh Abstract.
Conclusion
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/N.B.S./Examiner, Art Unit 2126
/DAVID YI/Supervisory Patent Examiner, Art Unit 2126
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