DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
2. Claims 1-5, 11-12 and 14 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lee et al. U.S. Patent Application Publication 2025/0014963 A1 (the ‘963 reference).
The reference discloses in Figs. 1C, 4A, 4B, 10 and related text a semiconductor device as claimed.
Referring to claim 1, the ‘963 reference discloses a semiconductor device, comprising:
a substrate (underlying heat sink layer 300, para [37] (paragraph(s) [0037])) comprising at least one trench (hole H1, para [59], see also Fig. 10);
a component (220, para [38]), wherein the component requires shielding from electromagnetic signals (para [61]); and
a shielding structure (500 including 510, para [61 and 63]) inserted in the at least one trench.
Referring to claim 2, the reference further discloses that the shielding structure (500) shields the component from electromagnetic signals (para [61]).
Referring to claim 3, the reference further discloses that the shielding structure (500) extends through the trench (H1) and is electrically connected (via ground pattern 130G (para [39]) and ground solder ball 150 (para [40])) to a ground (not shown) of the semiconductor device.
Referring to claim 4, the reference further discloses that the shielding structure is bonded to the ground using a solder paste (ground solder ball 150, para [40]), a metal paste, or a silver paste.
Referring to claim 5, the reference further discloses that the shielding structure comprises a single metal layer, the single metal layer comprising at least one of copper (para [62]), nickel, iron, cobalt, and silver (para [62]).
Referring to claim 11, the reference further discloses that the shielding structure (500) comprises a T-shape (see Fig. 1C), wherein a bottom segment of the shielding structure (500) is inserted into the trench (H1), and a vertical segment of the shielding structure extends on opposite sides of the trench (H1).
Referring to claim 12 and using the same reference characters, interpretations, and citations as detailed above for claim 1 where applicable, the reference discloses a shielding structure (500) for a semiconductor device, the shielding component comprising:
a first segment (horizontal segment in Fig. 4B, not depicted in Fig. 4A, and note that Figs. 4A and 4B are enlarged views of portion II and III of Fig. 1C, para [85]) formed from a first set of layers (502 and 503) comprising a first metal (copper or copper alloy, para [87]) and a second metal (steel use stainless, para [88]); and
a second segment (vertical segment) formed from a second set of layers (502, 503) comprising the first metal (copper or copper alloy) and the second metal (steel use stainless), the second segment orthogonal to the first segment, wherein the second segment is configured to be inserted into a trench (H1) in a substrate (300) of the semiconductor device.
Referring to claim 14, Fig. 1C depicts that the first segment (the horizontal segment) is configured to shield an electronic device from electromagnetic interference from a first direction, and the second segment (the vertical segment) is configured to shield an electronic device from electromagnetic interference from a second direction.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. §103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claim 9 is rejected under 35 U.S.C. §103 as being unpatentable over U.S. Patent Application Publication U.S. Patent Application Publication 2025/0014963 A1 (the ‘963 reference).
Referring to claim 9, although the reference does not specifically disclose dimensions as claimed, the claimed dimensions (wherein the total thickness of the shielding structure is about 5 microns) will not support the patentability of subject matter encompassed by the prior art (the ‘963 reference discloses that the shielding structure 500 has a total thickness of T1, T2 and T3, para [87]) unless there is evidence indicating such dimensions are critical. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation"; MPEP 2144.05.
Allowable Subject Matter
4. Claims 15-20 are allowable over the prior art of record.
Claims 6-8, 10 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for the indication of allowable subject matter: The cited art, whether taken singularly or in combination, especially when all limitations are considered within the claimed specific combination, fails to teach or render obvious a semiconductor device and a method of forming shielding structures for semiconductor packages with all exclusive limitations as recited in claims 6, 10, 13 and 15, which may be characterized (claim 6) in that the shielding structure comprises magnetic conducting layers and nonmagnetic conducting layers, (claim 10) the shielding structure comprises two or more metal layers, each of the two or more metal layers comprising at least one of copper, nickel, iron, cobalt, and silver, (claim 13) in that the trench comprises a magnetic material on one or more walls of the trench, the magnetic material extending from a surface of the substrate to a metal layer of the semiconductor device, and (claim 15) in depositing a second metal layer on the first metal layer to a second thickness; removing the carrier substrate from the first metal layer to form a sheet of shielding material, in separating the sheet of shielding material into two or more segments, and in inserting the shielding structure into a trench disposed in a substrate of a semiconductor package.
Conclusion
5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TU TU V HO whose telephone number is (571)272-1778. The examiner can normally be reached on Monday to Thursday 6:30 - 15:00, Monday through Thursday.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff W Natalini can be reached on 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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03-07-2026
/TU-TU V HO/Primary Examiner, Art Unit 2818