DETAILED ACTION
This Office Action is in response to the amendment filed on 12/16/2025 in which claims 1, 3, 8, 9, 12, and 17-20 are amended; claims 2, 4-7, 11, and 13-16 are canceled; and no new claims are added. Claims 1, 3, 8-10, 12, and 17-20 are present for examination, and claims 1, 9, and 18 are the independent claims.
Notice of Pre-AIA or AIA Status
The present application is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/23/2025 and 09/10/2024 has been considered. The submission is in compliance with the provisions of 37 CFR 1.97. Form PTO-1449 is signed and attached hereto.
Response to Arguments
1. Applicant's arguments in pages 5-10 of the REMARKS filed on 12/16/2025 with respect to the rejection under 35 USC § 103(a) have been considered but are moot in view of the new grounds of rejection. After careful review and in light of Applicant’s amendments, remarks, and Examiner’s newly performed search and consideration, claims 61-80 are now newly rejected under 35 U.S.C. 103(a) for the reasons specified below.
With regards to the rejection under Double Patenting, Applicants remarks have been considered. However, after careful review, the double patenting rejection to claims 1-20 is maintained because the examined application claims are either anticipated by, or would have been obvious over, the reference claim(s). Examiner notes, however, that as prosecution proceeds, the double patenting rejection can be cured by terminal disclaimer and/or by the change of the relationship/similarity of the respective claim sets.
Double Patenting
2. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
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3. Claims 1-20 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claims 1-20 of Patent No. US 11,868,274 B2, over claims 1-16 of Patent No. US 11,074,198 B2. Although the conflicting claims are not identical, they are not patentably distinct from each other because both applications recite similar steps of methods related to a computer system having a processor and a main memory storing scrambled data.
Claim Comparison Table
Instant Application: 18/513,148
Patent No. US 11,868,274 B2
1. A computing system, comprising: an unscrambled zone having circuits configured to perform operations on unscrambled data; a cache configured as a gateway to the unscrambled zone from outside of the computing system, wherein scrambled data in the cache is unscrambled to enter the unscrambled zone, and unscrambled data in the unscrambled zone is scrambled to enter the cache; and a secure zone configured to manage keys used in scrambling data to enter the cache and unscrambling data to enter the unscrambled zone.
1. A computer system, comprising: a memory configured to store scrambled data; a first processor coupled with the memory, the first processor having: a secure zone configured to store keys; and an unscrambled zone configured to operate on unscrambled data; and a second processor coupled with the memory, wherein the second processor is prevented from accessing the unscrambled data; wherein the unscrambled zone includes a memory address register configured to store a virtual memory address.
2 The computing system of claim 1, wherein the unscrambled zone, the cache, and the secure zone are configured in a processor.
13. The computer system of claim 12, wherein the first processor includes a scrambled zone having an internal cache configured to store the scrambled data; and the second processor is provided with access to the scrambled zone via a cache coherence protocol.
3. The computing system of claim 2, wherein the unscrambled zone includes at least one execution unit and at least one register.
3. The computer system of claim 2, wherein the unscrambled zone includes an execution unit configured to perform the operations on a data item located at the virtual memory address stored in the memory address register.
4. The computing system of claim 3, wherein the processor further includes a logic circuit configured to perform operations to scramble data and unscramble data using the keys in the secure zone.
4. The computer system of claim 2, wherein the virtual memory address includes a field containing an object identifier; and the first processor is configured to retrieve an unscramble key based on the object identifier.
Claims 5-20
Claims 5-20
Instant Application: 18/513,148
Patent No. US 11,074,198 B2
Claims 1-16
Claims 1-16
Allowable Subject Matter
4. Claims 1, 3, 8-10, 12, and 17-20 would be allowable if rewritten or further amended to overcome the double patenting rejection(s), set forth in this office action and to include all of the limitations of the base claim and any intervening claims.
Reasons for Allowance
5. The following is an examiner’s statement of reasons for placing claims 1, 3, 8-10, 12, and 17-20 under allowable subject matters:
The limitation of claim 1 and the corresponding dependent claims are allowed as the limitations are not disclosed by the any of the prior art of record. For example, the limitations in claim 1 recites “..a cache, of the processor, configured as a gateway to the unscrambled zone from outside of the processor and configured to store scrambled data; a logic circuit, of the processor, coupled with the cache and with the circuits of the unscrambled zone and configured to unscramble scrambled data from the cache for transfer to the circuits of the unscrambled zone, and configured to scramble unscrambled data from the unscrambled zone for transfer to the cache….” in combination with the rest of the limitations recited in the independent claim 1
are not are not taught or fairly suggested by the prior art of record.
Independent claim 9 and 18 recite similar subject matters as to those in claim 1.
The allowable subject matters in above dependent claims are novel and non-obvious in scope over the prior art of record as the prior-art references fail to teach each and every features of the aforesaid dependent claim(s) including the limitations set forth above.
In view of the foregoing, the scope of claimed subject matters renders the invention patentably distinct as none of the prior art of record, either taken by itself or in any combination, would have anticipated or made obvious the invention of the present application at or before the time it was filed.
Furthermore, the Examiner performed updated search which does not yield other specific references that reasonably, either alone or in combination, would result a proper rejection of all the claimed features presented in each of the independent claims 1, 9, and 18 under 35 U.S.C 102 or 35 U.S.C.103 with proper motivation.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled "Comments on Statement of Reasons for Allowance."
Conclusion
6. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Hsieh et al. (US 20190227708 A1) discloses data storage apparatus includes a cache memory module and a NAND flash memory module including a cache memory mirror and a user data storage zone. The cache memory module is connected to the cache memory mirror via a path and electrically connected to the user data storage zone via another path. The cache memory module receives a write command that includes user data from a host, writes a copy of the user data into the user data storage zone in a write-back mode, and writes another copy of the user data cache memory mirror in a write-through mode.
7. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MAHFUZUR RAHMAN whose telephone number is (571)270-7638. The examiner can normally be reached on Monday thru Friday.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yin-Chen Shaw can be reached on 571-272-8878. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MAHFUZUR RAHMAN/Primary Examiner, Art Unit 2498