DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The abstract of the disclosure is objected to because of the following minor informalities:
The language of the abstract should not repeat the information given in the title.
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Drawing
The drawings are objected to because of the following minor informalities:
-- fig. 4 is faded and is not visible clearly --
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-20 are rejected under 35 U.S.C. 112 (b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or joint inventor regards as the invention.
The following claim terms lack proper antecedent basis:
-- the CPU utilization rates -- in claim 2 line 7.
-- the bandwidth usage amounts -- in claim 2 line 7.
The following claim language is not clearly understood:
Claim 1 recites “first processing node” and “second processing node” without clearly reciting what is the relation between the first and second node.
Claim 1 recites multiple I/O modes without clearly reciting what are the different modes.
Claim 2 recites “combining the CPU utilization rates and the bandwidth usage amounts”. It is unclear which CPU utilization rates and the bandwidth usage amounts is being combined.
Claim 5 recites “the first load and a second load of the second processing node”. Applicant is requested to amend the claim to recite “the first load of the first processing node and a second load of the second processing node” for clarity.
Claim 8 recites “withdrawing an operation of allocating the storage object”. It is unclear withdrawing is referring to withdrawing already allocated storage object from the second node i.e. already migrated storage object is being withdrawn, or a planned future migration of storage object is cancelled.
Claims 10 and 19 recite elements of claim 1 and have similar deficiency as claim 1. Therefore, they are rejected for the same rational. Remaining dependent claims 2-9, 11-18 and 20 are also rejected due to similar deficiency inherited from the rejected independent claims.
* Applicant is advised to at least indicate support present in the specification for further defining/clarifying the claim language in case Applicant believe amendments would unduly narrow the scope of the claim.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-5, 9-14, and 18-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more or integrating into practical application.
Based upon at least the decision by the United States Supreme Court in Alice Corp. v. CLS Bank Int'l, 134 S. Ct. 2347, 2354 (2014), post-Alice precedential court decisions, and 2019 Revised Patent Subject Matter Eligibility Guidance, claims 1-5, 9-14, and 18-20 are determined to be directed to an abstract idea. Examples of abstract ideas include at least Mathematical concepts, Mental process and Certain Methods of organizing human activity. Independent claim 1 is directed to “allocating storage object from first node to second node based on the first load determined based on the multiple resource consumption degrees, I/O counts for the multiple I/O modes” at a high level of generality.
Step 1
As described in MPEP § 2106, subsection III, Step 1 of the eligibility analysis asks: Is the claim to a process, machine, manufacture or composition of matter?
Claim 1 recites a method, which falls within the “process” category of 35 U.S.C. § 101. Claim 10 recites a device comprising memory/processors, which falls within the “machine” category of 35 U.S.C. § 101. Claim 19 recites a product stored on a non-transitory medium, which falls within the “machine / manufacture” category of 35 U.S.C. § 101. Thus, the analysis determines whether the claims recite a judicial exception and fail to integrate the exception into practical application. See Memorandum, 84 Fed. Re. 54-55. If both elements are satisfied, the claims are directed to a judicial exception under the first step of the Alice/Mayo test, See id.
Step 2A Prong One
As described in MPEP § 2106, subsection III, Step 2A of the Office’s eligibility analysis is the first part of the Alice/Mayo test, i.e., the Supreme Court’s "framework for distinguishing patents that claim laws of nature, natural phenomena, and abstract ideas from those that claim patent-eligible applications of those concepts." Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 217-18, 110 USPQ2d 1976, 1981 (2014) (citing Mayo, 566 U.S. at 77-78, 101 USPQ2d at 1967-68).
Step 2A is a two-prong inquiry, in which examiners determine in Prong One whether a claim recites a judicial exception, and if so, then determine in Prong Two if the recited judicial exception is integrated into a practical application of that exception.
claim elements
i
A method for allocating resources, comprising:
generic computing
ii
determining multiple resource consumption degrees of multiple input/output (I/O) modes of a first processing node;
information gathering
iii
determining a first load of the first processing node based on the multiple resource consumption degrees and I/O counts for the multiple I/O modes; and
mental process abstract idea
iv
allocating a storage object in the first processing node to a second processing node based on the first load,
mental process abstract idea
v
wherein the storage object is used to store data in an I/O operation.
generic computing
The overall process described by steps [iii]-[iv] describes “concepts performed in the human mind” or “observation, evaluation, judgement, opinion.” Memorandum, 84 Fed. Reg, 52. Thus steps [iii]-[iv] recite the abstract concept of [m]ental processes.” Id. For example, step [iii] recites “determining a first load of the first processing node based on the multiple resource consumption degrees and I/O counts for the multiple I/O modes”, which is directed to determine load based on resource consumption and I/O counts, and can be perform by human mind alone or with the help of pen and paper. Similarly, step [iv] recites “allocating a storage object in the first processing node to a second processing node based on the first load,”, which is a combination of observation, evaluation, judgement and opinion, and may be performed by human mind. Therefore, steps [iii]-[iv] resembles the idea of performing observation, evaluation, judgement and opinion according to the broadest reasonable interpretations of the claim elements and can be performed by human mind alone or with the aid of pen and paper. The courts consider a mental process (thinking) that "can be performed in the human mind, or by a human using a pen and paper" to be an abstract idea. CyberSource Corp. v. Retail Decisions, Inc., 654 F.3d 1366, 1372, 99 USPQ2d 1690, 1695 (Fed. Cir. 2011). Thus, claim 1 recites a judicial exception. For these same reasons, claims 10 and 19 recite judicial exception.
Step 2A, Prong Two
As described in MPEP § 2106, subsection III, Step 2A of the Office’s eligibility analysis is the first part of the Alice/Mayo test, i.e., the Supreme Court’s "framework for distinguishing patents that claim laws of nature, natural phenomena, and abstract ideas from those that claim patent-eligible applications of those concepts." Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 217-18, 110 USPQ2d 1976, 1981 (2014) (citing Mayo, 566 U.S. at 77-78, 101 USPQ2d at 1967-68).
Step 2A is a two-prong inquiry, in which examiners determine in Prong One whether a claim recites a judicial exception, and if so, then determine in Prong Two if the recited judicial exception is integrated into a practical application of that exception.
Because claims 1, 10 and 19 recite a judicial exception, analysis determines if the claims recites additional elements that integrate the judicial exception into practical application. In addition to the limitations of claim 1 discussed above that recite the abstract concepts, claim 1 also recites additional steps [i]-[ii] and [v]. Claim 1 in step [i] recites method for allocating resources, which is directed to generic computing method of resource allocation, and these are generic computing method and may not be considered an improvement in the functioning of a computer or technology or technical field. Claim 1 in step [ii] recites “determining multiple resource consumption degrees of multiple input/output (I/O) modes of a first processing node”, which is directed to information gathering according to the broadest reasonable interpretation. Information gathering is considered insignificant extra solution activity and adding insignificant extra-solution activity to the judicial exception does not integrate the judicial exception into practical application. See MPEP § 2106.04(d) I. § 2106.05(g). Claim 1 step [v] recites “wherein the storage object is used to store data in an I/O operation”, which is directed to generic computing component used for storing information and is neither inventive nor provide improvement to the technology and / or technical field. The Specification doesn’t provide additional details that would distinguish the additional limitations recited in claim 1 steps [i]-[ii] and [v] from a generic implementation of the abstract idea. Thus, the claim elements recited in steps [i]-[ii] and [v], under broadest reasonable interpretation, do not integrate the judicial exception into a practical application. Thus, claim 1 recites a judicial exception. For these same reasons and based on similar analysis as above, claims 10 and 19 also recites judicial exception.
Step 2B
As described in MPEP § 2106, subsection III, Step 2B of the Office’s eligibility analysis is the second part of the Alice/Mayo test, i.e., the Supreme Court’s "framework for distinguishing patents that claim laws of nature, natural phenomena, and abstract ideas from those that claim patent-eligible applications of those concepts." Alice Corp. Pty. Ltd. v. CLS Bank Int'l, 573 U.S. 208, 217, 110 USPQ2d 1976, 1981 (2014) (citing Mayo, 566 U.S. 66, 101 USPQ2d 1961 (2012)).
Step 2B asks: Does the claim recite additional elements that amount to significantly more than the judicial exception.
Because claims 1, 10 and 19 are directed to judicial exception, analysis must determine, according to Alice, whether these claims recite an element, or combination of elements that is enough to ensure that the claim is directed to significantly more than a judicial exception.
The Memorandum, Section III (B) (footnote 36) states:
In accordance with existing guidance, an Examiner’s conclusion that an additional element (or combination of elements) is well understood, routine, conventional activity must be supported with a factual determination. For more information concerning evaluation of well-understood, routine, convention activity, see MPEP 2106.05(d), as modified by the USPTO Berkheimer Memorandum.
The Berkheimer Memorandum, Section III(A)(1) states:
A Specification demonstrates the well-understood, routine, conventional nature of additional elements when it describes the additional elements as well-understood or routine or conventional (or an equivalent term), as a commercially available product, on in a manner that indicates that the additional elements are sufficiently well-known that the specification does not need to describe the particulars of such additional elements to satisfy 35 §U.S.C. 112(a). A finding that an element is well-understood, routine, or conventional cannot be based only on the fact that the specification is silent with respect to describing such element.
Claim 1 in step [i] recites method for allocating resources, which is directed to generic computing method of resource allocation, and these are generic computing method and is well-understood, routine and conventional (See arts in PTO-892). Claim 1 in step [ii] recites “determining multiple resource consumption degrees of multiple input/output (I/O) modes of a first processing node”, which is directed to information gathering according to the broadest reasonable interpretation. Information gathering is considered insignificant extra solution activity. Claim 1 step [v] recites “wherein the storage object is used to store data in an I/O operation”, which is directed to generic computing component used for storing information and is well-understood, routine and conventional (See arts in PTO-892). Further, the Specification does not provide additional details that would distinguish the recited components from generic implementation in the combination. As such these additional claim elements are not directed to anything beyond conventional nature of these elements or otherwise more than well-understood, routine, conventional activity in the field of computing. These limitations either alone or in combination simply append well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception.
It has been recognized by court that receiving, processing, and storing data as well as receiving or transmitting data over a network are a well-understood, routine and conventional activities. Mortg. Grader, Inc. v. First choice Loan Servs. Inc., 811 F.3d 1314 (Fed. Cir. 2016) (generic computer components, such as interface, “network”, and “database,” fail to satisfy the inventive concept requirement); see also TLI Commc’ns, 823 F.3d 607; Elec. Power, 830 F.3d at 1350. There is no indication that the recited claim elements override the conventional use of known features or involve an unconventional arrangement or combination of elements such that the particular combination of generic technology results in anything beyond well-understood, routine, and conventional data gathering and output. Alice, 573 U.S. at 223 (“[T]he mere recitation of a generic computer cannot transform a patent ineligible abstract idea into a patent-eligible invention.”) See also Customedia Techs. LLC v. Dish Network Corp., 951 F.3d 1359, 1366(Fed. Cir. 2020) (“[T]he invocation of ‘already-available computers that are not themselves plausibly asserted to be an advance…amounts to a recitation of what is well-understood, routine, and conventional.”)(quoting SAP Am., Inc. v. InvestPic, LLC, 898F3.d 1161, 1170 (Fed. Cir. 2018)); and buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355(Fed. Cir 2014)(“That a computer receives and sends the information over a network -- with no further specification -- is not even arguably inventive.”). Thus, Claims 1, 10 and 19 are not directed to significantly more than a patent ineligible concept.
Dependent claim 2 recites “wherein determining the multiple resource consumption degrees of the multiple I/O modes of the first processing node comprises: determining a CPU utilization rate consumed by each I/O operation performed in each I/O mode of the multiple I/O modes; determining a bandwidth usage amount consumed by each I/O operation performed in each I/O mode of the multiple I/O modes; and combining the CPU utilization rates and the bandwidth usage amounts to determine the multiple resource consumption degrees of the multiple I/O modes”, which is a combination of observation, evaluation, judgement and opinion, and is directed to mental process abstract idea.
Dependent claim 3 recites “wherein determining the first load of the first processing node based on the multiple resource consumption degrees and the I/O counts for the multiple I/O modes comprises: determining average input/output operations per second (IOPS) of the storage object in the first processing node; determining, based on the IOPS, the I/O count of the storage object in each of the multiple I/O modes in a predetermined time period; and determining a total I/O count for the storage object based on the I/O count in each of the multiple I/O modes”, which is a combination of observation, evaluation, judgement and opinion, and is directed to mental process abstract idea.
Dependent claim 4 recites “wherein determining the first load of the first processing node based on the multiple resource consumption degrees and the I/O counts for the multiple I/O modes further comprises: combining the total I/O count for the storage object and the multiple resource consumption degrees for the multiple I/O modes to determine a total load for the storage object; and determining the first load of the first processing node based on the total load for the storage object”, which is a combination of observation, evaluation, judgement and opinion, and is directed to mental process abstract idea.
Dependent claim 5 recites “wherein allocating the storage object in the first processing node to the second processing node based on the first load comprises: determining an imbalance rate based on an average load and a standard deviation between the first load and a second load of the second processing node; and comparing the imbalance rate with a predetermined threshold”, which is a combination of observation, evaluation, judgement and opinion, and is directed to mental process abstract idea.
Dependent claim 9 recites “wherein the multiple resource consumption degrees of the multiple I/O modes are determined based on I/O sizes, read-to-write ratios, and random I/O to sequential I/O ratios”, which is a combination of observation, evaluation, judgement and opinion, and is directed to mental process abstract idea.
Based on similar analysis as above, dependent claims 11-14, 18 and 20 recite claim elements that are either abstract idea or additional claim elements, that individually or in combination, are either generic computing methods/components or insignificant pre / post solution activity and neither integrate into practical application nor amount to significantly more.
Therefore, the claim(s) 1-5, 9-14, and 18-20 are rejected under 35 U.S.C. 101 as being directed to judicial exception without integrating into practical application or significantly more.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 9-13, 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shibayama et al. (US 2020/0104151 A1, hereafter Shibayama) in view of Lee et al. (US 2018/0131758 A1, hereafter Lee).
As per claim 1, Shibayama teaches the invention substantially as claimed including method for allocating resources ([0007] resource allocation), comprising:
determining multiple resource consumption degrees ([0117] fig. 13 performance information, node, use amount of resources used by each node, CPU use rate, memory use rate, used bandwidth) of multiple input/output (I/O) modes ([0159] node 100a, storage controller, active mode of processing an IO request [0160] node 100b, storage controller, standby mode) of a first processing node ([0007] plurality of nodes fig. 1 node 100a);
determining a first load of the first processing node based on the multiple resource consumption degrees (fig. 13 NodeID-1, CPU usage rate, memory use amount, used bandwidth) and I/O counts for the multiple I/O modes ([0116] fig. 12 IO amount of each VM of node, WRITE/READ IO number [0135] input information, IO amount, memory use amount, assumed load [0159] active mode [0160] standby mode; fig. 9); and
allocating a storage object in the first processing node to a second processing node based on the first load ([0070] fig. 4 Node 100a pool 404a, spanning pool (Nodes 100b-c spanning pool 404 b), wherein the storage object is used to store data in an I/O operation ([0057] perform input/output, write/read data to/ from the drive [0066] drive 103 [0069] fig. 3 NVME drive 103 SAS drive 103b SATA drive 103c [0071] divides the drive 103 into small areas, units of division; fig. 4).
Shibayama doesn’t specifically teach allocating a storage object in the first processing node to a second processing node based on the first load.
Lee, however, teaches allocating a storage object in the first processing node to a second processing node based on the first load ([0006] storage array, plurality of segments, first server node, second server node, allocating and managing the plurality of segments, performing, by the first server node, a segment dynamic allocation regarding the storage array, volume migration operation [0087] difference, load information, greater than the threshold, target volume, selected from volumes allocated to the first server node, migrated to the second server node).
It would have been obvious to one of ordinary skills in the art before the effective filing date of the invention was made to combine the teachings of Shibayama with the teachings of Lee of migrating storage volume from the first server node to the second server node based on load to improve efficiency and allow allocating a storage object in the first processing node to a second processing node based on the first load to the method of Shibayama as the instant invention.
The combination would have been obvious because applying the storage volume migration from the first server to the second server based on load as taught by Lee to the method of Shibayama to yield predictable result and improved load balancing.
As per claim 2, Shibayama teaches wherein determining the multiple resource consumption degrees of the multiple I/O modes of the first processing node comprises:
determining a CPU utilization rate consumed by each I/O operation performed in each I/O mode of the multiple I/O modes (fig. 13 CPU use rate [0159] active mode [0160] standby mode);
determining a bandwidth usage amount consumed by each I/O operation performed in each I/O mode of the multiple I/O modes (fig. 13 used bandwidth [0159] active mode [0160] standby mode); and
combining the CPU utilization rates and the bandwidth usage amounts to determine the multiple resource consumption degrees of the multiple I/O modes (fig. 13 CPU use rate, used bandwidth [0159] active mode [0160] standby mode [0126] sum of the computer resources used; available data can be combined).
As per claim 3, Shibayama teaches wherein determining the first load of the first processing node based on the multiple resource consumption degrees and the I/O counts for the multiple I/O modes comprises:
determining average input/output operations per second (IOPS) of the storage object in the first processing node (fig. 14 IO amount 1415 RD/WR [0126] use amount/rate of the computer resources, such as memories, NW bandwidths);
determining, based on the IOPS, the I/O count of the storage object in each of the multiple I/O modes in a predetermined time period (fig. 14 IO amount 1415 RD/WR [0126] use amount/rate of the computer resources, such as memories, NW bandwidths [0159] active mode [0160] standby mode); and
determining a total I/O count for the storage object based on the I/O count in each of the multiple I/O modes (fig. 14 IO amount 1415 RD/WR [0126] use amount/rate of the computer resources, such as memories, NW bandwidths [0159] active mode [0160] standby mode; total can be calculated based on the gathered data).
As per claim 4, Shibayama teaches wherein determining the first load of the first processing node based on the multiple resource consumption degrees and the I/O counts for the multiple I/O modes further comprises:
combining the total I/O count for the storage object (fig. 14 IO amount 1415 RD/WR [0126] use amount/rate of the computer resources, such as memories, NW bandwidths [0159] active mode [0160] standby mode; total can be calculated based on the gathered data) and the multiple resource consumption degrees for the multiple I/O modes to determine a total load for the storage object (fig. 13 CPU use rate, used bandwidth [0159] active mode [0160] standby mode [0126] sum of the computer resources used; available data can be combined); and
determining the first load of the first processing node based on the total load for the storage object ([0065] sum of IO processing, [0126] use amount/rate of the computer resources, such as memories, NW bandwidths [0159] active mode [0160] standby mode fig. 13 CPU use rate, used bandwidth [0126] sum of the computer resources used).
As per claim 9, Shibayama teaches wherein the multiple resource consumption degrees of the multiple I/O modes ([0117] fig. 13 performance information, node, use amount of resources used by each node, CPU use rate, memory use rate, used bandwidth [0159] node 100a, storage controller, active mode of processing an IO request [0160] node 100b, storage controller, standby mode) are determined based on I/O sizes (fig. 14 IO amount 1415 ), read-to-write ratios (fig. 14 RD/WR), and random I/O to sequential I/O ratios ([0116] sequential R/W and Random R/W ).
Claim 10 recites an electronic device, comprising: at least one processor; and
a memory, the memory being coupled to the at least one processor and having instructions stored therein, wherein the instructions, when executed by the at least one processor, cause the electronic device to perform actions comprising elements similar to claim 1. Therefore, it is rejected for the same rationale.
Claim 11 recites the electronic device for the elements similar to claim 2. Therefore, it is rejected for the same rationale.
Claim 12 recites the electronic device for the elements similar to claim 3. Therefore, it is rejected for the same rationale.
Claim 13 recites the electronic device for the elements similar to claim 4. Therefore, it is rejected for the same rationale.
Claim 18 recites the electronic device for the elements similar to claim 9. Therefore, it is rejected for the same rationale.
Claim 19 recites computer program product tangibly stored on a non-transitory computer-readable storage medium and comprising machine-executable instructions, wherein the machine-executable instructions, when executed by a machine, cause the machine to perform actions comprising elements similar to claim 1. Therefore, it is rejected for the same rationale.
Claim 20 recites the computer program product for elements similar to claim 2. Therefore, it is rejected for the same rationale.
Claims 5-6, 14-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shibayama in view of Lee, as applied to above claims, and further in view of Chen et al. (US 2022/0244877 A1, hereafter Chen).
As per claim 5, Shibayama teaches wherein allocating the storage object in the first processing node to the second processing node based on the first load comprises:
determining an imbalance rate based on an average load and a standard deviation between the first load and a second load of the second processing node ([0065] load is imbalance between the nodes [0061] use of computer resources of the nodes are balanced); and
comparing the imbalance rate with a predetermined threshold ([0061] sum of CPU use amounts of CPUs, within an upper limit of the CPU use amount of the node [0125] upper limits, computer resources managed for each node, the capacity upper limit and use states).
Shibayama and Lee, in combination, do not specifically teach comparing the imbalance rate with threshold.
Chen, however, teaches comparing the imbalance rate with a predetermined threshold ([0005] wear level, usage information, wear level, two or more storage system, wear level imbalance, imbalance threshold current performance imbalance rate, exceeds, acceptable imbalance threshold [0064] imbalance rate, wear level reaches a designated imbalance rate threshold).
It would have been obvious to one of ordinary skills in the art before the effective filing date of the invention was made to combine the teachings of Shibayama and Lee with the teachings of Chen of determining usage level based wear level imbalance rate reaches an imbalance rate threshold to improve efficiency and allow comparing the imbalance rate with threshold to the method of Shibayama and Lee as in the instant invention.
It would have been obvious to combine the teachings of determining the cluster wide wear level reaches an imbalance rate threshold as taught by Chen to the method of Shibayama and Lee of resource allocation and management to yield expected result and improved efficiency and load balancing.
As per claim 6, Lee teaches, monitoring the first load of the first processing node and the second load of the second processing node ([0029] server nodes, mutually periodically transmit/receive, load information, checking load balancing ).
Chen teaches remaining claim elements of responsive to the imbalance rate being less than the predetermined threshold ([0064] wear level, reaches, imbalance rate threshold i.e. can determine rate less than the threshold); and responsive to the imbalance rate being greater than or equal to the predetermined threshold ([0064] wear level, reaches, imbalance rate threshold) allocating the storage object of the first processing node to the second processing node ([0064] candidate source and destination storage arrays for data or storage object migration).
Claim 14 recites the electronic device for the elements similar to claim 5. Therefore, it is rejected for the same rationale.
Claim 15 recites the electronic device for the elements similar to claim 6. Therefore, it is rejected for the same rationale.
Claims 7 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shibayama in view of Lee, and further in view of Chen, as applied to above claims, and further in view of Shraer et al. (US 2020/0137149 A1, hereafter Shraer).
As per claim 7, Lee teaches wherein allocating the storage object in the first processing node to the second processing node further comprises:
allocating a first storage object with the highest load in the first processing node to the second processing node ([0006] first server node, volume migration operation, segment dynamic allocation operation, storage array [0068] allocate some segment allocated to the first server node to second server node); and
responsive to the first load of the first processing node being still greater than the second load of the second processing node ([0007] difference between second load of the second server node and first load of the server node is greater than a threshold value), allocating a second storage object having a second load less than the highest load in the first processing node to the second processing node ([0006] first server node, volume migration operation, segment dynamic allocation operation, storage array [0073] allocate second / fourth / fifth segment allocated to the first server node to second server node).
Shimbaya, Lee and Chen, in combination, do not specifically teach storage object with highest load, storage object having a second load less than the highest load.
Sharer, however, teaches storage object with highest load ([0033] load balancing operation, move operations, worker computer having highest load), storage object having a second load less than the highest load ([0033] load balancing operation, move operations, worker computer having highest load i.e. after first move, next highest load computer will be lower the previous highest).
It would have been obvious to one of ordinary skills in the art before the effective filing date of the invention was made to combine the teachings of Shibayama, Lee, and Chen with the teachings of Shraer of determining worker computer with highest load for move operation to improve efficiency and allow selection to move storage object with highest load, storage object having a second load less than the highest load to the method of Shibayama, Lee, and Chen as in the instant invention.
The combination would have been obvious because applying the known method of selecting computer with highest load for move operation as taught by Shraer to the method of Shibayama, Lee, and Chen to yield predictable result with improved storage efficiency and utilization.
Claim 16 recites the electronic device for the elements similar to claim 7. Therefore, it is rejected for the same rationale.
Claims 8 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shibayama in view of Lee, and further in view of Chen, as applied to above claims, and further in view of Miller et al. (US 8,296,434 B1, hereafter Miller).
As per claim 8, Lee teaches wherein allocating the storage object in the first processing node to the second processing node further comprises: responsive to the first load of the first processing node being less than or equal to the second load of the second processing node ([0005] comparing, load information, first server node, second server node, performing load balancing operation based on the comparison result).
Shibayama, Lee and Chen, in combination, do not specifically teach withdrawing an operation of allocating the storage object in the first processing node to the second processing node.
Miller, however, teaches withdrawing an operation of allocating the storage object in the first processing node to the second processing node (col 24 lines 1-25 too much available capacity, based on current demand, nodes temporarily removed from the group).
It would have been obvious to one of ordinary skills in the art before the effective filing date of the invention was made to combine the teachings of Shibayama, Lee, and Chen with the teachings of Miller of removing node from the group if the available capacity is too high based on the demand to improve efficiency and allow withdrawing an operation of allocating the storage object in the first processing node to the second processing node to the method of Shibayama, Lee, and Chen as in the instant invention.
The combination would have been obvious because applying the known method of removing node from the group if the available capacity is too high based on the demand as taught by Miller to the method of Shibayama, Lee, and Chen to yield predictable result with improved storage efficiency and utilization.
Claim 17 recites the electronic device for the elements similar to claim 8. Therefore, it is rejected for the same rationale.
Examiners Note
Applicant is further reminded of that the cited paragraphs and in the references as applied to the claims above for the convenience of the applicant(s) and although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider all of the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Conclusion
Authorization for Internet Communication
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/ABU ZAR GHAFFARI/ Primary Examiner, Art Unit 2195