CTNF 18/514,252 CTNF 82190 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Continued Examination Under 37 CFR 1.114 07-42-04 AIA A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 30, 2026 and claims filed 12/29/2025 has been entered. 12-151 AIA 26-51 12-51 Status of Claims Claims 21-22, 24, 33-35, 37-40 and 42-43 are pending. Claim Rejections – 35 USC section § 103 On pages 6-7 of the Response, Applicant argues that Kim does not teach “determine deviated pixel positions based on a pixel position of a pixel and offsets corresponding to the pixel, wherein the offsets are generated for the pixel and kernel values corresponding to the pixel, wherein an offset comprises a position value to indicate a deviation from the pixel position of the pixel such that an upper limit of the deviation is predefined, and wherein the position value comprises a floating point value; and filter a pixel with a convolutional kernel and pixel values of the deviated pixel positions to obtain a de-noised pixel” as recited in claim 1. Specifically, Applicant argues that Kim teaches an “archaic technique for using a weighted averaging process with sparsely sampled 3x3 kernels. See Kim at Abstract. Kim's technique does not anticipate determining a plurality of deviated pixel positions based on a pixel position of a pixel and a plurality of offsets and filtering a pixel with a convolutional kernel and pixel values of the plurality of deviated pixel positions to obtain a de-noised pixel as recited by the independent claims 21” ( see page 8 of the Response ). In response, the Examiner disagrees. Kim clearly teaches adding “a 1 x 1 convolutional layer on top of the feature extraction layer which results in two feature maps of size 2k211 that are combined by element-wise multiplication. The final output contains relative offsets (for x, y positions) from locations on a regular grid” ( see section 3.2, [p][004] ). The offsets generated at the end is equivalent to “deviated pixel position”. Further, Kim teaches computing a weighted average using the learned kernel weights and sampling locations computed from the offsets to obtain a residual image. Finally, the filtering result is obtained by combining the residuals with the target image ( section 3.1, [p][001] ). Kim teaches in the sentence before the citation that “we use a two-stream CNN (Simonyan and Zisserman 2014), where each sub-network is in charge of one of the two images, with different feature maps used to estimate the corresponding kernel weights and offsets”, thus the learned kernel weight was determined using a CNN and thus would have including “filtering a pixel with a convolutional kernel and pixel values”. Kim failed to teach “wherein an offset indicates a deviation from the pixel position such that an upper limit of the deviation is predefined”; the Examiner then introduce Sadasivan to cure the deficiencies of Kim. Sadasivan discloses signal denosing system where E >0 is a predefined tolerance parameter ( see section II subsection A [p][001] ) and an upper bound on the deviation probability ( section II, subsection C, [p][001] ). Thus, Sadasivan teaches “wherein an offset indicates a deviation from the pixel position such that an upper limit of the deviation is predefined”. Further, Kim in combination with Sadasivan fails to expressly disclose “wherein the position value comprises a floating point value”. This limitation was taught by Zhang in [p][0123] which teach “after denoising process and gray level transformation, the log-domain image may be represented by floating-point data”. The Examiner then provided the respective motivations for combinations of references. Thus, the combination of Kim, Sadasivan and Zhang discloses all the limitations of claim 21. Applicant also argues that Sadasivan does not teach “wherein an offset comprises a position value to indicate a deviation from the pixel position of the pixel such that an upper limit of the deviation is predefined, and wherein the position value comprises a floating point value and filter a pixel with a convolutional kernel and pixel values of the deviated pixel positions to obtain a de-noised pixel as recited by claim” ( see page 9 of Remarks ). In response, the Examiner disagrees. First, Sadasivan teaches “wherein an offset comprises a position value to indicate a deviation from the pixel position of the pixel such that an upper limit of the deviation is predefined” as discussed above. Second, Applicant's arguments against the references individually are without merit, since one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller , 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Claims 34 and 39 are similar in scope to claim 1 and the same argument applies to these claims as well. Applicant’s argument with respect to the limitations “prior to generation and wherein the offsets are generated prior to generation of the convolutional kernel” are moot in view of the new rejection. Claim Rejections – Double Patenting Applicant has filed a not terminal disclaimer. Thus, the rejection has not being withdrawn. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 21-22, 24, 33-35, 37-40 and 42-43 are rejected under 35 U.S.C. 103 as being anticipated by Kim et al (NPL titled: Deformable Kernel Networks for Joint Image Filtering) in view of Sadasivan et al (NPL titled: Signal denoising using the minimum-probability-of-error criterion) in view Zhang et al (Pub No.: 20170301095) in view of Singh et al (Pub No.: US20190266479). As to independent claim 21, Kim discloses an apparatus ( deformable kernel network for texture removal – see abstract and section 4.2.2 ) comprising: processing circuitry ( GPU – see section 5, [p][008] ) to: determine a deviated pixel positions based on a pixel position of a pixel and offsets are generated for the pixel and kernel values corresponding to the pixel ( we add a 1 x 1 convolutional layer on top of the feature extraction layer. The resulting two feature maps of size 2k211are combined by element-wise multiplication. The final output contains relative offsets (for x, y positions) from locations on a regular grid – see section 3.2, [p][004] ); and filter a pixel with a convolutional kernel and pixel values of the deviated pixel positions to obtain a de-noised pixel ( [w]e then compute a weighted average using the learned kernel weights and sampling locations computed from the offsets to obtain a residual image. Finally, the filtering result is obtained by combining the residuals with the target image - section 3.1, [p][001] ); however, Kim does not expressly disclose wherein an offset comprise a position indicate a deviation from the pixel position such that an upper limit of the deviation is predefined. Sadasivan discloses signal denosing method including wherein an offset indicates a deviation from the pixel position such that an upper limit of the deviation is predefined ( where E >0 is a predefined tolerance parameter - see section II subsection A, [p][001] and an upper bound on the deviation probability – section II, subsection C, [p][001] ). Kim and Sadasivan are combinable because they are directed to image enhancement. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to have incorporated the signal denosing method of Sadasivan into the deformable kernel network for texture removal of Kim to develop an iterative algorithm to successively refine the cost function and the resulting estimate, starting with the noisy signal as the initialization ( see section I, subsection B, [p][002] ). Such a modification is the result of combining prior art elements according to known methods, they would have performed as expected, and the results would have been predictable. Note the discussion above; the combination of Kim and Sadasivan as a whole fails to teach wherein the position value comprises a floating-point value. Zhang discloses an apparatus enhancing an image including wherein the position value comprises floating point values ( see [p][0123] ). Kim, Sadasivan and Zhang are combinable because they are directed to image enhancement. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to have incorporated the method enhancing an image Zhang into the deformable kernel network for texture removal of Kim as modified by Sadasivan in order to represent the data after denoising and avoid conversion if the data need to be further processed ( see [p][0123] ). Such a modification is the result of combining prior art elements according to known methods, they would have performed as expected, and the results would have been predictable. Note the discussion above; the combination of Kim, Zhang and Sadasivan as a whole fails to teach prior to generation and wherein the offsets are generated prior to generation of the convolutional kernel. Singh teaches deep learning acceleration engine prior to generation and wherein the offsets are generated prior to generation of the convolutional kernel. Kim, Sadasivan and Zhang are combinable because they are directed to image enhancement. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to have incorporated the deep learning acceleration engine of Singh into the deformable kernel network for texture removal of Kim as modified by Sadasivan and Zhang for creating data paths that is solely dedicated to performance of operations that accelerate an activation function represented in the form of a piece-wise second order polynomial approximation. ( see abstract ). Such a modification is the result of combining prior art elements according to known methods, they would have performed as expected, and the results would have been predictable. As to claim 22, Kim teaches the method, further comprising: de-noising an image by a convolutional neural network, wherein the convolutional kernel having the kernel values is generated for the pixel ( a] plausible explanation of why networks trained for denoising depth images work for texture removal is that textures can be considered as patterned noise – see section 4.2.2, [p][002] and two stream CNN is applied to the image to create feature maps - section 3.1, [p][001] and earn spatially-variant kernel weights – see section 3.1, [p][001] and note that spatial sampling offsets are also determined – see section 3.1, [p][001] ), wherein the kernel values are different for at least two pixels associated with the image ([f] or each sub-network, we add a 1 c 1convolutional layer on top of the feature extraction layer. It gives a feature map of size k2 x1c1, where k is the size of the filter kernel, which is used to regress the kernel weights - see section 3.2, [p][003] ), wherein the offsets are generated prior to or simultaneously with the generation of the convolutional kernel ( see Fig 2 – where the weight and offset are generated simultaneously or concurrently ). As to claim 24, Kim teaches the method, wherein filtering the pixel with the convolutional kernel and pixel values of the deviated pixel positions further comprises: applying the kernel values of the convolutional kernel to the pixel values of the deviated pixel positions to obtain a weighted average of the pixel values ( [g]iven the learned kernel K and sampling offsets q, we compute the residuals ^ fp - fp as a weighted average - see section 3.2, [p][005] ). As to claim 33, Kim teaches the apparatus, wherein the processing circuitry is coupled to a memory ( see section 2.2, [p][002] ), the processing circuitry having one or more of graphics processing circuitry ( GPU – see section 5, [p][008] or application processing circuitry. As to independent claim 34, this claim differs from claim 21 only in that claim 21 is apparatus whereas claim 34 is method and additional a computing device are additionally recited. Kim in combination discloses a joint filtering method including a computing device ( Nvidia Titan XP - see section 5, [p][004] ). Therefore, combining Kim and Sadasivan would meet the claim limitations for the same reasons as previously discussed in claim 21 above. Claims 35 and 37-38 are rejected for the same reasons as set forth in the rejection of the claims 22, 24 and 33 as claims 22, 24 and 33 are apparatus claims for the method claimed in claims 35 and 37-38. As to independent claim 39, this claim differs from claim 21 only in that claim 21 is apparatus whereas claim 39 is computer-readable medium and additional elements of instruction and computing device are additionally recited. Kim in combination discloses a joint filtering system including computer-readable medium ( memory - see section 2.2, [p][002] ), instructions ( algorithm – see section 2.1, [p][003] ) and a computing device ( Nvidia Titan XP - see section 5, [p][004] ). Therefore, combining Kim and Sadasivan would meet the claim limitations for the same reasons as previously discussed in claim 21 above. Claims 40 and 42-43 are rejected for the same reasons as set forth in the rejection of the claims 22, 24 and 33 as claims 22, 24 and 33 are apparatus claims for the computer-readable medium claimed in claims 40 and 42-43. Double Patenting 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 08-34 AIA Claim s 21-22, 24, 33-35, 37-40 and 42-43 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 1-11 of U.S. Patent No. 11869171 . Although the claims at issue are not identical, they are not patentably distinct from each other because patent claim 1 requires the additional step of “compute hardware engine coupled to the data storage, the compute hardware engine to denoise the image by a convolutional neural network, the compute hardware engine to: for each of the plurality of pixels of the image, generate a convolutional kernel having a plurality of kernel values for the pixel;”, not required by claim 21. However, the conflicting claims are not patentably distinct from each other because: ·Claims 1-11 and 21-22, 24, 33-35, 37-40 and 42-43 recite common subject matter; ·Whereby claim 21, which recites the open ended transitional phrase “comprising”, does not preclude the additional elements recited by patent claim 1, and ·Whereby the elements of claim 21 are fully anticipated by patent claim 1 and anticipation is “the ultimate or epitome of obviousness” (In re Kalm, 154 USPQ 10 (CCPA 1967), also In re Dailey, 178 USPQ 293 (CCPA 1973) and In re Pearson, 181 USPQ 641 (CCPA 1974)). Instant Claims US Patent No.: 11869171 21 . An apparatus comprising: processor circuitry to: (Clm 4, 10) An apparatus comprising: a data storage to store data including an image, the image including a plurality of pixels; and a compute hardware engine coupled to the data storage, the compute hardware engine to denoise the image by a convolutional neural network, the compute hardware engine to: for each of the plurality of pixels of the image, generate a convolutional kernel having a plurality of kernel values for the pixel; determine deviated pixel positions based on a pixel position of a pixel and offsets corresponding to the pixel, wherein the offsets are generated for the pixel and kernel values corresponding to the pixel, wherein an offset comprises a position value to indicate a deviation from the pixel position of the pixel such that an upper limit of the deviation is predefined, and wherein the position value comprises a floating point value determine a plurality of deviated pixel positions based on the pixel position of the pixel and the plurality of offsets, and filter a pixel with a convolutional kernel and pixel values of the plurality of deviated pixel positions to obtain a de-noised pixel. and filter the pixel with the convolutional kernel and pixel values of the plurality of deviated pixel positions to obtain a de-noised pixel. 22 . The apparatus of claim 21, wherein the processor circuitry is further to: de-noise an image by a convolutional neural network, the image including a plurality of pixels; for each of the plurality of pixels associated with the image, generate the convolutional kernel having a plurality of kernel values for the pixel; and generate the plurality of offsets for the pixel respectively corresponding to the plurality of kernel values, wherein an offset indicates a deviation from the pixel position of the pixel. (claim 4, 10) generate a plurality of offsets for the pixel respectively corresponding to the plurality of kernel values, each of the plurality of offsets to indicate a deviation from a pixel position of the pixel, wherein an upper limit of the deviation is predefined ; generate a plurality of offsets for the pixel respectively corresponding to the plurality of kernel values, each of the plurality of offsets to indicate a deviation from a pixel position of the pixel, wherein an upper limit of the deviation is predefined; (clm 4, 10) wherein an offset of the plurality of offsets comprises a position value to indicate the deviation from the pixel position of the pixel, wherein the position value comprises floating point values, wherein the plurality of kernel values are different for at least two pixels of the image (clam 5, 11) The apparatus of claim 4, wherein the plurality of offsets are different for at least two pixels of the image, wherein the plurality of offsets are generated prior to or simultaneously with the generation of the convolutional kernel. 24 . The apparatus of claim 21, wherein filtering the pixel with the convolutional kernel and pixel values of the plurality of deviated pixel positions further causes the processor circuitry to: apply the plurality of kernel values of the convolutional kernel to the pixel values of the plurality of deviated pixel positions to obtain a weighted average of the pixel values. (clm 6) The apparatus of claim 4, wherein the filtering the pixel with the convolutional kernel and pixel values of the plurality of deviated pixel positions comprises: applying the plurality of kernel values of the convolutional kernel to the pixel values of the plurality of deviated pixel positions to obtain a weighted average of the pixel values 33 34 35 37 38 39 40 42 Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. BOESCH et al (Pub No.: US20180189215 ) discloses a reconfigurable stream switch formed in an integrated circuit. The stream switch includes a plurality of output ports, a plurality of input ports, and a plurality of selection circuits. The output ports each have an output port architectural composition, and each is arranged to unidirectionally pass output data and output control information. The input ports each have an input port architectural composition, and each is arranged to unidirectionally receive first input data and first input control information. Each one of the selection circuits is coupled to an associated one of the output ports. Each selection circuit is further coupled to all of the input ports such that each selection circuit is arranged to reconfigurably couple its associated output port to no more than one input port at any given time. BOESCH et al (Pub No.: US20210073450 ) discloses a systems, methods, and computer-readable media for context-aware synthesis for video frame interpolation are provided. A convolutional neural network (ConvNet) may, given two input video or image frames, interpolate a frame temporarily in the middle of the two input frames by combining motion estimation and pixel synthesis into a single step and formulating pixel interpolation as a local convolution over patches in the input images. The ConvNet may estimate a convolution kernel based on a first receptive field patch of a first input image frame and a second receptive field patch of a second input image frame. The ConvNet may then convolve the convolutional kernel over a first pixel patch of the first input image frame and a second pixel patch of the second input image frame to obtain color data of an output pixel of the interpolation frame. Other embodiments may be described and/or claimed. Inquiries Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRAE S ALLISON whose telephone number is (571)270-1052. The examiner can normally be reached on Monday-Friday 9am-5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chineyere Wills-Burns, can be reached on (571) 272-9752. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANDRAE S ALLISON/Primary Examiner, Art Unit 2673 May 16, 2026 Application/Control Number: 18/514,252 Page 2 Art Unit: 2673 Application/Control Number: 18/514,252 Page 3 Art Unit: 2673 Application/Control Number: 18/514,252 Page 4 Art Unit: 2673 Application/Control Number: 18/514,252 Page 5 Art Unit: 2673 Application/Control Number: 18/514,252 Page 6 Art Unit: 2673 Application/Control Number: 18/514,252 Page 7 Art Unit: 2673 Application/Control Number: 18/514,252 Page 8 Art Unit: 2673 Application/Control Number: 18/514,252 Page 9 Art Unit: 2673 Application/Control Number: 18/514,252 Page 10 Art Unit: 2673 Application/Control Number: 18/514,252 Page 11 Art Unit: 2673 Application/Control Number: 18/514,252 Page 12 Art Unit: 2673 Application/Control Number: 18/514,252 Page 13 Art Unit: 2673 Application/Control Number: 18/514,252 Page 14 Art Unit: 2673 Application/Control Number: 18/514,252 Page 15 Art Unit: 2673 Application/Control Number: 18/514,252 Page 16 Art Unit: 2673 Application/Control Number: 18/514,252 Page 17 Art Unit: 2673 Application/Control Number: 18/514,252 Page 18 Art Unit: 2673 Application/Control Number: 18/514,252 Page 19 Art Unit: 2673 Application/Control Number: 18/514,252 Page 20 Art Unit: 2673
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