Prosecution Insights
Last updated: July 17, 2026
Application No. 18/514,502

Server System Low Profile Connector System

Final Rejection §103
Filed
Nov 20, 2023
Examiner
KRATT, JUSTIN M
Art Unit
2831
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Dell Products L.P.
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
579 granted / 666 resolved
+18.9% vs TC avg
Moderate +5% lift
Without
With
+5.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
31 currently pending
Career history
704
Total Applications
across all art units

Statute-Specific Performance

§103
73.2%
+33.2% vs TC avg
§102
7.6%
-32.4% vs TC avg
§112
19.0%
-21.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 666 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claims 3, 9, and 15 are objected to because of the following informalities: in claim 3 line 3, the phrase “printed circuit boards” should read --printed circuit board--. In claim 9 line 3, the phrase “the connector pad” should read --the connector pad portion--. In claim 9 line 4, the phrase “the printed circuit boards” should read --the printed circuit board--. In claim 15 line 3, the phrase “the connector pad” should read --the connector pad portion--. In claim 15 line 4, the phrase “the printed circuit boards” should read --the printed circuit board--. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5, 7-11, and 13-17 are rejected under 35 U.S.C. 103 as being unpatentable over Regnier et al. (2006/0009080) in view of Poh et al. (2008/0096412). With regard to claim 1, Regnier teaches, as shown in figures 20-23: “A low profile connector 500 for use with a low profile connector system, comprising: a connector housing 504, the connector housing 504 defining a card insertion portion (where 556 is received in 505 in figure 20), the card insertion portion being positioned along an edge of a printed circuit board 501… and wherein the connector housing 504 is mounted to the printed circuit board 501 at a specifically configured connector mounting position (shown in figure 20) to allow insertion of a double sided peripheral card 556 into the card insertion portion”. That embodiment of Regnier does not specifically teach “a connector datum contained within the connector housing, the connector datum extending from one interior side of the connector housing to another interior side of the connector housing”. However, Regnier also teaches, in the embodiment shown in figures 15-16: “a connector datum (right end of 210 in figure 16) contained within the connector housing 201, the connector datum extending from one interior side 211 of the connector housing to another interior side 212 of the connector housing 201”. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine these features with the above embodiment of Renier in order to provide structural integrity of the connector housing while retaining the terminals (Regnier, paragraph 62). Regnier also does not specifically teach: “the double sided peripheral card having components mounted on a top side of the double sided peripheral card and components mounted on a bottom side of the double sided peripheral card”. In the same field of endeavor before the effective filing date of the claimed invention, Poh teaches, as shown in figure 9 and taught in paragraph 43: “the double sided peripheral card 58 having components 55 mounted on a top side of the double sided peripheral card 58 and components 56 mounted on a bottom side of the double sided peripheral card 58”. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the features of Poh with the invention of Regnier in order to have a larger area to mount components on the card (Poh, paragraph 43). With regard to claim 2, Regnier as modified by Poh teaches: “The low profile connector of claim 1”, as shown above. Regnier also teaches, as shown in figures 20-23 and taught in paragraph 73: “wherein: the specifically configured connector mounting position is configured such that a distance from the connector datum to an edge of the printed circuit board 501 is optimized to allow insertion of a double sided peripheral card 556 into the card insertion portion”. With regard to claim 3, Regnier as modified by Poh teaches: “The low profile connector of claim 1”, as shown above. Regnier also teaches, as shown in figures 20-23: “further comprising: a connector pad portion (area where terminals 505 connect to 501 in figure 23), the connector pad comprising connector pads (where each individual terminal 505 connects to 501 in figure 23) associated with the printed circuit boardS 501, corresponding to a specifically configured connector pad size dimension (the figures show the pads having a specific lead dimension)”. With regard to claim 4, Regnier as modified by Poh teaches: “The low profile connector of claim 1”, as shown above. Regnier also teaches, as shown in figures 20-23: “further comprising: a connector front lead portion (right end of 500 in figure 23), the connector front lead portion comprising connector front leads (where 505 connect to 550 in figure 20) mounted on the printed circuit board501, the connector pads corresponding to a specifically configured front lead dimension (the figures show the leads having a specific lead dimension)”. With regard to claim 5, Regnier as modified by Poh teaches: “The low profile connector of claim 1”, as shown above. Regnier also teaches, as shown in figures 20-23 and taught in paragraph 4: “wherein: the low profile connector 500 corresponds to a low profile specification (taught in paragraph 4)”. With regard to claim 7, Regnier teaches, as shown in figures 20-23: “A low profile connector system comprising: a printed circuit board 501; and, a low profile connector 500 mounted on the printed circuit board 501, the low profile connector 500 comprising: a connector housing 504, the connector housing 504 defining a card insertion portion (where 556 is received in 505 in figure 20), the card insertion portion being positioned along an edge of the printed circuit board 501… and wherein the connector housing 504 is mounted to the printed circuit board 501 at a specifically configured connector mounting portion to allow insertion of a double sided peripheral card 556 into the card insertion portion”. That embodiment of Regnier does not specifically teach: “a connector datum contained within the connector housing, the connector datum extending from one interior side of the connector housing to another interior side of the connector housing”. However, Regnier also teaches, in the embodiment shown in figures 15-16: “a connector datum (right end of 210 in figure 16) contained within the connector housing 201, the connector datum extending from one interior side 211 of the connector housing to another interior side 212 of the connector housing 201”. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine these features with the above embodiment of Renier in order to provide structural integrity of the connector housing while retaining the terminals (Regnier, paragraph 62). Regnier also does not specifically teach: “the double sided peripheral card having components mounted on a top side of the double sided peripheral card and components mounted on a bottom side of the double sided peripheral card”. In the same field of endeavor before the effective filing date of the claimed invention, Poh teaches, as shown in figure 9 and taught in paragraph 43: “the double sided peripheral card 58 having components 55 mounted on a top side of the double sided peripheral card 58 and components 56 mounted on a bottom side of the double sided peripheral card 58”. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine the features of Poh with the invention of Regnier in order to have a larger area to mount components on the card (Poh, paragraph 43). With regard to claim 8, Regnier as modified by Poh teaches: “The low profile connector of claim 7”, as shown above. Regnier also teaches, as shown in figures 20-23 and taught in paragraph 73: “wherein: the specifically configured connector mounting position is configured such that a distance from the connector datum to an edge of the printed circuit board 501 is optimized to allow insertion of a double sided peripheral card 556 into the card insertion portion”. With regard to claim 9, Regnier as modified by Poh teaches: “The low profile connector of claim 8”, as shown above. Regnier also teaches, as shown in figures 20-23: “wherein the low profile connector 500 further comprising: a connector pad portion (area where terminals 505 connect to 501 in figure 23) associated with the printed circuit board 501, the connector pad comprising connector pads (where each individual terminal 505 connects to 501 in figure 23) mounted on the printed circuit boards 501, the connector pads corresponding to a specifically configured connector pad size dimension (the figures show the pads having a specific lead dimension)”. With regard to claim 10, Regnier as modified by Poh teaches: “The low profile connector of claim 7”, as shown above. Regnier also teaches, as shown in figures 20-23: “wherein the low profile connector 500 further comprising: a connector front lead portion (right end of 500 in figure 23), the connector front lead portion comprising connector front leads (where 505 connect to 550 in figure 20) corresponding to a specifically configured front lead dimension (the figures show the leads having a specific lead dimension)”. With regard to claim 11, Regnier as modified by Poh teaches: “The low profile connector of claim 7”, as shown above. Regnier also teaches, as shown in figures 20-23 and taught in paragraph 4: “wherein: the low profile connector 500 corresponds to a low profile specification (taught in paragraph 4)”. With regard to claim 13, Regnier teaches: “A system comprising… a low profile connector system, the low profile connector system comprising: a printed circuit board 501; and, a low profile connector 500 mounted on the printed circuit board 501, the low profile connector 500 comprising: a connector housing 504, the connector housing 504 defining a card insertion portion (where 556 is received in 505 in figure 20), the card insertion portion being positioned along an edge of the printed circuit board 501… and wherein the connector housing 504 is mounted to the printed circuit board 501 at a specifically configured connector mounting portion to allow insertion of a double sided peripheral card 556 into the card insertion portion”. That embodiment of Regnier does not specifically teach: “a connector datum contained within the connector housing, the connector datum extending from one interior side of the connector housing to another interior side of the connector housing”. However, Regnier also teaches, in the embodiment shown in figures 15-16: “a connector datum (right end of 210 in figure 16) contained within the connector housing 201, the connector datum extending from one interior side 211 of the connector housing to another interior side 212 of the connector housing 201”. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to combine these features with the above embodiment of Renier in order to provide structural integrity of the connector housing while retaining the terminals (Regnier, paragraph 62). Regnier does not specifically teach the system comprising “a processor; a data bus coupled to the processor” or “the double sided peripheral card having components mounted on a top side of the double sided peripheral card and components mounted on a bottom side of the double sided peripheral card”. In the same field of endeavor before the effective filing date of the claimed invention, Poh teaches, as shown in figure 9 and taught in paragraphs 5 and 43: “a processor; a data bus coupled to the processor (paragraph 5 teaches the system comprising a computer, which would inherently contain a processor and data bus)… the double sided peripheral card 58 having components 55 mounted on a top side of the double sided peripheral card 58 and components 56 mounted on a bottom side of the double sided peripheral card 58”. With regard to claim 14, Regnier as modified by Poh teaches: “The low profile connector of claim 13”, as shown above. Regnier also teaches, as shown in figures 20-23 and taught in paragraph 73: “wherein: the specifically configured connector mounting position is configured such that a distance from the connector datum to an edge of the printed circuit board 501 is optimized to allow insertion of a double sided peripheral card 556 into the card insertion portion”. With regard to claim 15, Regnier as modified by Poh teaches: “The low profile connector of claim 13”, as shown above. Regnier also teaches, as shown in figures 20-23: “wherein the low profile connector 500 further comprising: a connector pad portion (area where terminals 505 connect to 501 in figure 23), the connector pad comprising connector pads (where each individual terminal 505 connects to 501 in figure 23) mounted on the printed circuit boards 501, the connector pads corresponding to a specifically configured connector pad size dimension (the figures show the pads having a specific lead dimension)”. With regard to claim 16, Regnier as modified by Poh teaches: “The low profile connector of claim 13”, as shown above. Regnier also teaches, as shown in figures 20-23: “wherein the low profile connector 500 further comprising: a connector front lead portion (right end of 500 in figure 23), the connector front lead portion comprising connector front leads (where 505 connect to 550 in figure 20) corresponding to a specifically configured front lead dimension (the figures show the leads having a specific lead dimension)”. With regard to claim 17, Regnier as modified by Poh teaches: “The low profile connector of claim 13”, as shown above. Regnier also teaches, as shown in figures 20-23 and taught in paragraph 4: “wherein: the low profile connector 500 corresponds to a low profile specification (taught in paragraph 4)”. Claims 6, 12, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Regnier et al. (2006/0009080) in view of Poh et al. (2008/0096412) and Zhao et al. (TWM628001U). With regard to claim 6, Regnier in view of Poh teaches: “The low profile connector system of claim 5”, as shown above. Regnier also teaches as shown in figures 20-23 and taught in paragraph 4: “wherein: the low profile specification comprises a… low profile specification”. Neither Regnier nor Poh teach the specification “comprises a PCI Express M.2”. In the same field of endeavor before the effective filing date of the claimed invention, Zhao teaches, as taught on page 2 lines 36-37 of the translation, the specification of the connector “comprises a PCI Express M.2”. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to form the low profile connector as a PCI Express M.2 in order to connect to an M.2 module transmitting PCI-EXPRESS signals (Zhao, translation page 2 lines 36-37). With regard to claim 12, Regnier as modified by Poh teaches: “The low profile connector system of claim 11”, as shown above. Regnier also teaches as shown in figures 20-23 and taught in paragraph 4: “wherein: the low profile specification comprises a… low profile specification”. Neither Regnier nor Poh teach the specification “comprises a PCI Express M.2”. In the same field of endeavor before the effective filing date of the claimed invention, Zhao teaches, as taught on page 2 lines 36-37 of the translation, the specification of the connector “comprises a PCI Express M.2”. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to form the low profile connector as a PCI Express M.2 in order to connect to an M.2 module transmitting PCI-EXPRESS signals (Zhao, translation page 2 lines 36-37). With regard to claim 18, Regnier as modified by Poh teaches: “The low profile connector system of claim 17”, as shown above. Regnier also teaches as shown in figures 20-23 and taught in paragraph 4: “wherein: the low profile specification comprises a… low profile specification”. Neither Regnier nor Poh teach the specification “comprises a PCI Express M.2”. In the same field of endeavor before the effective filing date of the claimed invention, Zhao teaches, as taught on page 2 lines 36-37 of the translation, the specification of the connector “comprises a PCI Express M.2”. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to form the low profile connector as a PCI Express M.2 in order to connect to an M.2 module transmitting PCI-EXPRESS signals (Zhao, translation page 2 lines 36-37). Response to Arguments Applicant’s arguments with respect to claims 1, 7, and 13 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUSTIN M KRATT whose telephone number is (571)270-0277. The examiner can normally be reached M-F 9am-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Abdullah A Riyami can be reached at (571)270-3119. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JUSTIN M KRATT/Primary Examiner, Art Unit 2831
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Prosecution Timeline

Nov 20, 2023
Application Filed
Jan 16, 2026
Non-Final Rejection mailed — §103
Apr 14, 2026
Response Filed
Jul 02, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12683328
ELECTRICAL CONNECTOR WITH FIXED HOUSING, FLOATING HOUSING, ELASTIC TERMINAL MOUNTED THEREIN AND ELECTRICAL CONNECTOR ASSEMBLY USING THE SAME
2y 10m to grant Granted Jul 14, 2026
Patent 12676442
ELECTROMAGNETIC SHIELDING FOR A PRINTED CIRCUIT BOARD CONNECTOR
2y 11m to grant Granted Jul 07, 2026
Patent 12671200
MIDBOARD CABLE TERMINATION ASSEMBLY
4y 6m to grant Granted Jun 30, 2026
Patent 12671195
ELECTRICAL CARD CONNECTOR
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Patent 12660851
CONTAINER FOR AEROSOLISABLE MATERIAL AND DEVICE USING THE SAME
4y 10m to grant Granted Jun 23, 2026
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Prosecution Projections

3-4
Expected OA Rounds
87%
Grant Probability
92%
With Interview (+5.4%)
2y 0m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 666 resolved cases by this examiner. Grant probability derived from career allowance rate.

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