DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 3/31/2026 have been fully considered but they are not persuasive.
While applicant is correct that the interpretation of the prior art reference US 20220384516 A1 (Tan et al) as it was presented in the Office action mailed 3/19/2026 would not satisfy the claims as they are currently amended due to new limitations added via amendment, an alternative interpretation of the Tan reference to designate a “second metal layer” portion of layer 1170 such that it overlaps a portion of p-type layer 1130 and does not extend below p-type layer 1130 satisfies all of the claimed limitations (see rejection of claim 1 below for additional information).
Applicant’s amendment to claim 11 has remedied the issue leading to that claim’s rejection under 35 U.S.C. 112(b), which is hereby withdrawn.
Applicant’s amendment to FIG. 7 is acceptable.
Applicant’s observation of a typographical error in the citation of US patent publication US 20130069095 A1 (Hodota) is appreciated, and corrected in the present Office action.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 3-11, and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US patent publication US 20220384516 A1 (Tan et al hereinafter Tan).
Regarding claim 1, Tan discloses a light emitting device (the device of FIG. 11 ¶ [0023]) comprising: a p-doped semiconductor (FIG. 11, second semiconductor layer 1130 is p-doped ¶ [0128]), an active layer (FIG. 11, active layer 1120 ¶ [0128]), and an n-doped semiconductor (FIG. 11, first semiconductor layer 1110 is n-doped and coupled to layer 1130 through active layer 1120 ¶ [0128]) coupled to the p-doped semiconductor through the active layer; one or more first transparent conductive oxide (TCO) layers (FIG. 11, contact layer 1140 is transparent conductive oxide ITO and directly contacts p-doped layer 1130 ¶ [0129]) directly contacting the p-doped semiconductor; one or more first metal layers each directly contacting at least one of the one or more first TCO layers (FIG. 11, metal layer 1150 directly contacts layer 1140 ¶ [0129]);
one or more second TCO layers (FIG. 11, low index conductive material 1162 may be ITO, which is a TCO ¶ [0131]) comprising a contact region directly contacting the n-doped semiconductor (FIG. 11, a region of material 1162 directly contacts layer 1110) and a second region (FIG. 11, portions of material 1162 not directly contacting layer 1110 form a second region that extends outside the contact region) extending outside the contact region, the one or more second TCO layers spaced apart from and overlapping the one or more first TCO layers in a vertical direction (FIG. 11, material 1162 is spaced apart from and includes an overlap region over contact layer 1140); and one or more second metal layers (annotated FIG. 11 below, the emphasized upper portions of metal layer 1170 directly contacts material 1162, and is considered to represent the claimed one or more second metal layers ¶ [0132]) each directly contacting at least one of the one or more second TCO layers, the one or more second metal layer overlapping the p-doped semiconductor in the vertical direction (annotated FIG. 11, the emphasized upper portions of metal layer 1170 overlap the inclined sidewalls of p-doped layer 1130) without extending below the p-doped semiconductor in the vertical direction (annotated FIG. 11, the emphasized upper portions of metal layer 1170 do not extend below p-doped layer 1130).
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Regarding claim 3, Tan discloses the limitations of claim 1 as detailed above, and further discloses that the one or more first metal layers do not overlap the one or more second metal layers (annotated FIG. 11 above, the emphasized portions of metal layer 1170 do not overlap metal layer 1150).
Regarding claim 4, Tan discloses the limitations of claim 1 as detailed above, and further discloses that the one or more first metal layers are spaced apart from each of the one or more second metal layers (FIG. 11, metal layers 1150 and 1170 are spaced apart from each other).
Regarding claim 5, Tan discloses the limitations of claim 4 as detailed above, and further discloses that the one or more second metal layers directly contact the one or more second TCO layers above a surface of the n-doped semiconductor (annotated FIG. 11 above, metal layer 1170 emphasized portion directly contacts ITO material 1162 at positions vertically overlapping n-doped semiconductor layer 1110).
Regarding claim 6, Tan discloses the limitations of claim 1 as detailed above, and further discloses that the one or more second metal layers do not directly contact the n-doped semiconductor (FIG. 11, metal layer 1170 does not directly contact n-doped semiconductor layer 1110).
Regarding claim 7, Tan discloses the limitations of claim 1 as detailed above, and further discloses that the one or more second metal layers do not directly contact the p-doped semiconductor (FIG. 11, metal layer 1170 does not directly contact p-doped semiconductor layer 1130).
Regarding claim 8, Tan discloses the limitations of claim 1 as detailed above, and further discloses that the one or more second TCO layers comprises indium tin oxide (low index conductive material 1162 may be ITO ¶ [0131]).
Regarding claim 9, Tan discloses the limitations of claim 1 as detailed above, and further discloses a first insulating layer (FIG. 11, dielectric layer 1160 ¶ [0130]) upon which the one or more second TCO layers is disposed (FIG. 11, low index conductive material 1162 is disposed on dielectric layer 1160).
Regarding claim 10, Tan discloses the limitations of claim 9 as detailed above, and further discloses that the first insulating layer extends over the p-doped semiconductor (FIG. 11, dielectric layer 1160 extends over p-doped semiconductor layer 1130).
Regarding claim 11, Tan discloses the limitations of claim 9 as detailed above, and further discloses that the first insulating layer (FIG. 11, dielectric layer 1160 ¶ [0130]) directly contacts a surface of the n-doped semiconductor (FIG. 11, dielectric layer 1160 directly contacts an upper surface of n-doped semiconductor layer 1110).
Regarding claim 17, Tan discloses the limitations of claim 1 as detailed above, and further discloses a distributed bragg reflector (DBR) on the one or more second TCO layers (while not illustrated in the figures, a DBR may be formed on low conductive index material 1162, between material 1162 and metal layer 1170 ¶ [0136]).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 2 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over US 20220384516 A1 (Tan et al hereinafter Tan) as applied to claim 1 above, and further in view of obvious modifications to the disclosure of Tan.
Regarding claim 2, Tan discloses the limitations of claim 1 as detailed above, but did not explicitly state that the one or more first metal layers comprise a same material as the one or more second metal layers (metal layer 1170 may be formed of aluminum (Al), silver (Ag), gold (Au), platinum (Pt), titanium (Ti), or copper (Cu) ¶ [0132]); suitable materials for the first metal layers 1150 not being listed.
However, a related embodiment of Tan (the embodiment of FIGS. 14A-14H ¶ [0026]) discloses one or more first metal layers (FIG. 14A, metal layer 1450 ¶ [0162]) disposed directly on a transparent conductive oxide layer (FIG. 14A, contact layer 1440 may be ITO ¶ [0162]), wherein the one or more first metal layers may be formed of Al, Pt, Au, Ag, Ni, Ti, Cu, or W (¶ [0162]). Since metal layer 1450 is provided in an analogous position in the FIG. 14A-14H embodiment as metal layer 1150 is provided in the FIG. 11 embodiment, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to select the material of the one or more first metal layers based on the materials listed for metal layer 1450 in the FIGS. 14A-14H embodiment, e.g. forming metal layer 1150 from one of Al, Pt, Au, Ag, Ti, or Cu and having it comprise a same material as the one or more second metal layers, in order to provide a material for the one or more first metal layers known in the art, which may prove beneficial in view of consideration of materials costs and changing market conditions.
Regarding claim 18, Tan discloses the limitations of claim 17 as detailed above, but does not further disclose that the DBR is disposed on the one or more first TCO layers in the context of the embodiment of FIG. 11. However, Tan discloses a related embodiment (FIG. 13), wherein a DBR (FIG. 13, DBR 1365, ¶ [0148]) is disposed on one or more first TCO layer (FIG. 13, contact layers 1340 may be ITO ¶ [0150], and DBR 1365 is disposed vertically above them). A person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to configure the DBR described in ¶ [0136] as described regarding claim 17 above in view of the embodiment of FIG. 13, in order to provide a DBR wherein the DBR covers sidewalls of and parts of the upper surface of the diode mesas to adjust the optical properties in the device in a beneficial manner (e.g. causing “constructive interference between light reflected at the interfaces between the layers of the DBR to achieve high reflectivity for a particular wavelength band and/or other optical properties” ¶ [0154]).
Claims 12 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Tan as applied to claim 1 above, and further in view of US patent publication US 20170288088 A1 (Seo Won Cheol hereinafter Cheol).
Regarding claim 12, Tan discloses the limitations of claim 1 as detailed above, but did not disclose a bonding structure on the one or more second metal layers, details regarding further interconnections on metal layers 1170 not being emphasized in their disclosure.
However, Cheol discloses an LED device (the device of FIGS. 43A-43B) comprising a bonding structure (FIG. 43A, first electrode pad 239a’ ¶ [0240]) on one or more second metal layers (FIG. 43B, first contact layer 235a’ ¶ [0240]; while the FIG. 43B cross section doesn’t illustrate the contact, it is stated to be present in ¶ [0240]), wherein the second metal layers are connected to a n-doped semiconductor region (FIG. 43B, first conductive type upper semiconductor layer 225 may be n-type ¶ [0189, 0068]) at the periphery of a mesa structure. Cheol also notes that electrode pads are electrically connected to lead terminals (¶ [0004]), which a person of ordinary skill in the art would recognize as suitable structures for providing power to the LED device.
Tan and Cheol both pertain to the field of semiconductor LED devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Tan in view of Cheol to include a bonding structure on the one or more second metal layers, in order to provide a path of electrical current from an external structure such as a lead terminal to the LED structure.
Regarding claim 14, Tan in view of Cheol discloses the limitations of claim 12 as detailed above, and Tan further discloses a second bonding structure (Tan FIG. 11, metal plugs 1190 are located on metal layers 1150 ¶ [0134]) on the one or more first metal layers.
Claims 13 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Tan in view of Cheol as applied to claim 12 above, and further in view of US patent publication US 20130069095 A1 (Hodota).
Regarding claim 13, Tan in view of Cheol disclose the limitations of claim 12 as detailed above, but they do not explicitly teach that the bonding structure comprises a different material from the one or more second metal layers, on account of Cheol not listing suitable materials for the bonding structure as that was not a factor of particular emphasis to the disclosure of their invention. Tan did suggest a number of materials for the one or more second metal layers (suitable materials for metal layers 1170 are listed in Tan ¶ [0132]).
However, Hodota discloses an LED structure (the structure of FIG. 3) wherein a bonding structure (FIG. 3, first bonding layer 316 ¶ [0094]) connected (through intermediate diffusion and reflective layers 311-315) to an n-type semiconductor region (FIG. 3, n-type semiconductor layer 140 ¶ [0031]) is formed of gold (Au) (¶ [0185]).
Tan, Cheol, and Hodota all pertain to the field of semiconductor LED devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Tan in view of Cheol further in view of Hodota such that the bonding structure is formed of gold (Au). Having done so, the one or more second metal layers may be formed of another of the listed materials of Tan, e.g. silver (Ag), in order to provide electrical connection to the n-doped semiconductor layer using materials known in the art, such selection of materials being suitable based on materials costs and/or changing market conditions. Having done so, the bonding structure comprises a different material from the one or more second metal layers.
Regarding claim 15, Tan in view of Cheol disclose the limitations of claim 12 as detailed above, but they do not explicitly teach an electrical contact on the bonding structure comprising a different material from the bonding structure, details regarding additional contact structures on the bonding structure not being emphasized in the disclosure of Cheol, and Cheol not listing suitable materials for the bonding structure as that was not a factor of particular emphasis to the disclosure of their invention.
However, a related embodiment (FIG. 29) of Cheol discloses an electrical contact (FIG. 29, first bump 250a ¶ [0205]) on a bonding structure (FIG. 29, first electrode pad 239a, which is analogous to the bonding structure 239a’ of the FIG. 43 A/B embodiment ¶ [0186]), the electrical contact being formed of, for example, AuSn or NiSn (¶ [0205]), though a material of electrode pad 239a is not explicitly provided.
Further, Hodota discloses an LED structure (the structure of FIG. 3) wherein a bonding structure (FIG. 3, first bonding layer 316 ¶ [0094]) connected (through intermediate diffusion and reflective layers 311-315) to an n-type semiconductor region (FIG. 3, n-type semiconductor layer 140 ¶ [0031]) is formed of gold (Au) (¶ [0185]), and Hodota further comprises an electrical contact (FIG. 3, solder 20 is formed on bonding layer 316 ¶ [0100]) on the bonding structure comprising a different material from the bonding structure (while some solders may contain gold, solder is understood to be an alloy, therefore including a material different from gold).
Tan, Cheol, and Hodota all pertain to the field of semiconductor LED devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Tan in view of Cheol further in view of Hodota such that the bonding structure is formed of gold (Au) and the electrical contact is formed of an alloy such as AuSn or NiSn (as suggested by Cheol and Hodota). Having done so, the device includes an electrical contact on the bonding structure comprising a different material from the bonding structure, which may be found beneficial after consideration of materials costs and changing market conditions.
Regarding claim 16, Tan in view of Cheol disclose the limitations of claim 12 as detailed above, but they do not explicitly teach that the one or more second metal layers have a higher reflectivity than the bonding structure, on account of Cheol not listing suitable materials for the bonding structure as that was not a factor of particular emphasis to the disclosure of their invention; a comparison of reflectivity not being explicitly taught. Tan did suggest a number of materials for the one or more second metal layers (suitable materials for metal layers 1170 are listed in Tan ¶ [0132], silver/Ag being one of them).
However, Hodota discloses an LED structure (the structure of FIG. 3) wherein a bonding structure (FIG. 3, first bonding layer 316 ¶ [0094]) connected (through intermediate diffusion and reflective layers 311-315) to an n-type semiconductor region (FIG. 3, n-type semiconductor layer 140 ¶ [0031]) is formed of gold (Au) (¶ [0185]).
Tan, Cheol, and Hodota all pertain to the field of semiconductor LED devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Tan in view of Cheol further in view of Hodota such that the bonding structure is formed of gold (Au). Having done so, the one or more second metal layers may be formed of another of the listed materials of Tan, e.g. silver (Ag), in order to provide electrical connection to the n-doped semiconductor layer using materials known in the art, such selection of materials being suitable based on materials costs and/or changing market conditions. Having done so, the one or more second metal layers have a higher reflectivity than the bonding structure, since silver (the material of the one or more second metal layers) is known to have very high reflectivity for a metal (Applicant’s specification ¶ [0050] corroborates silver’s high reflectivity).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Tan as applied to claim 1 above, and further in view of US patent publication US 20240421261 A1 (Oh et al hereinafter Oh).
Tan discloses the limitations of claim 1 as detailed above, but the embodiment of FIG. 11 did not further disclose that each of the one or more first metal layers directly contacts at least one of the one or more first TCO layers in a total contact area smaller than an entire area of that respective one or more first metal layers, and each of the one or more second metal layer directly contacts at least one of the one or more second TCO layers in a total contact area smaller than an entire area of the one or more second metal layers.
Regarding the limitation “each of the one or more second metal layer directly contacts at least one of the one or more second TCO layers in a total contact area smaller than an entire area of the one or more second metal layers”, Tan does disclose a related embodiment (FIG. 13), wherein a DBR (FIG. 13, DBR 1365, ¶ [0148]) is disposed beneath the one or more second metal layer (FIG. 13, metal layers 1370 ¶ [0147]) such that the one or more second metal layer directly contacts at least one of the one or more second TCO layers (FIG. 13, low index conductive material 1362 ¶ [0148]; TCO are used as low index conductive materials per ¶ [0131]) in a total contact area smaller than an entire area of the one or more second metal layers (FIG. 13, metal plug 1372 of metal layer 1370 is a total contact area smaller than an entire lower-facing surface area of metal layer 1370 ¶ [0155]). A person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Tan to provide a DBR wherein the DBR covers sidewalls of and parts of the upper surface of the diode mesas to adjust the optical properties in the device in a beneficial manner (e.g. causing “constructive interference between light reflected at the interfaces between the layers of the DBR to achieve high reflectivity for a particular wavelength band and/or other optical properties” ¶ [0154]), as the configuration of FIG. 13 demonstrates. Having done so, each of the one or more second metal layer directly contacts at least one of the one or more second TCO layers in a total contact area smaller than an entire area of the one or more second metal layers.
Tan does not further disclose that each of the one or more first metal layers directly contacts at least one of the one or more first TCO layers in a total contact area smaller than an entire area of that respective one or more first metal layers. However, Oh discloses an LED device (the device of FIGS. 1A-3) wherein each of one or more first metal layers (FIG. 3, metal reflection layer 31 ¶ [0077]) directly contacts at least one of one or more first TCO layers (FIG. 3, ohmic contact layer 28 may be a transparent conductive oxide such as ITO ¶ [0074]) in a total contact area smaller than an entire area of that respective one or more first metal layers (FIG. 3, the total contact area between metal reflection layer 31 and ohmic contact layer 28 is smaller than an entire lower surface area of metal reflection layer 31); this is due to the inclusion of a dielectric layer (FIG. 3, dielectric layer 29a ¶ [0075]) which Oh teaches improves the reflection of light, and correspondingly the luminous efficiency in the device (¶ [0082]).
Tan and Oh both pertain to the field of semiconductor LED devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Tan in view of Oh to include the dielectric layer of Oh, whereby consequentially each of the one or more first metal layers directly contacts at least one of the one or more first TCO layers in a total contact area smaller than an entire area of that respective one or more first metal layers , in order for the dielectric layer to facilitate an improvement to the reflection of light, and correspondingly the luminous efficiency in the device as was taught by Oh.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Tan in view of Oh as applied to claim 19 above, and further in view of US patent publication US 20200203566 A1 (Lee et al hereinafter Lee).
Tan in view of Oh discloses the limitations of claim 19 as detailed above, and they further disclose that each of the one or more first metal layers directly contacts the one or more first TCO layers at multiple contact areas discontinuous from each other (Oh FIG. 3, metal reflection layer 31 directly contacts ohmic contact layers 28 at multiple contact points that are discontinuous as dielectric layer 29a separates them). Tan in view of Oh do not explicitly disclose that each of the one or more second metal layers directly contacts the one or more second TCO layers at multiple contact areas discontinuous from each other; in the disclosure of Tan, a single contact area is shown between the one or more second metal layers directly contacts the one or more second TCO layers, extending through the DBR layer based on modification in view of the embodiment of FIG. 13.
However, it has been found that mere duplication of parts has no patentable significance unless a new and unexpected result is produced (MPEP 2144.04 VI. B). Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Tan in view of Oh to have multiple plugs 1372 extending through the DBR layer 1365 of Tan based on the embodiment of FIG. 13 at each of the one or more second metal layers 1370 to provide direct contact from the TCO layer 1362 to metal layers 1370, particularly in view of Lee.
Lee discloses an LED device (the device of FIGS. 32-33 ¶ [0077-0078]) wherein one or more second metal layers (FIG. 33, first electrode 3141 ¶ [0308]) directly contacts an underlying layer (FIG. 33, first conductivity type semiconductor layer 3111 ¶ [0311]) to connect to the n-type semiconductor layer (FIG. 33, first conductivity type semiconductor layer is n-type 3111 ¶ [0312-0313]) at multiple contact areas discontinuous from each other (FIG. 33, first electrode 3141 has two discontinuous contact areas h2 ¶ [0322-0329]), the contact being provided through a DBR layer (FIG. 33, reflective layer 3160 is a DRB layer ¶ [0332]). Lee also teaches that the configuration of their plurality of discontinuous contact areas allows for adjustment depending on the size and current spreading characteristics of the semiconductor device (¶ [0326]).
Tan, Oh, and Lee all pertain to the field of semiconductor LED devices, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Tan in view of Oh further in view of Lee such that each of the one or more second metal layers directly contacts the one or more second TCO layers at multiple contact areas discontinuous from each other, in order to adjust the electrical characteristics of the device depending on the intended size and current spreading characteristics of the device.
Cited Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US patent US 12588345 B1.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EDWARD RHETT CHEEK whose telephone number is (571)272-3461. The examiner can normally be reached Monday - Thursday 7:30am - 5pm, Every other Friday 8:30am - 5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached at 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/E.R.C./Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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