DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Claims 1-3, 5-9, and 20 stand rejected under Section 102 in view of Yeo with evidence from Yang. Claims 1, 2, 5-8, 11-13, and 16-20 stand rejected under Section 102(a)(1) in view of Bai, and under Section 102(a)(2) in view of Paek. For Bai, the Office indicated that applicants could not rely upon their foreign priority document to overcome the rejection because a translation of the foreign priority document had not been made in accordance with 37 C.F.R. § 1.55. For Paek, the Office noted that Paek has a common assignee with the pending application, and provided information on overcoming the rejection. Claims 4 and 10 stand rejected under Section 103 in view of Yeo with evidence from Yang. Claim 8 stands rejected under Section 112(b). The drawings and specification stand objected to. Claims 14 and 15 stand objected to for depending from rejected base claims, but have been indicated as having allowable subject matter if placed in independent form.
Applicants amended 8, provided replacement drawings and provided amendments to the specification, and provided a translation of their foreign priority documents along with a certification from the translator. Applicants also provided a statement of common ownership for the Paek application. Applicants argue that the rejections based on Yeo and Yang were incorrect because neither Yeo’s buffer insulating layer nor Yang’s etch stop layer can perform as the etch stopper because they are not disposed to prevent an etching solution from penetrating into the interior of the panel. Applicants argue that because an etching solution is capable of etching a substrate necessarily etches inorganic materials, an inorganic layer cannot perform the role of protecting the test wiring from such an etching solution.
Turning first to the drawings: Applicants’ amendments address the previously noted drawing objections and are accepted and entered. No new matter has been added. The previously noted drawing objections are withdrawn.
Specification objections: Applicants’ amendments address the previously noted specification objections and are accepted and entered. No new matter has been added. The previously noted specification objections are withdrawn.
Section 112(b) rejection: Applicants’ amendments address the previously noted Section 112(b) rejection and are accepted and entered. No new matter has been added. The previously noted Section 112(b) rejection is withdrawn.
Section 102 rejections based on Yeo with Yang: Applicants’ arguments are well made and well taken, but ultimately unpersuasive for the following reason: The Office notes that there are no limitations on the claimed etch stop layer other than the etch stop layer be an etch stop layer, that the etch stop layer be disposed below the test wiring, and the width of the etch stop layer be greater than a width of the test wiring. Furthermore, it is common knowledge that certain etch solutions are selective to certain materials. Thus, an etch stop layer material can be selected so that the etch stop layer resists removal by the etch solution. Silicon nitride is a common material used as an etch stop material, as is well known in the art. The example provided by the Office, Yeo, discloses materials that the reference cited by the Office, Yang, discloses can be used as an etch stop material. Nothing more is required. For these reasons, applicants’ arguments are not persuasive, and the rejections based on Yeo and Yang are maintained.
Section 102 rejections based on Bai and Paek: The certified translation and the statement of common ownership overcome the previously noted Section 102 rejections based on Bai and Paek. The rejections based on Bai and Paek are withdrawn.
Section 103 rejections: These rejections are based on Yeo and Yang, and are maintained for the same reason the Section 102 rejections based on Yeo and Yang are maintained.
Updated searches yielded no further prior art that anticipates or render obvious the claims, or that could be used with previously cited prior art to render obvious the claims.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 5-9, and 20 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Yeo, U.S. Pat. Pub. No. 2019/0198582, Figures 1-7B, with evidence from Yang, U.S. Pat. Pub. No. 2016/0013209.
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Regarding claim 1: Yeo Figures 1-7B disclose a display device (10) comprising: a substrate (SUB) including a display region (AA) and a non-display region (region outside display region (AA)); a signal wiring (DL, VDL, GL) connected to the display region (AA); a test wiring (TL) connected to the signal wiring (DL, VDL, GL); and a buffer insulating layer (110), which may comprise a single layer of silicon oxide or silicon nitride, or a multi-layered structure of silicon oxide and silicon nitride, disposed below the test wiring (TL), wherein a width of the buffer insulating layer (110) is greater than a width of the test wiring (TL). Yeo specification ¶¶ 39-117. Yeo is silent as to whether the buffer insulating layer is an etch stop layer.
Yang, directed to a display device, discloses an etch stop layer (5) that comprises silicon oxide, silicon nitride, or a composite layer formed by silicon oxide and silicon nitride. Yang specification ¶ 14. Thus, the Yeo buffer insulating layer, made of the same materials as the Yang etch stop layer, would have etch stop properties and therefore, would also be capable of being an etch stop layer.
Regarding claim 2, which depends from claim 1: Yeo discloses the etch stop layer/buffer insulating layer (110) includes a center region overlapping the test wiring (TL) and an edge region not overlapping the test wiring (TL). See Yeo Figure 5B.
Regarding claim 3, which depends from claim 2: Yeo discloses a width of the edge region is less than a width of the center region. See id.
Regarding claim 5, which depends from claim 2: Yeo discloses a first inorganic insulating film (120) disposed between the etch stop layer/buffer insulating layer (110) and the test wiring (TL). See id.; see Yeo specification ¶ 69.
Regarding claim 6, which depends from claim 5: Yeo discloses an organic insulating film (160) disposed on the test wiring (TL) and covering the edge region and a side surface of the etch stop layer/buffer insulating layer (110). See Yeo Figure 7B; Yeo specification ¶¶ 78, 110-116.
Regarding claim 7, which depends from claim 6: Yeo discloses a second inorganic insulating film (150) disposed between the organic insulating film (160) and the test wiring (TL). See Yeo Figure 7B; Yeo specification ¶¶ 77, 113-116
Regarding claim 8, which depends from claim 1: Yeo discloses the signal wiring (DL, VDL, GL) includes a plurality of signal wirings (DL, VDL, GL), and wherein the test wiring (TL) includes a plurality of test wirings (TL) connected to the plurality of signal wirings (DL, VDL, GL), and the etch stop layer/buffer insulating layer (110) overlaps one or more test wirings (TL) of the plurality of test wirings (TL). See Yeo Figures 1, 4, 5B; Yeo specification ¶¶ 42-47, 50-53, 92-99, 104-108.
Regarding claim 9, which depends from claim 5: Yeo discloses an inorganic insulating pattern layer (130) disposed on the edge region of the etch stop layer/buffer insulating layer (110), wherein a material of the inorganic insulating pattern layer (130) is a same material of the first inorganic insulating film (120). Yeo specification ¶¶ 69, 72.
Regarding claim 20: Yeo discloses a display device (10) comprising: a substrate (SUB) including a display region (AA) and a non-display region (region outside display region (AA)); a test wiring (TL) connected to a circuit in the display region (AA); and a buffer insulating layer (110) disposed below the test wiring (TL); and a coating layer (160) on the substrate (SUB) and in contact with the buffer insulating layer (110), a side surface of the coating layer (160) being coplanar with a side surface of the buffer insulating layer (110). Yeo specification ¶¶ 39-117. Yeo is silent as to whether the buffer insulating layer is an etch stop layer.
Yang, directed to a display device, discloses an etch stop layer that comprises silicon oxide, silicon nitride, or a composite layer formed by silicon oxide and silicon nitride. Yang specification ¶ 14. Thus, the Yeo buffer insulating layer, made of the same materials as the Yang etch stop layer, would have etch stop properties and therefore, would also be capable of being an etch stop layer.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Yeo, with evidence from Yang.
Regarding claim 4, which depends from claim 2: Yeo does not disclose that a thickness of the edge region is less than a thickness of the center region. However, the application is silent as to the patentable significance of this shape variation, which is the result of a process step. Because the disclosure is silent as to the patentable significance of this shape difference, claim 4 is rejected as a patentably insignificant shape variation over the prior art.
Regarding claim 10, which depends from claim 9: Yeo does not disclose that a thickness of the inorganic insulating pattern layer (130) is different from a thickness of the first inorganic insulating film (120). However, the application is silent as to the patentable significance of this shape variation. Because the disclosure is silent as to the patentable significance of this shape difference, claim 10 is rejected as a patentably insignificant shape variation over the prior art.
Allowable Subject Matter
Claims 16-19 are allowed.
Claims 11-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With regard to claim 11: The claim has been found allowable because the prior art of record does not disclose “the etch stop layer protrudes further outward than the side surface of the substrate”, in combination with the remaining limitations of the claim.
With regard to claims 12-13: The claims have been found allowable due to their dependency from claim 11 above.
With regard to claim 14: The claim has been found allowable because the prior art of record does not disclose “the etch stop layer is formed on a same layer as the first gate electrode”, in combination with the remaining limitations of the claim.
With regard to claim 15: The claim has been found allowable due to its dependency from claim 14 above.
With regard to claim 16: The claim has been found allowable because the prior art of record does not disclose “wherein the etch stop layer protrudes further outward than a side surface of the substrate”, in combination with the remaining limitations of the claim.
With regard to claims 17-19: The claims have been found allowable due to their dependency from claim 16 above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTORIA KATHLEEN HALL whose telephone number is (571)270-7567. The examiner can normally be reached Monday-Friday, 8 a.m.-5 p.m.
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/Victoria K. Hall/Primary Examiner, Art Unit 2897
