Prosecution Insights
Last updated: October 16, 2026
Application No. 18/515,379

DATA GENERATION APPARATUS, DATA GENERATION METHOD, NON-TRANSITORY COMPUTER READABLE MEDIUM AND MAGNETIC RESONANCE IMAGING APPARATUS

Non-Final OA §103
Filed
Nov 21, 2023
Priority
Mar 06, 2023 — JP 2023-033886
Examiner
WECHSELBERGER, ALFRED H.
Art Unit
2187
Tech Center
2100 — Computer Architecture & Software
Assignee
Canon Inc.
OA Round
1 (Non-Final)
59%
Grant Probability
Moderate
1-2
OA Rounds
9m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 59% of resolved cases
59%
Career Allowance Rate
134 granted / 227 resolved
+4.0% vs TC avg
Strong +33% interview lift
Without
With
+32.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
30 currently pending
Career history
268
Total Applications
across all art units

Statute-Specific Performance

§101
29.8%
-10.2% vs TC avg
§103
40.6%
+0.6% vs TC avg
§102
3.6%
-36.4% vs TC avg
§112
23.6%
-16.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 227 resolved cases

Office Action

§103
DETAILED ACTION Claims 1 - 13 have been presented for examination. This office action is in response to submission of the application on 08/30/2023. Claims 1 – 13 have been considered under “2019 Revised Patent Subject Matter Eligibility Guidance” 84 Fed. Reg. 50 (7 January 2019), the instant claims are viewed as integrating the recited abstract idea into a practical application at step 2A(ii). Specifically, there is recited “convert the operating instruction into an internal instruction relating to hardware control” which could reasonably be performed mentally since it is does not require said hardware itself to be operated under the broadest reasonable interpretation. This internal instruction is then used to “generate simulation data” which directly results in the benefits of the claimed invention being realized (see the instant application Paragraph 4 “However, pulse sequences for, for example, acquiring magnetic resonance signals (MR signals) set in an MRI simulator, which are designed for the MRI simulator, cannot precisely reproduce the behavior of an actual MRI apparatus, and often do not match data that would be obtained by the actual MRI apparatus.”). Examiner notes that a practical application may include well-known steps (see MPEP 2016.04(d)(I) “Step 2A specifically excludes consideration of whether the additional elements represent well-understood, routine, conventional activity. Accordingly, in Step 2A Prong Two, examiners should ensure that they give weight to all additional elements, whether or not they are conventional, when evaluating whether a judicial exception has been integrated into a practical application. Additional elements that represent well-understood, routine, conventional activity may integrate a recited judicial exception into a practical application.”). Examiner further notes the particularity of the recite “convert” as relating to an internal instruction for hardware control, which then is directly linked to the “generate simulation data” resulting in a more specific simulation. Accordingly, the claims are deemed eligible under 35 U.S.C. 101. Title The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Examiner notes that the claimed invention address a particular kind of data generation (see the instant application Paragraph 4 “However, pulse sequences for, for example, acquiring magnetic resonance signals (MR signals) set in an MRI simulator, which are designed for the MRI simulator, cannot precisely reproduce the behavior of an actual MRI apparatus, and often do not match data that would be obtained by the actual MRI apparatus.”) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: Determining the scope and contents of the prior art. Ascertaining the differences between the prior art and the claims at issue. Resolving the level of ordinary skill in the pertinent art. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1 – 12 are rejected under 35 U.S.C. 103 as being unpatentable over Layton et al. “Pulseq: A Rapid and Hardware-Independent Pulse Sequence Prototyping Framework” (henceforth “Layton”) in view of Teshigawara et al. (US 2020/0005495) (henceforth “Teshigawara (495)”). Layton and Teshigawara (495) are analogous art because they solve the same problem of data generations, and because they are from the same field of endeavor of magnetic resonance imaging apparatus. With regard to claim 1, Layton teaches a data generation apparatus comprising processing circuitry configured to: obtain an operation instruction based on a user operation on an image diagnostic apparatus or an image diagnostic apparatus simulator; (Layton Figure 1 high-level design is performed to produce low-level pulse sequence file PNG media_image1.png 376 442 media_image1.png Greyscale ) convert the operation instruction into an internal instruction relating to hardware control of the image diagnostic apparatus or the image diagnostic apparatus simulator from which the operation instruction has been obtained; and (Layton Page 1546, Right and Figure 1 “Precise timing logic and amplitude information is already computed by the high- level sequence tool and stored in the file. The remaining task of the interpreter is to convert each sequence event into an appropriate hardware instruction”) generate experiment data by executing a physical simulation using the internal instruction. (Layton Figure 1 the pulse sequence is executed on hardware to produce experiment data, and Figure 7 “The same spin echo sequence file was used for simulation and measurement.”) Layton does not appear to explicitly disclose: that the generated data by executing a physical simulation is simulation data. However, Teshigawara (495) teaches: generate simulation data by executing a simulation (Teshigawara (495) Figure 3 simulation produces data to train a model PNG media_image2.png 222 677 media_image2.png Greyscale ) It would have been obvious to one of ordinary skill in the art to combine the method of converting operating instructions from high-level to low-level disclosed by Layton with the training a model based on simulation data disclosed by Teshigawara (495). One of ordinary skill in the art would have been motivated to make this modification in order to generate training data for training a model to reconstruct image data (Teshigawara (495) Abstract). With regard to claim 10, it recites a data generation method comprising the same steps are the apparatus of claim 1, which is taught by Leyton in view of Teshigawara (495). With regard to claim 11, it recites the same steps are the apparatus of claim 1, which is taught by Leyton in view of Teshigawara (495). Claim 11 further recites: a non-transitory computer readable medium including computer executable instructions, wherein the instructions, when executed by a processor, cause the processor to perform the steps of claim 1. Layton teaches: a non-transitory computer readable medium including computer executable instructions, wherein the instructions, when executed by a processor, cause the processor to perform steps (Layton Page 1549, Right instructions can be stored in a memory to desirably perform the steps “In all cases, the entire sequences file was sufficiently small to fit in the memory of the hardware control units.”, Page 1544, Left “a software program known as a pulse sequence.”) With regard to claim 12, Layton teaches a magnetic resonance imaging apparatus, comprising: a console configured to accept an operation relating to acquisition of a magnetic resonance signal including an imaging sequence from a user; and (Layton Figure 1 high-level design is performed using a GUI (console configured to accept an operation) to produce low-level pulse sequence file PNG media_image1.png 376 442 media_image1.png Greyscale processing circuitry configured to: (Layton Page 1549, Right control units operate on file instructions “In all cases, the entire sequences file was sufficiently small to fit in the memory of the hardware control units.”, acquire the magnetic resonance signal based on the operation; convert the operation into an internal instruction relating to hardware control of the magnetic resonance imaging apparatus; and (Layton Abstract converting file instructions are run (acquire the signal) “Platform-dependent interpreter modules convert the file to appropriate instructions to run the sequence on MR hardware”, and Page 1546, Right and Figure 1 the high-level instructions are converted “Precise timing logic and amplitude information is already computed by the high- level sequence tool and stored in the file. The remaining task of the interpreter is to convert each sequence event into an appropriate hardware instruction”) execute an experiment relating to acquisition of the magnetic resonance signal by inputting the internal instruction to the experiment, and generate experiment data. (Layton Figure 1 the pulse sequence is executed on hardware to produce experiment data, and Figure 7 “The same spin echo sequence file was used for simulation and measurement.”) Layton does not appear to explicitly disclose: that the magnetic resonance imaging apparatus is on which a simulator is installed; that the acquisition of the magnetic resonance signal is for executing a simulation by inputting the internal instructions to the simulator, and generate simulation data. However, Teshigawara (495) teaches: a magnetic resonance imaging apparatus is on which a simulator is installed; executing a simulation by inputting instructions to the simulator, and generate simulation data (Teshigawara (495) Figure 3 inputs to a simulator produce raw data (generate simulation data) PNG media_image3.png 371 934 media_image3.png Greyscale , and Figure 1 as part of apparatus (imaging apparatus on which)) It would have been obvious to one of ordinary skill in the art to combine the method of converting operating instructions from high-level to low-level disclosed by Layton with the training a model based on simulation data disclosed by Teshigawara (495). One of ordinary skill in the art would have been motivated to make this modification in order to generate training data for training a model to reconstruct image data (Teshigawara (495) Abstract). With regard to claim 2, Layton in view of Teshigawara (495) teaches all the elements of the parent claim 1, and further teaches: wherein the internal instruction includes information relating to magnitudes of a voltage and a current supplied to hardware driven to realize the operation instruction, or logical values associated with the magnitudes of the voltage and the current, and (Teshigawara (495) Paragraph 147 the hardware instructions of Layton operates the MRI machine (relating to voltage and current to realize) “The X-ray tube 31 irradiates the object P with X-rays. … When the tube voltage is applied, thermoelectrons are emitted from the cathode to the anode. When the thermoelectrons are emitted from the cathode to the anode, a tube current flows”) application times of the voltage and the current. (Layton Figure 2A specific timing information is included in the pulses which is directly linked to timing in the voltages and currents that produces said pulse sequences PNG media_image4.png 73 720 media_image4.png Greyscale ) With regard to claim 3, Layton in view of Teshigawara (495) teaches all the elements of the parent claim 1, and further teaches: wherein the processing circuitry is configured to record the internal instruction. (Teshigawara (495) Paragraph 34 conditions inputted into the simulator are stored, where the hardware instructions of Layton can similarly be recorded with wholly predictable results “The memory 7 stores various kinds of conditions input via the input interface 3, information, programs corresponding to a plurality of functions executed by the processing circuitry 9, a machine learning model before learning, a model learning program, a radiation physics simulator executed by an acquisition function 93, and the like.”) It would have been obvious to one of ordinary skill in the art to combine the method of converting operating instructions from high-level to low-level disclosed by Layton with the training a model based on simulation data disclosed by Teshigawara (495). One of ordinary skill in the art would have been motivated to make this modification in order to generate training data for training a model to reconstruct image data (Teshigawara (495) Abstract). With regard to claim 4, Layton in view of Teshigawara (495) teaches all the elements of the parent claim 1, and further teaches: wherein the processing circuitry is configured to execute a part of the internal instruction. (Layton Abstract converting file instructions are run “Platform-dependent interpreter modules convert the file to appropriate instructions to run the sequence on MR hardware.”) With regard to claim 5, Layton in view of Teshigawara (495) teaches all the elements of the parent claim 1, and further teaches: wherein the processing circuitry is configured to execute the physical simulation based on the internal instruction using a simulator in which phantom data is set. (Layton Page 1549, Left a phantom is imaged “FIG. 7. An axial image of a phantom a: simulated with the Bloch equations”) With regard to claim 6, Layton in view of Teshigawara (495) teaches all the elements of the parent claim 1, and further teaches: wherein the processing circuitry is configured to convert a log file relating to inspection information of the image diagnostic apparatus into the internal instruction. (Layton Abstract the pulse sequence (inspection information) is converted to hardware run instructions “A novel file format is described to efficiently store the hardware events and timing information required for an MR pulse sequence. Platform-dependent interpreter modules convert the file to appropriate instructions to run the sequence on MR hardware.”) With regard to claim 7, Layton in view of Teshigawara (495) teaches all the elements of the parent claim 1, and further teaches: wherein the processing circuitry is configured to obtain, from a log file relating to a hardware instruction for operating hardware in the image diagnostic apparatus, the hardware instruction as the internal instruction. (Layton Page 1546, Right low-level file (log file relating to a hardware instruction) is directly used generate a hardware instruction “The low-level nature of the Pulseq sequence file makes it relatively simple to implement interpreter modules for different scanner platforms.”) With regard to claim 8, Layton in view of Teshigawara (495) teaches all the elements of the parent claim 1, and further teaches: wherein the processing circuitry is configured to execute the physical simulation by directly obtaining, from the image diagnostic apparatus, a hardware instruction for operating hardware in the image diagnostic apparatus as the internal instruction. (Layton Page 1546, Right and Figure 1 “Precise timing logic and amplitude information is already computed by the high- level sequence tool and stored in the file. The remaining task of the interpreter is to convert each sequence event into an appropriate hardware instruction”) With regard to claim 9, Layton in view of Teshigawara (495) teaches all the elements of the parent claim 1, and further teaches: wherein the processing circuitry is further configured to: generate a trained model by training a model using the simulation data as training data. (Teshigawara Figure 3 simulation produces data to train a model PNG media_image2.png 222 677 media_image2.png Greyscale ) It would have been obvious to one of ordinary skill in the art to combine the method of converting operating instructions from high-level to low-level disclosed by Layton with the training a model based on simulation data disclosed by Teshigawara (495). One of ordinary skill in the art would have been motivated to make this modification in order to generate training data for training a model to reconstruct image data (Teshigawara (495) Abstract). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Layton in view of Teshigawara (495), and further in view of Yamakawa, K. (US 2019/0097519) (henceforth “Yamakawa (519)”) Layton and Teshigawara (495) and Yamakawa are analogous art because they solve the same problem of data generations, and because they are from the same field of endeavor of magnetic resonance imaging apparatus. With regard to claim 13, Layton in view of Tashigawara (495) teaches all the elements of the parent claim 12, and further teaches: wherein the operation includes an operation relating to setting of a pulse sequence, and (Layton Page 1549, Right “FIG. 5. Gradient and RF pulse shapes to achieve 2D selective excitation. The (top) RF magnitude and (middle) RF phase combined with (bottom) a spiral trajectory excites two Gaussian cylinders as described in the text.”) the internal instruction includes an instruction relating to a gradient field, and application times. (Layton Paragraph 1549, Right “A gradient echo sequence was designed in JEMRIS to run on three different hardware platforms”, and Page 1548, Left specific timing is specified (application times) PNG media_image5.png 148 464 media_image5.png Greyscale ) the internal instruction includes an instruction relating to a voltage and a current to be applied, and application times of the voltage and the current. (Teshigawara (495) Paragraph 147 the hardware instructions of Layton operates the MRI machine using voltages and currents (relating to voltage and current) “The X-ray tube 31 irradiates the object P with X-rays. … When the tube voltage is applied, thermoelectrons are emitted from the cathode to the anode. When the thermoelectrons are emitted from the cathode to the anode, a tube current flows”, and Paragraph 140 the operaton ) Layton in view of Teshigawara (495) does not appear to explicitly disclose: that the voltage and current are to applied to a transmitter coil and a receiver coil. However, Yamakawa (519) teaches: a gradient field; a voltage and a current to be applied to a transmitter coil and a receiver coil (Yamakawa (519) Paragraph 43 “indicates the waveform of the gradient magnetic field generated in the gradient coil 2, and it is a signal that simulates with currents the waveform of the gradient magnetic field applied when a pulse sequence is executed.”, and Paragraph 29 “Furthermore, in the example explained here, the transmitter coil 4 applies an RF magnetic field and the receiver coil 6 receives MR signals”) It would have been obvious to one of ordinary skill in the art to combine the method of converting operating instructions from high-level to low-level disclosed by Layton in view of Teshigawara (495) with the transmitter and receiver coils during MRI operation disclosed by Yamakawa (519). One of ordinary skill in the art would have been motivated to make this modification in order control loads on the image device (Yamakawa (519) Abstract). Examiner General Comments With regard to the prior art rejection(s), any cited portion of the relied upon reference(s), either by pointing to specific sections or as quotations, is intended to be interpreted in the context of the reference(s) as a whole as would be understood by one of ordinary skill in the art. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in their entirety as potentially teaching all or part of the claimed invention since the entire reference is considered to provide disclosure relating to the cited portions. Further, the claims and only the claims form the metes and bounds of the invention. Office personnel are to give the claims their broadest reasonable interpretation in light of the supporting disclosure. Unclaimed limitations appearing in the specification are not read into the claim. Prior art was referenced using terminology familiar to one of ordinary skill in the art. Such an approach is broad in concept and can be either explicit or implicit in meaning. Examiner’s notes are provided with the cited references to assist the applicant to better understand how the examiner interprets the applied prior art. Such comments are entirely consistent with the intent and spirit of compact prosecution. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALFRED H. WECHSELBERGER whose telephone number is (571)272-8988. The examiner can normally be reached M - F, 10am to 6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Emerson Puente can be reached at 571-272-3652. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALFRED H. WECHSELBERGER/ExaminerArt Unit 2187 /EMERSON C PUENTE/Supervisory Patent Examiner, Art Unit 2187
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Prosecution Timeline

Nov 21, 2023
Application Filed
Sep 29, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
59%
Grant Probability
92%
With Interview (+32.7%)
3y 8m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 227 resolved cases by this examiner. Grant probability derived from career allowance rate.

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