DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office Action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/27/2026 has been entered.
3. Applicant's amendment and response received 05/27/2026, responding to the 03/04/2026 Office Action provided in the rejections of claims 1-20, wherein at least independent claims 1, 10 and 16 have been amended. Claims 1-20 remain pending in the application; which has been fully considered by the Examiner.
Specifications
4. Prior objection is overcome by amendments.
Claim Rejections - 35 USC § 112
5. Prior rejection is circumvented by claim amendments.
Response to Arguments
6. Applicant’s arguments with respect to newly amended independent claims 1, 10 and 16 and claims 2-9, 11-15 and 17-20 on pages 9-13 of the response have been fully considered but they are not persuasive are moot in view of the new ground(s) of rejection- see Kevelos (Art of record), Lappi (Art of record) and Gavens (Art of record) as applied below, as they further teach such use.
Applicants contends with respect to claims 16 and 19 (p. 9, 4th para. - p. 10, 5th para.) that “Lappi's device does not check two slots of a memory device at boot up”. Examiner respectfully disagrees; the features with respect to which the Applicant relied upon (i.e. “check two slots of a memory device at boot up”) is not recited in the rejected claims (emphasis added). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Applicants contend/s with respect to claims 16 and 19 (p. 11, 2nd para.) that “Lappi does not teach that the device identifies the firmware version that is stored at the ‘first non-volatile memory device’”. Examiner respectfully disagrees; the features with respect to which the Applicant relied upon (i.e. “identifies the firmware version”) is not recited in the rejected claims (emphasis added). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Applicants contend/s with respect to claims 16 and 19 (p. 11, last para.) that “Lappi also does not teach ‘storing, by a processor of a circuit interrupter in a closed state, a firmware update in one of a first slot or a second slot of a first memory’”. Examiner respectfully disagrees; with respect to claim 16, Lappi is not relied upon for such limitations; rather Kevelos is cited as disclosing such limitations. Kevelos discloses such use at/on: (column 15, lines 6-12), see “the update control signal is to cause the wireless circuit breaker 200 to enter an update mode 404. For example, the update control signal may cause the wireless circuit breaker 200 to open or trip. Alternatively, the update control signal may cause the wireless circuit breaker 200 to disable tripping functionality while leaving the wireless circuit breaker 200 in the “closed” position” and (column 19, lines 58-63), see “the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: receive an updated firmware from the circuit breaker controller via the wireless radio; and overwrite at least a portion of the firmware in the memory with the updated firmware”.
Claim Rejections - 35 USC § 103
7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
8. Claims 1-3, 5-8, 16 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Kevelos et al., U.S. Patent No. 11,818,582 (hereinafter Kevelos) in view of Lappi et al., U.S. Patent No. 11,226,811 (hereinafter Lappi).
In regards to claim 1, Kevelos teaches:
A system comprising: a circuit breaker comprising: a processor, and (column 19, lines 58-63, see the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: receive an updated firmware from the circuit breaker controller via the wireless radio; and overwrite at least a portion of the firmware in the memory with the updated firmware).
Kevelos doesn’t explicitly teach:
a first memory including a plurality of slots comprising: a first slot, and a second slot; and a second memory.
However, Lappi teaches such use: (column 2, lines 9-11, see a method for operating a storage device having one or more non-volatile memory ((1ST, 2nd SLOT)) devices and a volatile memory device) and (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
the processor stores a first firmware in one of the first slot or the second slot of the first memory.
However, Lappi teaches such use: (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
in response to an initialization of the processor, the processor is configured to perform operations comprising: identify a most recent firmware in the plurality of slots.
However, Lappi teaches such use: (column 1, lines 56-60, see the device boots up with original firmware stored in a first non-volatile memory device when powered on. The device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
in response to the first firmware being the most recent firmware, obtaining the first firmware from the one of the first slot or the second slot of the first memory.
However, Lappi teaches such use: (column 1, lines 56-60, see the device boots up with original firmware stored in a first non-volatile memory device when powered on. The device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
stores the first firmware obtained by the circuit breaker from the one of the first slot or the second slot of the first memory in the second memory.
However, Lappi teaches such use: (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
Kevelos and Lappi are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos and Lappi before him or her, to modify the system of Kevelos to include the teachings of Lappi, as a system for power safe offline download, and accordingly it would enhance the system of Kevelos, which is focused on circuit breaker updates, because that would provide Kevelos with the ability to have a power-save download that is quick, as suggested by Lappi (column 2, lines 9-11, column 12, lines 3-7).
In regards to claim 2, Kevelos doesn’t explicitly teach:
in response to a first initialization, the processor stores a copy of a first firmware in the first slot or the second slot of the first memory in the second memory and executes the first firmware in the second memory.
However, Lappi teaches such use (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
Kevelos and Lappi are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos and Lappi before him or her, to modify the system of Kevelos to include the teachings of Lappi, as a system for power safe offline download, and accordingly it would enhance the system of Kevelos, which is focused on circuit breaker updates, because that would provide Kevelos with the ability to have a power-save download that is quick, as suggested by Lappi (column 2, lines 9-11, column 12, lines 3-7).
In regards to claim 3, Kevelos doesn’t explicitly teach:
in response to obtaining a second firmware, the processor stores the second firmware in the other of the first slot and the second slot not storing the first firmware.
However, Lappi teaches such use (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
in response to a second initialization of the processor after obtaining the second firmware, the processor stores a copy of the second firmware from the other of the first slot and the second slot in the first memory in the second memory to enable execution of the second firmware.
However, Lappi teaches such use (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
the first firmware is a previous firmware stored in the first memory.
However, Lappi teaches such use (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
the second firmware is the most recent firmware stored in the first memory.
However, Lappi teaches such use (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
Kevelos and Lappi are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos and Lappi before him or her, to modify the system of Kevelos to include the teachings of Lappi, as a system for power safe offline download, and accordingly it would enhance the system of Kevelos, which is focused on circuit breaker updates, because that would provide Kevelos with the ability to have a power-save download that is quick, as suggested by Lappi (column 2, lines 9-11, column 12, lines 3-7).
In regards to claim 5, Kevelos teaches:
the circuit breaker further comprises: a wireless communication module, wherein the wireless communication module is configured to be placed in electronically communicable connection with an external computing device to send and receive data including firmware (column 6, lines 22-36, see the present disclosure provides that the communication enabled circuit breakers 104 and the circuit breaker controller 106 may communicate, or exchange signals including indications of data, operating conditions, fault detection events, fault interruption instructions, or the like. For example, the circuit breaker controller 106 may be configured to transmit updated software (e.g., operating software, firmware, fault interrupter instructions, etc.) to one or more of the communication enabled circuit breakers 104. For example, the circuit breaker controller 106 may provide, e.g., updated firmware to one or more of the communication enabled circuit breakers 104) and (column 19, lines 58-63, see the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: receive an updated firmware from the circuit breaker controller via the wireless radio; and overwrite at least a portion of the firmware in the memory with the updated firmware).
In regards to claim 6, Kevelos doesn’t explicitly teach:
the first memory comprises a non-volatile computer readable media; wherein the second memory comprises a volatile computer readable media.
However, Lappi teaches such use: (column 2, lines 9-11, see a method for operating a storage device having one or more non-volatile memory ((1ST, 2nd SLOT)) devices and a volatile memory device) and (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
Kevelos and Lappi are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos and Lappi before him or her, to modify the system of Kevelos to include the teachings of Lappi, as a system for power safe offline download, and accordingly it would enhance the system of Kevelos, which is focused on circuit breaker updates, because that would provide Kevelos with the ability to have a power-save download that is quick, as suggested by Lappi (column 2, lines 9-11, column 12, lines 3-7).
In regards to claim 7, Kevelos doesn’t explicitly teach:
the first memory comprises a flash memory; wherein the second memory comprises a RAM.
However, Lappi teaches such use: (column 2, lines 9-11, see a method for operating a storage device having one or more non-volatile memory ((1ST, 2nd SLOT)) devices and a volatile memory device) and (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
Kevelos and Lappi are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos and Lappi before him or her, to modify the system of Kevelos to include the teachings of Lappi, as a system for power safe offline download, and accordingly it would enhance the system of Kevelos, which is focused on circuit breaker updates, because that would provide Kevelos with the ability to have a power-save download that is quick, as suggested by Lappi (column 2, lines 9-11, column 12, lines 3-7).
In regards to claim 8, Kevelos teaches:
the processor is further configured to perform a validation of the most recent firmware before executing the most recent firmware stored in the second memory (column 19, line 65- column 20, line 3, see the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: validate the updated firmware before overwriting the firmware in memory, the validation being based at least in part on a checksum validation).
In regards to claim 16, Kevelos teaches:
A method comprising: (column 19, lines 58-63, see the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: receive an updated firmware from the circuit breaker controller via the wireless radio; and overwrite at least a portion of the firmware in the memory with the updated firmware).
executing, by the processor, the most recent firmware stored in the second memory to enable the processor to provide safety functionalities for a circuit breaker based on the most recent firmware (column 19, lines 58-63, see the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: receive an updated firmware from the circuit breaker controller via the wireless radio; and overwrite at least a portion of the firmware in the memory with the updated firmware) and (column 17, lines 65-67, see the memory 208 may be one or more memory chips capable of storing data and allowing any storage location to be directly accessed by the processor 212, such as any type or variant of static random-access memory (SRAM), dynamic random access memory (DRAM), electrically erasable programmable read-only memory (EEPROM), Ferroelectric RAM (FRAM), NAND Flash, NOR Flash and Solid State Drives (SSD)).
storing, by a processor of a circuit interrupter in a closed state, a firmware update in an available one of a first slot or a second slot of a first memory (column 15, lines 6-12, see the update control signal is to cause the wireless circuit breaker 200 to enter an update mode 404. For example, the update control signal may cause the wireless circuit breaker 200 to open or trip. Alternatively, the update control signal may cause the wireless circuit breaker 200 to disable tripping functionality while leaving the wireless circuit breaker 200 in the “closed” position) and (column 19, lines 58-63, see the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: receive an updated firmware from the circuit breaker controller via the wireless radio; and overwrite at least a portion of the firmware in the memory with the updated firmware) (emphasis added).
Kevelos doesn’t explicitly teach:
an other of the first slot or the second slot storing a current firmware, the processor executing the current firmware.
However, Lappi teaches such use: (column 1, lines 56-60, see the device boots up with original firmware stored in a first non-volatile memory device when powered on).
initializing the circuit interrupter.
However, Lappi teaches such use: (column 1, lines 56-60, see the device boots up with original firmware stored in a first non-volatile memory device when powered on. The device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
identifying, by the processor from the first slot or the second slot of the first memory, a most recent firmware stored in one of the two slots.
However, Lappi teaches such use: (column 1, lines 56-60, see the device boots up with original firmware stored in a first non-volatile memory device when powered on. The device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
copying, by the processor in response to the initialization, the most recent firmware stored in the one of the two slots of the first memory.
However, Lappi teaches such use: (column 1, lines 56-60, see the device boots up with original firmware stored in a first non-volatile memory device when powered on. The device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
storing, by the processor, the most recent firmware in a second memory.
However, Lappi teaches such use: (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
at the initialization, the firmware update is the most recent firmware relative the current firmware; wherein, at the initialization, the most recent firmware is a first firmware.
However, Lappi teaches such use: (column 1, lines 56-60, see the device boots up with original firmware stored in a first non-volatile memory device when powered on. The device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
Kevelos and Lappi are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos and Lappi before him or her, to modify the system of Kevelos to include the teachings of Lappi, as a system for power safe offline download, and accordingly it would enhance the system of Kevelos, which is focused on circuit breaker updates, because that would provide Kevelos with the ability to have a power-save download that is quick, as suggested by Lappi (column 2, lines 9-11, column 12, lines 3-7).
In regards to claim 19, Kevelos teaches:
performing a validation of the most recent firmware stored in the second memory (column 19, line 65- column 20, line 3, see the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: validate the updated firmware before overwriting the firmware in memory, the validation being based at least in part on a checksum validation).
executing, by the processor in response to passing the validation, the most recent firmware in the second memory (column 19, line 65- column 20, line 3, see the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: validate the updated firmware before overwriting the firmware in memory, the validation being based at least in part on a checksum validation).
9. Claims 4 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Kevelos in view of Lappi in view of Bulusu et al., U.S. Patent No. 11,157,265 (hereinafter Bulusu).
In regards to claims 1 and 16, the rejections above are incorporated respectively.
In regards to claim 4, Kevelos and Lappi, in particular Kevelos doesn’t explicitly teach:
the processor stores the second firmware in an available slot of the first slot and the second slot of the first memory such that execution of the first firmware is uninterrupted.
However, Bulusu teaches such use (column 10, lines 12-23, see in response to a determination that the secondary memory is defined for storing the BIOS update for the primary memory, writing, by the processor, the BIOS update from the firmware interface into the secondary memory without interrupting operations of applications that are currently running on the computing system and setting a reboot flag to indicate to the processor to perform a warm reboot of the computing system).
Kevelos, Lappi and Bulusu are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos, Lappi and Bulusu before him or her, to modify the system of Kevelos and Lappi, in particular Kevelos, to include the teachings of Bulusu, as a system for firmware updates, and accordingly it would enhance the system of Kevelos, which is focused on a system for circuit breaker updates, because that would provide Kevelos with the ability to prevent problems of sub optimal performance associated with firmware updates, as suggested by Bulusu (column 10, lines 12-23, column 9, lines 53-61).
In regards to claim 17, Kevelos doesn’t explicitly teach:
obtaining, by the processor, a second firmware; and storing, by the processor, the second firmware in an available slot of the first slot or the second slot at the first memory.
However, Lappi teaches such use (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
Kevelos and Lappi are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos and Lappi before him or her, to modify the system of Kevelos to include the teachings of Lappi, as a system for power safe offline download, and accordingly it would enhance the system of Kevelos, which is focused on circuit breaker updates, because that would provide Kevelos with the ability to have a power-save download that is quick, as suggested by Lappi (column 2, lines 9-11, column 12, lines 3-7).
Kevelos and Lappi, in particular Kevelos doesn’t explicitly teach:
the processor storing the second firmware in the first memory does not interrupt execution of the first firmware.
However, Bulusu teaches such use (column 10, lines 12-23, see in response to a determination that the secondary memory is defined for storing the BIOS update for the primary memory, writing, by the processor, the BIOS update from the firmware interface into the secondary memory without interrupting operations of applications that are currently running on the computing system and setting a reboot flag to indicate to the processor to perform a warm reboot of the computing system).
Kevelos, Lappi and Bulusu are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos, Lappi and Bulusu before him or her, to modify the system of Kevelos and Lappi, in particular Kevelos, to include the teachings of Bulusu, as a system for firmware updates, and accordingly it would enhance the system of Kevelos, which is focused on a system for circuit breaker updates, because that would provide Kevelos with the ability to prevent problems of sub optimal performance associated with firmware updates, as suggested by Bulusu (column 10, lines 12-23, column 9, lines 53-61).
In regards to claim 18, Kevelos doesn’t explicitly teach:
at a second initialization of the processor the first firmware is a previous firmware, and the second firmware is the most recent firmware.
However, Lappi teaches such use: (column 7, lines 24-30, see the storage device begins to boot up with the existing or original firmware stored on the NOR memory device in item 206...The controller may use a bootloader stored in a NOR memory device to bring up and check the NAND memory device for new firmware).
the initialization of the processor causes the processor to copy and store the most recent firmware from the first memory in the second memory for execution.
However, Lappi teaches such use (column 1, lines 56-60, see the device then checks a second non-volatile memory ((2nd SLOT)) device for new firmware. If there is new firmware stored in the second non-volatile memory device, the device loads the new firmware into a volatile memory device and reboots with the new firmware).
Kevelos and Lappi are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos and Lappi before him or her, to modify the system of Kevelos to include the teachings of Lappi, as a system for power safe offline download, and accordingly it would enhance the system of Kevelos, which is focused on circuit breaker updates, because that would provide Kevelos with the ability to have a power-save download that is quick, as suggested by Lappi (column 2, lines 9-11, column 12, lines 3-7).
10. Claims 9 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kevelos in view of Lappi in view of Gavens et al., U.S. 2008/0109647 (hereinafter Gavens).
In regards to claims 1, 8, 16 and 19, the rejections above are incorporated accordingly.
In regards to claim 9, Kevelos teaches:
in response to failing the validation of the most recent firmware, storing a copy of a previous firmware relative the most recent firmware in the second memory (column 16, lines 1-7, see in some examples, the wireless circuit breaker 200 can perform a self-test or other integrity check operation after the updated process, and in some cases, prior to terminating the update mode. With some examples, the wireless circuit breaker 200 may be able to restore and/or return to pre-update condition (e.g., restore firmware from a backup, or the like) if the self-test fails) and (column 19, line 65- column 20, line 3, see the processor is configured to execute the firmware update instructions in the update mode to further cause the communicating circuit breaker to: validate the updated firmware before overwriting the firmware in memory, the validation being based at least in part on a checksum validation).
Kevelos and Lappi, in particular Kevelos doesn’t explicitly teach:
performing the validation of the previous firmware before executing the previous firmware.
However, Gavens teaches such use (p. 5, [0039-0040], see the memory controller will continue the upgrade process by resetting itself or by interrupting the power supply (i.e., perform a power cycle) to use the upgraded firmware at 532 upon reboot for validating the upgrade. In one embodiment, the upgraded firmware is validated when the memory controller executes the upgraded firmware and moves to the next state, indicating that the upgraded firmware is operable. In other embodiments, the upgraded firmware is validated by comparing error correction codes (“ECCs”) as well as using other error detection techniques known in the art. If there is no disruption at 530, then the memory controller continues to the next state of the upgrade mode, which is the “new in progress” state (“S4”) at 540 during which validation takes place for the new firmware. In one embodiment, the error log manager stores the state identifier in the error log when the memory controller boots up to, for example, avoid rebooting into an infinite loop of perpetually using the new firmware for validation purposes. In some embodiments, the memory controller equates a faulty firmware upgrade as an unintentional disruptive event. So, if firmware upgrade is invalidated during this state (or if an unintentional disruptive event occurs), the memory controller again takes the first path to recovery (“fall back”) at 562 to restore a redundant copy with a known good copy of firmware (i.e., the primary copy).
Kevelos, Lappi and Gavens are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos, Lappi and Gavens before him or her, to modify the system of Kevelos and Lappi, in particular Kevelos, to include the teachings of Gavens, as a system for performing resilient firmware upgrades, and accordingly it would enhance the system of Kevelos, which is focused on a system for circuit breaker updates, because that would provide Kevelos with the ability to minimize one or more of the drawbacks associated with conventional techniques for upgrading non-volatile memory and recovering firmware as suggested by Gavens (p. 5, [0039-0040], p. 7, [0047]).
In regards to claim 20, Kevelos and Lappi, in particular Kevelos doesn’t explicitly teach:
in response to failing the validation, the method further comprises: copying, by the processor, a previous firmware stored in one of the first slot or the second slot of the first memory; storing, by the processor, the previous firmware in the second memory; performing a validation of the previous firmware; and executing, by the processor in response to passing the validation, the previous firmware stored in the second memory to enable the processor to perform the safety functionalities based on the previous firmware.
However, Gavens teaches such use (p. 5, [0039-0040], see the memory controller will continue the upgrade process by resetting itself or by interrupting the power supply (i.e., perform a power cycle) to use the upgraded firmware at 532 upon reboot for validating the upgrade. In one embodiment, the upgraded firmware is validated when the memory controller executes the upgraded firmware and moves to the next state, indicating that the upgraded firmware is operable. In other embodiments, the upgraded firmware is validated by comparing error correction codes (“ECCs”) as well as using other error detection techniques known in the art. If there is no disruption at 530, then the memory controller continues to the next state of the upgrade mode, which is the “new in progress” state (“S4”) at 540 during which validation takes place for the new firmware. In one embodiment, the error log manager stores the state identifier in the error log when the memory controller boots up to, for example, avoid rebooting into an infinite loop of perpetually using the new firmware for validation purposes. In some embodiments, the memory controller equates a faulty firmware upgrade as an unintentional disruptive event. So, if firmware upgrade is invalidated during this state (or if an unintentional disruptive event occurs), the memory controller again takes the first path to recovery (“fall back”) at 562 to restore a redundant copy with a known good copy of firmware (i.e., the primary copy).
Kevelos, Lappi and Gavens are analogous art because they are from the same field of endeavor, firmware update.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teaching of Kevelos, Lappi and Gavens before him or her, to modify the system of Kevelos and Lappi, in particular Kevelos, to include the teachings of Gavens, as a system for performing resilient firmware upgrades, and accordingly it would enhance the system of Kevelos, which is focused on a system for circuit breaker updates, because that would provide Kevelos with the ability to minimize one or more of the drawbacks associated with conventional techniques for upgrading non-volatile memory and recovering firmware as suggested by Gavens (p. 5, [0039-0040], p. 7, [0047]).
Allowable Subject Matter
11. Claims 10-15, wherein the cited prior art taken alone or in combination fail to teach, in combination with the other claimed limitations, of a circuit breaker device comprising: a processor; a non-volatile computer readable media comprising: at least two slots, wherein a first firmware is stored in a first slot or a second slot; a volatile computer readable media; wherein the processor is configured to perform operations comprising: identify a most recent firmware in the at least two slots of the non-volatile computer readable media at initialization, wherein in response to identifying the first firmware is the most recent firmware at a first initialization, obtaining a copy of the first firmware from the first slot or the second slot of the non-volatile computer readable media, in response to identifying the first firmware is the most recent firmware at the first initialization, the processor stores the copy of the first firmware obtained from the first slot or the second slot of the non- volatile computer readable media in the volatile computer readable media and executes the first firmware in the volatile computer readable media, in response to obtaining a second firmware, the processor stores the second firmware in an other of the first slot or the second slot not storing the first firmware, and in response to identifying the second firmware is the most recent firmware at a second initialization of the processor after obtaining the second firmware, the processor stores a copy of the second firmware obtained from the other of the first slot or the second slot of the non-volatile computer readable media in the volatile computer readable media and executes the second firmware; and wherein, at the second initialization, the first firmware is a previous firmware stored in the non-volatile computer readable media, and the second firmware is a most recent firmware stored in the non-volatile computer readable media; wherein the processor stores the second firmware in an available slot of the first slot or the second slot of the non-volatile computer readable media such that execution of the first firmware is uninterrupted. The art of record does not expressly disclose such features.
Conclusion
12. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US Patent Application Publications
Emerson 20150326001 teaches a boot circuit is provided to allow the remote upgrade of firmware in all CB connected to a communications controller. A programmable circuit breaker, including an input unit, a sensor, and, a trip mechanism. The input unit permits user input and/or adjustment of predetermined load parameters. The sensor senses actual values of a load. A microcontroller receives and processes the values, and operates/trips the circuit breaker when the sensed values exceed predetermined load parameters.
Jakubowski 20100031243 teaches in order to ensure safe operation of the circuit breaker even after a software update, at least one embodiment of the invention proposes that the updated software which has been copied to this storage area is checked by way of an external test device, that the test device, in the event of updated software which has been copied without any faults, writes a fault-free identification to the/a nonvolatile storage area, and that the updated software is only started by the electronic device if the fault-free identification for the updated software is present.
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/EVRAL E BODDEN/Primary Examiner, Art Unit 2193
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