DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of species a, claims 1, 3-5, and 7-9, in the reply filed on 4 March 2026 is acknowledged.
Claims 2, 6, and 10-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 4 March 2026.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Drawings
The drawings are objected to because reference numeral 106 points to two distinct elements: 1.) a device circuit, and 2.) a plurality of contacts. A reference numeral may only identify a single element or a plurality of said element. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: SEMICONDUCTOR PACKAGING STRUCTURE.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 7, and 9 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kim et al. (US Patent Application Publication 2024/0040806, hereinafter Kim ‘806).
With respect to claim 1, Kim ‘806 teaches (FIG. 8) a semiconductor packaging structure as claimed, comprising:
a device package (left half of LP3) ([0079]), comprising:
a substrate (uppermost layer of 110) ([0024]);
a device circuit (130) disposed on and coupled to the substrate (uppermost layer of 110) ([0024]);
a set of vertical conductive elements (153) disposed on and coupled to the substrate (uppermost layer of 110), wherein the set of vertical conductive elements is disposed on a periphery of the device circuit (130) ([0024]); and
a molding layer (151a) encapsulating the device circuit (130) and the set of vertical conductive elements (153) ([0079]); and
a first memory package (UP) stacked on the molding layer (151a), and coupled to the substrate (uppermost layer of 110) through the set of vertical conductive elements (153) ([0023, 0047]).
With respect to claim 7, Kim ‘806 teaches wherein the set of vertical conductive elements (153) comprises one or more conductive elements that are vertically bonded to one or more contacts (unnumbered shown directly below and contacting vertical conductive elements 153) on the substrate (uppermost layer of 110), respectively ([0024]).
With respect to claim 9, Kim ‘806 teaches wherein a size of a top surface of a vertical conductive element from the set of vertical conductive elements (153) is equal to a size of a bottom surface of the vertical conductive element ([0024]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-5 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Kim ‘806 as applied to claim 1 above, and further in view of Kim et al. (US Patent Application Publication 2013/0069239, hereinafter Kim ‘239).
With respect to claims 3 and 4, Kim ‘806 teaches the device as described in claim 1 above, including the additional limitations wherein: the device circuit (130) is disposed on a first side of the substrate (uppermost layer of 110); and the semiconductor packaging structure further comprises: a lower substrate (lowermost layer of 110) disposed on a second side opposite to the first side of the substrate, and coupled to the substrate on the second side of the substrate; and further comprising: a second memory package (right half of LP3) disposed on the lower substrate side by side with the device package (left half of LP3) and coupled to the lower substrate ([0024, 0047]).
Thus, Kim ‘806 is shown to teach all the features of the claim with the exception of wherein the lower substrate is a printed circuit board (PCB).
However, Kim ‘239 teaches (FIG. 1) a printed circuit board (PCB) (52) to provide a general substrate for structural support and electrical interconnect for a variety of semiconductor packages ([0043]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the lower substrate of Kim ‘806 as a printed circuit board (PCB) as taught by Kim ‘239 to provide a general substrate for structural support and electrical interconnect for a variety of semiconductor packages.
With respect to claim 5, Kim ‘806 teaches wherein: the device circuit (130) comprises a system on chip (when selected from SoC; [0047]), and the device package (left half of LP3) comprises an SoC package (when selected from SoC; [0047]); the first memory package (UP) comprises a volatile memory device (when selected from e.g. DRAM; [0047]); and the second memory package (120) comprises a non-volatile memory device and a memory controller (when selected from e.g. MRAM and a controller; [0047]).
With respect to claim 8, Kim ‘806 teaches the device as described in claim 1 above with the exception of the additional limitation wherein a material of the set of vertical conductive elements comprises gold.
However, Kim ‘239 teaches (FIG. 17p) gold as a known material suitable for the intended use as a vertical conductive element (724) ([0174]). Further, the selection of a known material based on its suitability for its intended use supports a prima facie obviousness determination. Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) and In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960). See MPEP 2144.07.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed a material of the set of vertical conductive elements of Kim ‘806 comprising gold as taught by Kim ‘239 as a known material suitable for the intended use as a vertical conductive element.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher M. Roland whose telephone number is (571)270-1271. The examiner can normally be reached Monday-Friday, 10:00AM-7:00PM Eastern.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at (571)270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/C.M.R./Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
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