DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 USC 102 and 103 (or as subject to pre-AIA 35 USC 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Specification Objections
The disclosure is objected to under 37 CFR 1.71(a) because of the following informalities:
(a) ¶5 should end in a single period.
(b) In ¶36, line 6, --to-- should be inserted between "220_1_1" and "220_1_X".
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 5-8, 12-14, and 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Rheinfelder (US 2016/0329631 A1).
In regard to claim 1, Rheinfelder discloses a beamforming antenna device, comprising:
a plurality of antenna elements (2, Fig. 12b); and
a plurality of sub-arrays (antenna module 23, Fig. 12a; antenna modules M1, M2, M3, and M4, Fig. 10b; ¶140) coupled to the plurality of antenna elements (Fig. 12a), wherein each of the sub-arrays is coupled to its adjacent sub-arrays of the plurality of sub-arrays, and at least a portion of the plurality of sub-arrays form a sub-array chain (Fig. 10b; ¶140).
In regard to claim 2, Rheinfelder further discloses:
a clock signal originated from a master sub-array of the sub-arrays is sequentially propagated through the rest of the sub-arrays (clock, Fig. 12a; ¶170); and
in a receiving mode, the sub-arrays in the sub-array chain are configured to derive in-phase signals by performing phase align operations according to antenna signals received by the antenna elements, and aggregate the in-phase signals along the sub-array chain to generate a beamformed signal (¶40; ¶111) [where the aggregation results in constructive interference in the direction of the communication partner].
In regard to claim 5, Rheinfelder further discloses a system reference signal originated from the master sub-array is sequentially propagated through the rest of the plurality of sub-arrays, and the system reference signal is configured to synchronize the sub-arrays in the sub-array chain for performing the phase align operations (¶143; ¶156; ¶170).
In regard to claim 6, Rheinfelder further discloses each of the plurality of sub-arrays comprises:
a plurality of frontend circuits, wherein each of the plurality of frontend circuits is configured to receive signals from an antenna element or to transmit signals to the antenna element (35, 36, 38, 15, Fig. 8b) [where each sub-array contains multiple sets of antenna paths (Fig. 12a)];
a main path (Fig. 8b) [where the path in Fig. 8b is being considered the main path, where the claim does not recite any criteria for determining/limiting what is considered a main path] comprising:
a plurality of data conversion circuits, each configured to convert an analog receiving signal to a digital received signal for processing and convert a digital transmitting signal to an analog transmitting signal for transmission (34, 39, Fig. 8b); and
a switch unit (44, Fig. 8b);
a plurality of data process units, each coupled to a corresponding data conversion circuit of the plurality of data conversion circuits through the switch unit, and configured to perform a phase align operation to the digital received signal and generate the digital transmitting signal (41, Fig. 8b) [where there are multiple DSP's in a subarray of multiple antenna paths; and where the order of the components matches applicant's disclosed order of components, where both Fig. 8b of Rheinfelder and Fig. 16 of applicant show a data processing unit to the far left with data conversion circuits to its right with a switch unit to its right].
In regard to claim 7, Rheinfelder further discloses each of the plurality of sub-arrays further comprises a calibration path having a substantially same structure as that of the main path (Fig. 8b and Fig. 9b) [where Fig. 9b is being considered the calibration path (the path involved calibration), and where the large majority of components in Fig. 9b are also in 8b (e.g. Calibrierung, ADC, multipliers, amplifier, duplexer, antenna, couplers, switch, DAC, DSP).
In regard to claim 8, Rheinfelder further discloses the switch unit comprises a plurality of switches (44, Fig. 8b) [where there are multiple switches in a subarray of multiple antenna paths] and is configured to control electric connections between the plurality of data conversion circuits and the plurality of frontend circuit for internal calibration (44 connect 39 to 15, Fig. 8b).
In regard to claim 12, Rheinfelder discloses a method for operating a beamforming antenna device, wherein the beamforming antenna device comprises:
a plurality of antenna elements (2, Fig. 12b) and
a plurality of sub-arrays coupled to the antenna elements (antenna module 23, Fig. 12a; antenna modules M1, M2, M3, and M4, Fig. 10b; ¶140), the method comprises:
propagating a clock signal originated from a master sub-array of the plurality of sub-array sequentially through the rest of the plurality of sub-arrays in a manner of node-to-node transmission (clock, Fig. 12a; ¶170);
receiving a plurality of antenna signals by the plurality of antenna elements (Rx Empfans-Chip, Fig. 12a) [where the antennas are used for reception of signals];
deriving in-phase signals by utilizing at least a portion of the plurality of sub-arrays in a sub-array chain to perform phase align operations according to antenna signals received by antenna elements that are coupled to the sub-arrays in the sub-array chain; and aggregating the in-phase signals along the sub-array chain to generate a beamformed signal (¶40; ¶111) [where the aggregation results in constructive interference in the direction of the communication partner].
In regard to claim 13, Rheinfelder further discloses:
configuring a first sub-array, a second sub-array, and a third sub-array of the plurality of sub-arrays as successive sub-arrays in the sub-array chain (M1, M2, M3, Fig. 10b); and
wherein the step of deriving the in-phase signals comprising:
the first sub-array deriving first in-phase signals according to antenna signals received by antenna elements coupled to the first sub-array (¶40; ¶111); and
the second sub-array deriving second in-phase signals according to antenna signals received by antenna elements coupled to the second sub-array (¶40; ¶111).
In regard to claim 14, Rheinfelder further discloses the step of aggregating the in-phase signals along the sub-array chain to generate the beamformed signal comprises: the first sub-array combining at least the first in-phase signals to generate a first partial aggregation result to the second sub-array; the second sub-array receiving the first partial aggregation result from the first sub-array, and the second sub-array combining the first partial aggregation result and the second in-phase signals to generate a second partial aggregation result to the third sub-array (¶40; ¶111) [where the aggregation results in constructive interference in the direction of the communication partner, where each subarray provides a partial aggregation result, and where the partial aggregation results are combined into an overall aggregation result].
In regard to claim 16, Rheinfelder further discloses:
the sub-arrays in the sub-array chain (M1, M2, M3, and M4, Fig. 10b) comprise a first sub-array (M1, Fig. 10b; 23, Fig. 12a), and the first sub-array comprises:
a plurality of frontend circuits (35, 36, Fig. 8b) [where each antenna module/subarray 23 comprises multiple antenna paths corresponding to the one shown in Fig. 8b];
a plurality of data conversion circuits (34, Fig. 8b) [where each antenna module/subarray 23 comprises multiple antenna paths corresponding to the one shown in Fig. 8b]; and
a plurality of data process units (18, Fig. 8b; p. 8, lines 2-3; ¶128) [where each antenna module/subarray 23 comprises multiple antenna paths corresponding to the one shown in Fig. 8b; and where baseband data is generated by baseband chip 18];
the method further comprises, in a transmitting mode:
a first data process unit of the first sub-array transmitting a digital transmitting signal to a first data conversion circuit of the first sub-array (18 to 34, Fig. 8a);
the first data conversion circuit converting the digital transmitting signal to an analog transmitting signal (DAC 34, Fig. 8b); and
a first frontend circuit of the first sub-array transmitting the analog transmitting signal to a corresponding antenna element (35/36 to 2, Fig. 8b).
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Qiu (CN 106526571 A).
Qiu discloses a beamforming antenna device, comprising:
a plurality of antenna elements (210, 211, Fig. 2); and
a plurality of sub-arrays coupled to the plurality of antenna elements (horizontal sub-arrays, Fig. 2), wherein each of the sub-arrays is coupled to its adjacent sub-arrays of the plurality of sub-arrays (through 230, 231, 240, 241, Fig. 2), and at least a portion of the plurality of sub-arrays form a sub-array chain (each horizontal sub-array being a chain of antenna elements).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3-4, 15, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rheinfelder, as applied to claims 2 and 12-13, above, and further in view of van Vliet (WO 2011/119028 A1).
In regard to claim 3, Rheinfelder further discloses:
the sub-arrays in the sub-array chain comprise a first sub-array, a second sub-array, and a third sub-array (M1, M2, M3, Fig. 10b);
the first sub-array is configured to derive first in-phase signals according to antenna signals received by antenna elements coupled to the first sub-array, and combine at least the first in-phase signals to generate a first partial aggregation result to the second sub-array (¶40; ¶111) [where the aggregation results in constructive interference in the direction of the communication partner]; and
the second sub-array is configured to derive second in-phase signals according to antenna signals received by antenna elements coupled to the second sub-array, receive the first partial aggregation result from the first sub-array, and combine the first partial aggregation result and the second in-phase signals to generate a second partial aggregation result to the third sub-array (¶40; ¶111) [where the aggregation results in constructive interference in the direction of the communication partner].
Rheinfelder fails to disclose when the second sub-array is determined to be failed, the first partial aggregation result outputted by the first sub-array is bypassed to the third sub-array without being processed by the second sub-array.
van Vliet teaches, when the second sub-array is determined to be failed, the first partial aggregation result outputted by the first sub-array is bypassed to the third sub-array without being processed by the second sub-array (p. 7, lines 14-18).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to include this feature into the combination with a reasonable expectation of success in order to allow beamforming even when a portion of the array has failed.
Additionally, this is a combining of prior art elements according to known methods to yield predictable results, the predictable result being that beamforming occurs.
In regard to claim 4, van Vliet further teaches transmitting the first partial aggregation result outputted by the first sub-array to the third sub-array so as to bypass the second sub-array in a bypass state, and transmit the second partial aggregation result generated by the second sub-array to the third sub-array in a normal state (p. 7, lines 14-18).
The Office takes Official Notice that one of ordinary skill in the art would have found it well known before the effective filing date of the invention to use a switch unit in order to implement the bypass state, wherein the switch unit is disposed inside the second sub-array or outside the second sub-array.
In regard to claim 15, van Vliet further teaches determining if any sub-array is failed; and when the second sub-array is determined to be failed, bypassing the first partial aggregation result outputted by the first sub-array to the third sub-array without being processed by the second sub-array (p. 7, lines 14-18).
In regard to claim 20, the Office takes Official Notice that one of ordinary skill in the art would have found it well known before the effective filing date of the invention to configure a plurality of switch units to control electrical connections between adjacent sub-arrays so as to form the sub-array chain in the sub-array network allowing bypassing of subarrays when necessary.
Claim(s) 9 and 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Rheinfelder, as applied to claims 6, 12, and 16, above, and further in view of Green (US 2008/0036648 A1).
In regard to claim 9, Rheinfelder further discloses the sub-arrays in the sub-array chain comprise a first sub-array, and a second sub-array adjacent to the first sub-array (M1, M2, Fig. 10b).
Rheinfelder fails to disclose, in a receiving calibration mode, the first sub-array is configured to send a first test signal to a frontend circuit of the first sub-array and a second test signal to a frontend circuit of the second sub-array so as to estimate a receiving delay between the first sub-array and the second sub-array.
Green teaches, in a receiving calibration mode, the first sub-array is configured to send a first test signal to a frontend circuit of the first sub-array and a second test signal to a frontend circuit of the second sub-array so as to estimate a receiving delay between the first sub-array and the second sub-array (Fig. 3 and 5; ¶40; ¶42) [particularly ¶40, lines 26-29].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to include this feature into the combination with a reasonable expectation of success in order to calibrate the subarrays to increase the accuracy of beamforming.
Additionally, this is a combining of prior art elements according to known methods to yield predictable results, the predictable result being that the accuracy of beamforming is increased through calibration.
In regard to claim 17, Green further teaches performing an intra-node calibration to estimate internal delays among the plurality of frontend circuits within each of the sub-arrays (Fig. 3 and 5; ¶40; ¶42).
In regard to claim 18, Rheinfelder further discloses the sub-arrays in the sub-array chain further comprise a second sub-array adjacent to the first sub-array (M1, M2, Fig. 10b).
Green further teaches, in a receiving calibration mode: the first sub-array sending a first test signal to a frontend circuit of the first sub-array; the first sub-array seconding a second test signal to a frontend circuit of the second sub-array; and estimating a receiving delay between the first sub-array and the second sub-array according to signals received by the frontend circuit of the first sub-array and the frontend circuit of the second sub-array (Fig. 3 and 5; ¶40; ¶42) [particularly ¶40, lines 26-29].
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Qiu, as applied to claim 1, above, and further in view of De Los Santos (Introduction to Microelectromechanical (MEM) Microwave Systems).
Qiu further discloses phase shifters connecting the subarrays (230, 231, Fig. 2; p. 5, ¶11).
Qiu fails to explicitly disclose a plurality of switch units, configured to control electrical connections between adjacent sub-arrays so as to form the sub-array chain.
De Los Santos teaches that a phase shifter may be implemented with a plurality of switch units (Fig. 6.6(c) on p. 168).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to include this feature into the combination with a reasonable expectation of success in order to implement the phase shifters in Qui.
Additionally, this is a combining of prior art elements according to known methods to yield predictable results, the predictable result being that the phase shifters in Qiu are implemented.
The following reference(s) is/are also found relevant:
Welle '476 (US 2024/0310476 A1), which teaches a plurality of antenna elements (104, 105, Fig. 1; 302, 303, Fig. 3); and a plurality of sub-arrays coupled to the plurality of antenna elements, wherein each of the sub-arrays is coupled to its adjacent sub-arrays of the plurality of sub-arrays, and at least a portion of the plurality of sub-arrays form a sub-array chain (101, Fig. 1-2; 301, Fig. 3-4).
Applicant is encouraged to consider these documents in formulating their response (if one is required) to this Office Action, in order to expedite prosecution of this application.
Allowable Subject Matter
Claim(s) 10 and 19 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reasons for Allowance/Allowable Subject Matter
The following is an examiner's statement of reasons for allowance/allowable subject matter:
The references cited, alone or in combination, do not teach or make obvious the following limitation(s):
quoted from claim 10, in combination with the claim as a whole:
"in a transmitting calibration mode, the first sub-array is configured to send a first test signal to a frontend circuit of the second sub-array, and the second sub-array is configured to send a second test signal to the frontend circuit of the second sub-array so as to estimate a transmitting delay between the first sub-array and the second sub-array".
quoted from claim 19, in combination with the claim as a whole:
"in a transmitting calibration mode: the first sub-array sending a first test signal to a frontend circuit of the second sub-array; the second sub-array sending a second test signal to the frontend circuit of the second sub-array; and estimating a transmitting delay between the first sub-array and the second sub-array according to signals received by the frontend circuit of the second sub-array".
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled "Comments on Statement of Reasons for Allowance".
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Fred H. Mull whose telephone number is 571-272-6975. The examiner can normally be reached on Monday through Friday from approximately 9-5:30 Eastern Time.
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Fred H. Mull
Examiner
Art Unit 3645
/F. H. M./
Examiner, Art Unit 3645
/ROBERT W HODGE/Supervisory Patent Examiner, Art Unit 3645