CTNF 18/517,900 CTNF 88939 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Oath/Declaration The Oath/Declaration filed on 11/22/2023 and 12/28/2023 are hereby acknowledged. Drawings 06-37 AIA The drawings were received on 11/22/2023 . These drawings are objected too. Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). The specification explicitly state (page 10 line 8-9) “FIG. 1 is a schematic diagram of a prior art Direct-Sampling Software defined radio.” Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance . Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claim 41-44 and 46 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. 07-34-05 AIA Claim 41 and 42 recites the limitation " signal processing block " in line 1, respectively . There is insufficient antecedent basis for this limitation in the claim. Claim 46 recites the limitation "an input upstream of the tunable bandpass filter outer signal loop that is connected to a receive device" in line 1-2. This statement appears incomprehensible since it is unclear what role/function “outer signal loop” provides in the claimed limitation. Claims 43 and 44 are also rejected for its dependencies of above. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 30, 32 and 38 are rejected under 35 U.S.C. 102 ( a)(1 ) as being anticipated by Philips et al. (US 20060164272 A1) . Regarding Claim 30 , Philips et al. discloses; A receive module for a digital communication device (Fig. 1: a receiver), the receive module comprising: a bandpass filter (Fig. 1, 2, 6, 7: at least bandpass filter G or I 2 ) having a passband (Fig. 1, 2, 6 , 7: ; Para. [0007]: “polyphase filters can realize both the bandpass filtering”. That is, at least filter G or I 2 is a bandpass filter having a passband (see Fig. 6, 7)); an analog-to-digital converter (“ADC”) (Fig. 1: quantizer Q) downstream of the bandpass filter (Fig. 1: ADC/“quantizer Q” is downstream of at least bandpass filter G or I 2 ), the ADC having an output connected to a processor (Fig. 1: “digital circuitry” after filter F) of the digital communication device (Fig. 1, Para. [0020]: “The output of the filter F may be processed in further digital circuitry (not shown)” processor/“decimation filter F”); a positive feedback path (Fig. 1: from output of I 2 to M 3 to input “+” input to C 1 ) that extends from between the bandpass filter and the ADC to upstream of the bandpass filter (Fig. 1: output of “coefficient multiplier M 3 ” is “added” to the input signal X(s) constituting a positive feedback path that extends from between the bandpass filter I 2 and the ADC/”quantizer Q” to upstream of the bandpass filter I 2 ); and a negative feedback path (Fig. 1: signal path from quantizer Q to Y(z) to D to M 1 to “-” input to C 1 ) that extends from downstream of the ADC to upstream of the bandpass filter (Fig. 1: output of “coefficient multiplier M 1 ” is “subtracted” from the input signal X(s) constituting a negative feedback path that extends from downstream of the ADC/”quantizer Q” to upstream of the bandpass filter I 2 ), the negative feedback path comprising a digital-to-analog converter (“DAC”) (Fig. 1: negative feedback path includes a “digital to analog converter D”); wherein, in operation, the positive feedback path reinforces a signal in the passband (Fig. 1, Para. [0020], [0022]: “an automatic gain control stage B that controls the magnitude of the coefficients b, d 1 and τ 1 in respectively the units M 3 , M 1 and I 1 ”; “The coefficient multiplier M 3 …provides additional suppression of the quantization noise by implementing a local resonance close to the pass band of the desired signals.” That is, controlling or applying the magnitude, b, to unit M 3 controls a gain of the positive feedback loop thus reinforces a signal in the passband) and the negative feedback path suppresses internal noise generated downstream of the bandpass filter (Fig. 1, Para. [0020], [0021]: “an automatic gain control stage B that controls the magnitude of the coefficients b, d 1 and tau1 in respectively the units M 3 , M 1 and I 1 ”; “The coefficient multiplier M 1 [in the negative feedback path]…shift the quantization noise associated therewith to the higher frequency range (noise-shaping)” to signals output downstream of the bandpass filter I 2 ). Regarding Claim 32 , Philips et al. discloses: A signal processing circuit for a digital communication device (Fig. 1: a receiver), comprising: an outer signal loop (Fig. 1: loop from quantizer Q to Y(z) to D to M 1 to “-” input to C 1 constituting an outer signal loop) comprising an input (Fig. 1: input to “quantizer Q”), an output (Fig. 1: an output of M 1 ), and a transformation block adapted to perform a signal transformation operation on a signal being processed (Fig. 1: at least “quantizer Q” +”unit F”+ “unit B” (transformation block) transforms a signal begin processed to digital domain); and an inner signal loop (Fig. 1: output of I 2 to M 3 to input “+” input to C 1 constituting an inner signal loop) comprising a tunable bandpass filter (Fig. 1, 2, Para. [0007]: “All the filters, the quantizer and the DA-converter have to be implemented to handle polyphase signals…the polyphase filters [e.g. Fig. 1: filters I 1 , I 2 ] can realize both the bandpass filtering to reject neighboring channels and the image-reject filtering.” That is, the at least filter I 1 , in the inner loop, is a tunable bandpass filter), the inner signal loop being nested within the outer signal loop (Fig. 1: output of I 2 to M 3 to input “+” input to C 1 (inner signal loop) is nested inside the outer signal loop (“quantizer Q” to the input at C 1 ) such that the tunable bandpass filter is connected within each of the inner signal loop and the outer signal loop (Fig. 1: the at least filter I 1 in connected within each of the inner signal loop and the outer signal loop), and the transformation block is connected outside the inner signal loop (Fig. 1: “quantizer Q”(transformation block) is connected outside for output of I 2 input to C 1 (the inner signal loop)). Regarding Claim 38 , Philips et al. discloses: wherein the outer signal loop is a negative feedback loop (Fig. 1: output of “coefficient multiplier M 1 ” is “subtracted” from the input signal X(s) constituting the outer signal loop as a negative feedback path) and the inner feedback loop is a positive feedback loop (Fig. 1: output of “coefficient multiplier M 3 ” is “added” to the input signal X(s) constituting the inner loop as a positive feedback path ) . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim s 1-9 and 11-29 are rejected under 35 U.S.C. 103 as being unpatentable over NIELSEN et al. (WO 2018215973 A1) in view of Philips et al. (US 20060164272 A1) . Regarding Claim 1 , NIELSEN et al. discloses; A signal processing circuit (Fig. 1, 20), comprising: a first signal loop comprising a first signal processing block (Fig. 1, 4: elements 104, 502, 104/ “resonator 1301”) and a first feedback path that extends around the first signal processing block (Fig. 4, 20, Para. [0046]: “Resonator 1301 incorporates a feedback loop [first feedback path] across a resonator element 1401”; first "feedback 110" path), the first signal processing block having a frequency dependence that causes the first signal loop to generate a passband (Fig. 2, 23, Para. [00106], [00125]: together with "resonator"/first signal processing block as “ATL” i.e. "active analog variable band pass filter" are responsive to/dependence to the input frequency generating a passband); a second signal processing block (Fig. 1: “Scaling block 504”) downstream of the first signal loop (Fig. 1, 20, Para. [00105]: input to “Scaling block 504” is downstream to “Resonator 1301”) and a second feedback path (Fig. 1, 20: “feedback path 510”/ “Level Two control loop 110a”) that extends from downstream of the second signal processing block to upstream of the first signal processing block (Fig. 1, 20, Para. [00105]: “The outer Level Two control loop 110a [second feedback path] that is around the three individual ATLI core 940 modules [i.e. extends from downstream to “Resonator 1301”]…”); wherein, in operation, the first feedback path reinforces a signal in the passband (Fig. 4, 17, Para. [0053], [0078]: “if the gain of the scaling block 802 is greater than zero, there results Q-enhancement [i.e. reinforces signals in the passband]”). NIELSEN et al. does not teach that “the second feedback path”: “conditions the signal at an output downstream of the first signal processing block.” On the other hand, in similar field of endeavor (Fig. 1, Para. [0018]: “receiver…that receives a band of communication channels”), Philips et al. teaches a second feedback path: “conditions the signal at an output downstream of the first signal processing block” (Fig. 1, Para. [0020], [0021]: “an automatic gain control stage B that controls the magnitude of the coefficients b, d 1 and τ 1 in respectively the units M 3 , M 1 and I 1 ”; “The coefficient multiplier M 1 [in the second feedback path]…shift the quantization noise [conditioning] associated therewith to the higher frequency range (noise-shaping) [i.e. applying gain coefficient, d 1 , to coefficient multiplier M 1 , conditions the signal at an output downstream of a circuit/processing block]”). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that “The outer Level Two control loop 110a/second feedback path in NIELSEN et al.’s invention can provide noise-shaping in the signal produced at the output the “resonator 1401” block or “resonator 1301” as taught by Philips et al. where doing so would (Philips et al. Para. [0006]) provide “to reduce the dynamic range of the signals generated by the analog to digital converter and consequently to reduce the complexity of the digital circuitry that has to process these signals.” Regarding Claim 2 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 1 above, where Philips et al. further teaches; wherein the first feedback path is a positive feedback path (Fig. 1: output of “coefficient multiplier M 3 ” is “added” to the input signal X(s) constituting the first feedback path as a positive feedback path ), the second feedback path is a negative feedback path (Fig. 1: output of “coefficient multiplier M 1 ” is “subtracted” from the input signal X(s) constituting the second feedback path as a negative feedback path), and wherein the negative feedback path suppresses internal noise generated downstream of the first signal processing block (Fig. 1, Para. [0021]: “The coefficient multiplier M 1 [in the second feedback path]…shift the quantization noise associated therewith to the higher frequency range (noise-shaping)” to signals output by the “quantizer Q”(first signal processing block)). Regarding Claim 3 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 1 above, where NIELSEN et al. further teaches; wherein the first signal processing block comprises a resonator (Fig. 1, 3, 4, Para. [0046]: “resonator 1301”). Regarding Claim 4 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 3 above, where NIELSEN et al. further teaches; wherein a central frequency, a frequency selectivity, or both a central frequency and a frequency selectivity of the resonator is tunable (Fig. 1, Para. [0012], [0734]: “the primary resonator may be a fixed resonator or a resonator that is tunable in frequency” “we have the frequency control f, which affects the varactor diodes of the resonators in the loop”). Regarding Claim 5 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 4 above, where NIELSEN et al. further teaches; comprising an adjustable scaling block in the first feedback path (Fig. 1, 4: adjustable scaling block 502/802 in the first feedback path), the second feedback path (Fig. 1, 4: adjustable scaling block 504 in the second feedback path), or both the first feedback path and the second feedback path (Fig. 1, 4: adjustable scaling block 502/802 in the first feedback path and adjustable scaling block 504 in the second feedback path). Regarding Claim 6 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 3 above, where Philips et al. further teaches; wherein the second signal processing block applies a first domain transformation (Fig. 1: second signal processing block/“quantizer Q” applies a first analog to digital domain transformation), and the second feedback path comprises a third processing block (Fig. 1: the second feedback path includes a “digital to analog converter D” (third processing block)) that applies a second domain transformation that is an inverse of the first domain transformation (Fig. 1: “digital to analog converter D” applies a second digital to analog domain transformation that is an inverse of the first analog to digital domain transformation). Regarding Claim 7 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 6 above, where Philips et al. further teaches; wherein the second signal processing block comprises an analog-to-digital converter (“ADC”) (Fig. 1: “quantizer Q”), and the third processing block comprises a digital-to-analog converter (“DAC”) (Fig. 1: “digital to analog converter D”). Regarding Claim 8 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 7 above, where Philips et al. further teaches; wherein the internal noise comprises quantization noise from the ADC (Fig. 1, Para. [0021]: “function of a ΣΔ-modulator is to digitize the signal and to shift the quantization noise associated therewith to the higher frequency range (noise-shaping) between the frequency band of interest and half the sample (clock) frequency of the quantizer”). Regarding Claim 9 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 7 above, where Philips et al. further teaches; “further comprising a digital signal processor (Fig. 2, 4: “filters H”/“filters H[z]”) that conditions a signal in the second feedback path” (Para. [0026]: “optimizing the channel filtering… The channel filtering [conditions a signal] is performed by proper dimensioning of the filters H…”. “filters H”/“filters H[z]” conditions the signal, Y(s), that’s in the second feedback path). Regarding Claim 11 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 1 above, where NIELSEN et al. further teaches; wherein the first signal processing block, the second signal processing block, or both the first signal processing block and the second signal processing block comprises at least a phase control element (Para. [0124]: “ an adjustable phase shifter may also be used to provide some circuit control . There will be described below some examples of adjustable phase shifters that may be used in the context of ATL-based circuitry . Other types of phase shift elements that provide an adequate level of performance may also be used. ” That is, circuitries such as the first signal processing block 502 and/or the second signal processing block 504 may include “adjustable phase shifter”). Regarding Claim 12 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 3 above, where NIELSEN et al. further teaches; comprising a plurality of bandpass filters connected in series (Fig. 20, Para. [0156]: “The ATLn is a bandpass filter comprised of a series of "n" each ATLl core modules”), each bandpass filter comprising a corresponding first feedback path (Fig. 20: each bandpass filter/resonator 1301 comprising a corresponding first “feedback” path). Regarding Claim 13 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 12 above, where Philips et al. further teaches; comprising one or more further second feedback paths (Fig. 1: one further second feedback paths from output “Y(z)” to “D” to “C 2 ”) connected in parallel from downstream of the second signal processing block to between adjacent bandpass filters of the plurality of bandpass filters (Fig. 1: “Y(z)” to “C 2 ”/ one further second feedback paths is connected is in parallel from downstream of the second signal processing block /”quantizer Q” to “C 2 ”). Regarding Claim 14 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 13 above, where Philips et al. further teaches; wherein the first feedback path is a positive feedback path (Fig. 1: positive inner/first feedback path – output from I 2 to positive “+” input to C 1 ), the second feedback path is a negative feedback path (Fig. 1: negative outer/second feedback path – output from Q to negative “-” input to C 1 ), and further comprising a controller (Fig. 1, Para. [0020]: “an automatic gain control stage B”) programmed with instructions to adjust a positive gain block of the positive feedback path to cause the bandpass filter to self-oscillate (Fig. 1, Para. [0020]: “an automatic gain control stage B that controls the magnitude of the coefficients b, d 1 and τ 1 in respectively the units M 3 [gain block of the positive feedback path]…of the ΣΔ-modulator”), and then adjust a negative gain block of the negative feedback path to stabilize the bandpass filter (Fig. 1, Para. [0020]: “automatic gain control stage B that controls the magnitude of the coefficients b, d 1 and τ 1 in respectively the units…M 1 [gain block of the negative feedback path] …of the ΣΔ-modulator”). Regarding Claim 15 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 1 above, where Philips et al. further teaches; wherein the second signal processing block is controlled by a controller (Fig. 1: at least “M 1 ” unit in the second signal processing block (elements/units D, M 2 and M 1 ) is controlled by a controller/an “automatic gain control stage B”). Regarding Claim 16 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 1 above, where NIELSEN et al. further teaches; wherein the first signal processing block comprises an acoustic wave resonator and an adjustable phase control element (Fig. 1, 4, 20, 188, Para. [0006], [0058], [00326]-[00327], [00366]: “an ATL-based circuit [the first signal processing block]” that includes “primary resonator (18810)” that “may be a resonator of different types, such as electrical, electromagnetic, electromechanical, piezoelectric, optical, etc.”, “The primary resonator is an external BAW or SAW RF resonator filter(s)” “Consequently, a number, n, of serially connected ATLl core modules must have phase control across the serial connection… the phase control must be provided such that the end to end phase shift is a multiple of 360 degrees” ). Regarding Claim 17 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 1 above, where NIELSEN et al. further teaches; wherein the first signal processing block comprises a plurality of acoustic wave filters and a switch that selects a desired one of the plurality of acoustic wave filters (Fig. 192: plurality of acoustic wave filters 19210 (BAW/SAW resonators and a Switch matrix 19216 for selecting desired one of the BAW/SAW resonators)). Regarding Claim 18 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 1 above, where Philips et al. further teaches; comprising a signal input (Fig. 1: a signal input at unit C 1 ) upstream of the first signal loop (Fig. 1: the signal input at unit C 1 is upstream of all elements, i.e. units C 1 , I 1 C 2 M3 and I 2 , constituting first signal loop). Regarding Claim 19 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 1 above, where Philips et al. further teaches; comprising a signal input between the first signal processing block and the second signal processing block (Fig. 1: a signal input between unit I 1 and Q which is between first signal units C 1 , I 1 C 2 M 3 and I 2 constituting first signal processing block and at least units Q, D, and M 1 constituting second signal processing block), the second feedback path comprising a negative gain block (Fig. 1, Para. [0020]: a negative gain block/unit M 1 is included in the second feedback path). Regarding Claim 20 , NIELSEN et al. discloses; A method of processing a signal (Abstract: “A method…for modifying or controlling a resonator connected to a signal loop”) using a signal processing circuit (Fig. 1, 20) that comprises a first signal loop (Fig. 1, 4: elements 104, 502, 104/ “resonator 1301”) comprising a bandpass filter (Fig. 20, Para. [0156]: “The ATLn is a bandpass filter comprised of a series of "n" each ATLl core modules”) and a first feedback path (Fig. 4, 20, Para. [0046]: “Resonator 1301 incorporates a feedback loop [first feedback path] across a resonator element 1401”; first "feedback 110" path) that extends around the bandpass filter such that the first signal loop comprises a passband (Fig. 2, 23, Para. [00106], [00125]: together with "resonator"/first signal processing block as “ATL” i.e. "active analog variable band pass filter" are responsive to/dependence to the input frequency generating a passband), a signal processing block (Fig. 1: “Scaling block 504”) downstream of the bandpass filter (Fig. 1, 20, Para. [00105]: input to “Scaling block 504” is downstream to “Resonator 1301”/“ATLn”), and a second feedback path (Fig. 1, 20: “feedback path 510”/ “Level Two control loop 110a”) that extends from downstream of the signal processing block to upstream of the bandpass filter(Fig. 1, 20, Para. [00105]: “The outer Level Two control loop 110a [second feedback path] that is around the three individual ATLI core 940 modules [i.e. extends from downstream to “Resonator 1301”/ “ATLn”]…” ), the method comprising the steps of: causing the first signal loop to generate a filtered signal in the passband (Fig. 2, 23, Para. [00106], [00125]: together with "resonator"/first signal processing block as “ATL” i.e. "active analog variable band pass filter" filter the input frequency generating a filtered signal in the passband); processing the filtered signal using the signal processing block downstream of the bandpass filter such that an output signal is conditioned at an output downstream of the bandpass filter. NIELSEN et al. does not teach that “the signal processing block”/ “Scaling block 504” processes the filtered signal such that: “an output signal is conditioned at an output downstream of the bandpass filter.” On the other hand, in similar field of endeavor (Fig. 1, Para. [0018]: “receiver…that receives a band of communication channels”), Philips et al. teaches a second feedback path: “an output signal is conditioned at an output downstream of the bandpass filter” (Fig. 1, 2, Para. [0021], [0026]: “The coefficient multiplier M 1 [in the second feedback path]…shift the quantization noise associated therewith to the higher frequency range (noise-shaping)”, “The channel filtering is performed by proper dimensioning of the filters H and L, which may be of either first order or higher order or even band pass, and the noise-shaping is performed by proper dimensioning of the filter G which also may be of either first order or higher order or even band pass.” That is, conditioning the signal at an output downstream of a band pass filter, e.g. filter G or I 2 ). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that “The outer Level Two control loop 110a/second feedback path in NIELSEN et al.’s invention can provide noise-shaping in the signal produced at the output the “resonator 1401” block or “resonator 1301” as taught by Philips et al. where doing so would (Philips et al. Para. [0006]) provide “to reduce the dynamic range of the signals generated by the analog to digital converter and consequently to reduce the complexity of the digital circuitry that has to process these signals.” Regarding Claim 21 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 20 above, where Philips et al. further teaches; wherein the first feedback path is a positive feedback path (Fig. 1: output of “coefficient multiplier M 3 ” is “added” to the input signal X(s) constituting the first feedback path as a positive feedback path ), the second feedback path is a negative feedback path (Fig. 1: output of “coefficient multiplier M 1 ” is “subtracted” from the input signal X(s) constituting the second feedback path as a negative feedback path), and wherein conditioning the output signal comprises suppressing internal noise generated downstream of the bandpass filter (Fig. 1 2, Para. [0021], [0026]: “The coefficient multiplier M 1 [in the second feedback path]…shift the quantization noise associated therewith to the higher frequency range (noise-shaping)” to signals output by the band pass filter, e.g. filter G or I 2 ). Regarding Claim 22 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 21 above, where Philips et al. further teaches; wherein the signal processing block applies a domain transformation (Fig. 1: second signal processing block/“quantizer Q” applies a first analog to digital domain transformation), and the negative feedback path comprises a further processing block (Fig. 1: the negative feedback path includes a third processing block/ “digital to analog converter D”) that applies a second domain transformation that is the inverse of the first domain transformation (Fig. 1: digital to analog converter, D, applies a second digital to analog domain transformation that is an inverse of the first analog to digital domain transformation). Regarding Claim23 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 22 above, where Philips et al. further teaches; wherein the signal processing block is an analog-to-digital converter (“ADC”) (Fig. 1: “quantizer Q”) , and the further processing block comprises a digital-to-analog converter (“DAC”) (Fig. 1: “digital to analog converter D”). Regarding Claim 24 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 23 above, where Philips et al. further teaches; wherein the internal noise comprises quantization noise from the ADC (Fig. 1, Para. [0021]: “function of a ΣΔ-modulator is to digitize the signal and to shift the quantization noise associated therewith to the higher frequency range (noise-shaping) between the frequency band of interest and half the sample (clock) frequency of the quantizer”). Regarding Claim 25 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 20 above, where Philips et al. further teaches; the step of adjusting a gain of the first feedback path to cause the bandpass filter to self-oscillate (Fig. 1, Para. [0020]: “an automatic gain control stage B that controls the magnitude of the coefficients b, d 1 and tau1 in respectively the units M 3 [gain block of the positive feedback path]…of the ΣΔ-modulator”), and then adjusting a gain of the second feedback path to stabilize the bandpass filter (Fig. 1, Para. [0020]: “an automatic gain control stage B that controls the magnitude of the coefficients b, d 1 and tau1 in respectively the units…M 1 [gain block of the negative feedback path] …of the ΣΔ-modulator”). Regarding Claim 26 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 20 above, where NIELSEN et al. further teaches; wherein generating a filtered signal and conditioning the output signal comprises controlling a gain factor, a phase, or the gain factor and the phase in each of the first feedback path and the second feedback path (Fig. 4, 17, Para. [0053], [0078]: “if the gain of the scaling block 802 is greater than zero, there results Q-enhancement [i.e. reinforces signals in the passband]”); Para. [0124]: “ an adjustable phase shifter may also be used to provide some circuit control . There will be described below some examples of adjustable phase shifters that may be used in the context of ATL-based circuitry . Other types of phase shift elements that provide an adequate level of performance may also be used. ” That is, circuitries such as the first signal processing block 502 and/or the second signal processing block 504 may include “adjustable phase shifter”. That is, filtering input signal and conditioning the output signal/ filtered signal requires gain factor and/or phase control in first and second feedback paths.). Regarding Claim 27 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 20 above, where NIELSEN et al. further teaches; the step of tuning a central frequency, a frequency selectivity, or both a central frequency and a frequency selectivity of the bandpass filter (Fig. 1, Para. [0012], [0734]: “the primary resonator may be a fixed resonator or a resonator that is tunable in frequency” “we have the frequency control f, which affects the varactor diodes of the resonators [bandpass filter] in the loop”). Regarding Claim 28 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 20 above, where NIELSEN et al. further teaches; comprising a plurality of bandpass filters connected in series(Fig. 20, Para. [0156]: “The ATLn is a bandpass filter comprised of a series of "n" each ATLl core modules”), each bandpass filter comprising a corresponding first feedback path (Fig. 20: each bandpass filter/resonator 1301 comprising a corresponding first “feedback” path). Regarding Claim 29 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 28 above, where Philips et al. further teaches; comprising a plurality of negative feedback paths (Fig. 1: one further second feedback paths from output “Y(z)” to “C 2 ”) connected in parallel from downstream of the signal processing block to upstream of the plurality of bandpass filters and between adjacent bandpass filters (Fig. 1: “Y(z)” to “C 2 ”/ one further second feedback paths is connected is in parallel from downstream of the second signal processing block /”quantizer Q” to “C 2 ”) . 07-21-aia AIA Claim s 10 is rejected under 35 U.S.C. 103 as being unpatentable over NIELSEN et al. (WO 2018215973 A1) in view of Philips et al. (US 20060164272 A1) further in view of OUZOUNOV (US 20180348349 A1) . Regarding Claim 10 , NIELSEN et al. in view of Philips et al. discloses all as applied to claim 7 above, where Philips et al. further teaches; wherein an output of the ADC is connected to a digital signal processor (Fig. 1, Para. [0020]: “The digital output bit-stream of the ΣΔ-modulator SD is fed to a decimation filter F [a digital signal processor] for converting the bit-stream to multi-bit words of reduced sample rate”). NIELSEN et al. in view of Philips et al. does not teach: “a receive channel of a software defined radio.” On the other hand, in similar field of endeavor (Para. [0015]: “band-pass sigma-delta ADC”), OUZOUNOV teaches: “a receive channel of a software defined radio” (Abstract, Fig. 9, 11-13, Para. [0015]: “band-pass sigma-delta ADCs. There may be one or more analog to digital sigma delta converters. These are devices from an emerging technology that is primarily driven by applications like software defined radios.” ) Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that “sigma-delta ADC”/”SD” in NIELSEN et al. in view of Philips et al.’s invention can be implemented in applications/devices like software defined radio as taught by OUZOUNOV where doing so would (OUZOUNOV Para. [0015]) “provide the required flexibility and programmability of the architecture.” 07-21-aia AIA Claim s 31 is rejected under 35 U.S.C. 103 as being unpatentable over Philips et al. (US 20060164272 A1) in view of OUZOUNOV (US 20180348349 A1) . Regarding Claim 31 , Philips et al. discloses all as applied to claim 30 above, however they do not teach; wherein the digital communication device comprises a software defined radio. On the other hand, in similar field of endeavor (Para. [0015]: “band-pass sigma-delta ADC”), OUZOUNOV teaches: “the digital communication device comprises a software defined radio” (Abstract, Fig. 9, 11-13, Para. [0015]: “band-pass sigma-delta ADCs. There may be one or more analog to digital sigma delta converters. These are devices from an emerging technology that is primarily driven by applications like software defined radios.”) Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that the receiver including a “sigma-delta ADC”/”SD” in Philips et al.’s invention can be implemented in applications/devices like software defined radio as taught by OUZOUNOV where doing so would (OUZOUNOV Para. [0015]) “provide the required flexibility and programmability of the architecture.” 07-21-aia AIA Claim s 33-37 and 39-46 are rejected under 35 U.S.C. 103 as being unpatentable over Philips et al. (US 20060164272 A1) in view of NIELSEN et al. (WO 2018215973 A1) . Regarding Claim 33 , Philips et al. discloses all as applied to claim 32 above and further teaches (Fig. 1, Para. [0023]) adjusting the bandpass filter I 1 by applying coefficient “ τ 1 ” however they do not teach; wherein one or more of: a central frequency, a frequency selectivity, a Q factor, or combination thereof, of the bandpass filter are adjustable. On the other hand, in similar field of endeavor (Abstract: “modifying or controlling a resonator connected to a signal loop”), NIELSEN et al. teaches: wherein one or more of: a central frequency, a frequency selectivity, a Q factor, or combination thereof, of the bandpass filter are adjustable (Fig. 1, Para. [0009], [0012],[0156], [0734]: “controlling the low Q variable resonator”, “the primary resonator may be a fixed resonator or a resonator that is tunable in frequency”, “ATLn is a bandpass filter”, “we have the frequency control f, which affects the varactor diodes of the resonators in the loop) Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that adjusting/applying coefficient “tau..sub.1” in NIELSEN et al.’s invention can provide at least adjust Q factor and frequency of the bandpass filter as taught by NIELSEN et al. where doing so would (NIELSEN et al. Para. [0020]) “improve the signal-to-noise ratio or to modify a bandwidth of the desired signal.” Regarding Claim 34 , Philips et al. discloses all as applied to claim 32 above, however they do not teach; wherein the bandpass filter comprises a plurality of resonator outputs. On the other hand, in similar field of endeavor (Abstract: “modifying or controlling a resonator connected to a signal loop”), NIELSEN et al. teaches: wherein the bandpass filter comprises a plurality of resonator outputs (Fig. 20, 192, Para. [0156]: “The ATLn is a bandpass filter comprised of a series of "n" each ATLl core modules” providing a plurality of resonator outputs). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention that the bandpass filter I 1 in NIELSEN et al.’s invention may provide a plurality of resonator outputs as taught by NIELSEN et al. where doing so would (NIELSEN et al. Para. [0020]) “improve the signal-to-noise ratio or to modify a bandwidth of the desired signal.” Regarding Claim 35 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 34 above, where Philips et al. further teaches; the transformation block comprises a processor block (Fig. 1: processor block/“unit B”) that is programmed with instructions to individually control poles of a transfer function of the outer signal loop (Fig. 1, 2, Par. [0019], [0020], [0023], [0031]: “When the quantizer Q delivers single-bit words, this DA-converter can be made very simple by means of a single current source that is AGC-controlled by the unit B and that is switched by the quantizer output pulses.” As depicted in Fig. 1, unit B individually control, based on single-bit words (programmed with instructions), poles of at least a transfer function of unit M 1 in the outer signal loop by applying or controlling the magnitude of the coefficient “d 1 ”). Regarding Claim 36 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 34 above, where Philips et al. further teaches; wherein the transformation block is adapted to apply a domain transfer to at least one of the resonator outputs (Fig. 1, Par. [0023]: “unit B” applies a domain transfer to at least I 1 resonator outputs by controlling the magnitude of the coefficient, τ 1 , ). Regarding Claim 37 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 34 above, where NIELSEN et al. further teaches; wherein the transformation block receives the plurality of resonator outputs in parallel (Fig. 192, Para. [00364]: plurality of acoustic wave filters 19210/resonator outputs are received in parallel by ATLXR circuit). Regarding Claim 39 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 34 above, where Philips et al. further teaches; wherein the transformation block is in a signal path of the outer signal loop or in a feedback path of the outer signal loop (Fig. 1: the “quantizer Q” is in the signal path/feedback path of the outer signal loop). Regarding Claim 40 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 32 above, where Philips et al. further teaches; wherein the inner signal loop comprises a positive feedback path (Fig. 1: output of “coefficient multiplier M 3 ” is “added” to the input signal X(s) constituting the inner loop as a positive feedback path) and the outer signal loop comprises a negative feedback loop (Fig. 1: output of “coefficient multiplier M 1 ” is “subtracted” from the input signal X(s) constituting the outer signal loop as a negative feedback path), such that the positive feedback path reinforces the signal being processed in a passband (Fig. 1, Para. [0022]: “The coefficient multiplier M.sub.3…provides additional suppression of the quantization noise by implementing a local resonance close to the pass band of the desired signals.” That is, reinforces a signal in a passband) and the negative feedback path suppresses internal noise generated downstream of the bandpass filter (Fig. 1, 2, Para. [0021]: “The coefficient multiplier M 1 [in the negative feedback path]…shift the quantization noise associated therewith to the higher frequency range (noise-shaping)” to signals output downstream of the bandpass filter I 2 or G). Regarding Claim 41 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 40 above, where Philips et al. further teaches; wherein the signal processing block applies a first domain transformation (Fig. 1: second signal processing block/“quantizer Q” applies a first analog to digital domain transformation), and the negative feedback path comprises a second processing block (Fig. 1: the negative feedback path includes a second processing block/“digital to analog converter D”) that applies a second domain transformation that is the inverse of the first domain transformation (Fig. 1: digital to analog converter D applies a second digital to analog domain transformation that is an inverse of the first analog to digital domain transformation). Regarding Claim 42 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 41 above, where Philips et al. further teaches; wherein the signal processing block comprises an analog-to-digital converter (“ADC”) (Fig. 1: “quantizer Q”), and the second processing block comprises a digital-to-analog converter (“DAC”) (Fig. 1: “digital to analog converter D”). Regarding Claim 43 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 42 above, where Philips et al. further teaches; wherein the internal noise comprises quantization noise from the ADC (Fig. 1: “digital to analog converter D” generates internal quantization noise). Regarding Claim 44 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 43 above, where Philips et al. further teaches; further comprising a digital signal processor (Fig. 2, 4: “filters H”/“filters H[z]”) that conditions a signal in the negative feedback path (Para. [0026]: “optimizing the channel filtering… The channel filtering [conditions a signal] is performed by proper dimensioning of the filters H…”. “filters H”/“filters H[z]” conditions the signal, Y(s), that’s in the negative feedback path). Regarding Claim 45 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 32 above, where NIELSEN et al. further teaches; the outer signal loop comprising an output connected to a transmit device (Fig. 1, 134: an ATLF containing the outer signal loop/“The outer Level Two control loop 110a” comprising an output of the ATLF that is connected to a transmit device/microcontroller 13420 of the “ATLF based transceiver”). Regarding Claim 46 , Philips et al. in view of NIELSEN et al. discloses all as applied to claim 32 above, where Philips et al. further teaches; the inner signal loop comprising an input (Fig. 1: a signal input at unit C 1 ) upstream of the tunable bandpass filter outer signal loop that is connected to a receive device (Fig. 1: a signal input at unit C 1 in the inner loop is connected to receiver of Fig. 1). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMNEET SINGH whose telephone number is (571)272-2414. The examiner can normally be reached 9:30am to 5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AMNEET SINGH/Examiner, Art Unit 2633 /SAM K AHN/Supervisory Patent Examiner, Art Unit 2633 Application/Control Number: 18/517,900 Page 2 Art Unit: 2633 Application/Control Number: 18/517,900 Page 3 Art Unit: 2633 Application/Control Number: 18/517,900 Page 4 Art Unit: 2633 Application/Control Number: 18/517,900 Page 5 Art Unit: 2633 Application/Control Number: 18/517,900 Page 6 Art Unit: 2633 Application/Control Number: 18/517,900 Page 7 Art Unit: 2633 Application/Control Number: 18/517,900 Page 8 Art Unit: 2633 Application/Control Number: 18/517,900 Page 9 Art Unit: 2633 Application/Control Number: 18/517,900 Page 10 Art Unit: 2633 Application/Control Number: 18/517,900 Page 11 Art Unit: 2633 Application/Control Number: 18/517,900 Page 12 Art Unit: 2633 Application/Control Number: 18/517,900 Page 13 Art Unit: 2633 Application/Control Number: 18/517,900 Page 14 Art Unit: 2633 Application/Control Number: 18/517,900 Page 15 Art Unit: 2633 Application/Control Number: 18/517,900 Page 16 Art Unit: 2633 Application/Control Number: 18/517,900 Page 17 Art Unit: 2633 Application/Control Number: 18/517,900 Page 18 Art Unit: 2633 Application/Control Number: 18/517,900 Page 19 Art Unit: 2633 Application/Control Number: 18/517,900 Page 20 Art Unit: 2633 Application/Control Number: 18/517,900 Page 23 Art Unit: 2633 Application/Control Number: 18/517,900 Page 24 Art Unit: 2633 Application/Control Number: 18/517,900 Page 25 Art Unit: 2633 Application/Control Number: 18/517,900 Page 26 Art Unit: 2633 Application/Control Number: 18/517,900 Page 27 Art Unit: 2633 Application/Control Number: 18/517,900 Page 28 Art Unit: 2633