DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1, 11, 20 have been amended as per Applicant’s amendment filed on August 14, 2026. No claims have been canceled. Claims 1-22 are pending.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 20, 21 are rejected under 35 U.S.C. 102(a)(1) as anticipated by Miyata (US 2020/0257167 A1, Published August 13, 2020).
As to claim 20, Miyata discloses a system comprising: a controller configured to provide channel control signals to turn on or off respective channels; a current sink circuit configured to apply a drive current to one or more channel output terminals responsive to the channel control signals (Miyata at Fig. 1, LED drive circuit 420 including constant current source 422);
a switch circuit configured to couple an LED voltage terminal to a respective LED line terminal responsive to line switch control signals (Miyata at Fig. 1, power supply switching circuit 440a including switch 442 is connected to power source lines PLn (analogous to an LED line terminal));
a discharge circuit coupled to the LED line terminals configured to discharge stored energy associated with a given LED line terminal responsive to the switch circuit being controlled to disconnect a respective LED voltage terminal from the given LED line terminal (Miyata at Fig. 1, discharge control circuit 440b is connected to power source line PLn; ¶ [0110] discloses “The discharge control circuit 440b lowers a voltage level at the anode of each of LEDs 462 included in a corresponding block after an end of a period in which the power source voltage VLED is supplied to the corresponding block.”); and
an LED matrix having a plurality of line inputs and a plurality of line outputs, in which each of the line inputs are coupled to a respective one of the line terminals and each of the line outputs is coupled to a respective one of the channel output terminals (Miyata at Fig. 1, illuminating unit 460 including LEDs 662 are connected to power source lines PLn and LED Drive circuit 420).
As to claim 21, Miyata discloses the system of claim 20, wherein the LED matrix includes an array of LEDs configured as one of a backlight and/or a display panel (Miyata at Fig. 2)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 are rejected under 35 U.S.C. 103 as obvious over Muramatsu (US 2016/0042719 A1, Published February 11, 2016) in view of Miyata (US 2020/02577167 A1, Published August 20, 2020).
As to claim 1, Muramatsu discloses a circuit comprising a plurality of line switches (Muramatsu at Fig. 2, switches (transistor pairs on left side) connected to respective lines Line_n; Fig. 9, switches COMn),
each having a line input terminal, a line terminal and a line control terminal, in which each of the line input terminals is coupled to a light emitting diode (LED) voltage terminal (Muramatsu at Fig. 2; VLED, is analogous to a line input terminal, the common drain of the transistor pair is analogous to a line terminal, and the LINE SELECT SIGNAL is analogous to a line control terminal; Fig. 9, source, drain, and gate of COMn switch respectively)
each line terminal is coupled to a respective LED line terminal of a plurality of LED line terminals in which the plurality of LED line terminals are adapted to be coupled to line inputs of an LED matrix (Muramatsu at Figs. 2, common drains of the transistor pair is adapted to be coupled to Line_n respectively; Fig. 9 sources of COMn transistors are adapted to be coupled to respective COMn lines (LED anodes))…
a current sink circuit coupled between each discharge output terminal and a ground terminal (Muramatsu at Figs. 5-6; ¶ [0021], [0028]-[0029] discloses “When a pre-discharge control signal 540 is on, the pre-discharge transistor 530 sinks current from the OUTPUT and causes parasitic voltages to be reduced. The pre-discharge control signal 540 is asserted a predetermined period of time before output enable signal 520 and de-asserted before the output enable signal turns on the constant current source 510 to drive the OUTPUT”).
Muramatsu does not disclose a discharge circuit the discharge circuit comprising: a plurality of discharge switches, each having a discharge input terminal, a discharge output terminal and a discharge control terminal, in which each discharge input terminal is coupled to a respective LED line terminal.
However, Miyata does disclose a discharge circuit the discharge circuit comprising: a plurality of discharge switches (Miyata at Fig. 1, discharge control circuit 440b including switch 444),
each having a discharge input terminal (Miyata at Fig. 1, connection of power line PLn to switch 444),
a discharge output terminal (Miyata at Fig. 1, connection of switch 444 to ground) and
a discharge control terminal (Miyata at Fig. 1, connection of control signal R1 to switch 444),
in which each discharge input terminal is coupled to a respective LED line terminal (Miyata at Fig. 1, connection of switch 444 to power line PLn).
Muramatsu discloses a base LED display device upon which the claimed invention is an improvement. Miyata discloses a comparable LED display device which has been improved in the same way as the claimed invention. Hence, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify or add to Muramatsu the teachings of Miyata for the predictable result of driving LEDs without causing erroneous light of LEDs (Miyata at ¶ [0027])
Claims 2, 3, 4, 5 are rejected under 35 U.S.C. 103 as obvious over Muramatsu, and Miyata as applied to claim 1 above, and in further view of Kim (CN 1011361169, Published March 5, 2008 – translation attached).
As to claim 2, the combination of Muramatsu and Miyata discloses the circuit of claim 1.
While Muramatsu does depict a plurality of Zener diodes, in which each Zener diode is coupled between a respective discharge input terminal and a respective LED line terminal (Muramatsu at Fig. 9), Muramatsu is silent regarding a plurality of Zener diodes, in which each Zener diode is coupled between a respective discharge input terminal and a respective LED line terminal.
However, Kim does disclose a plurality of Zener diodes, in which each Zener diode is coupled between a respective discharge input terminal and a respective LED line terminal (Kim at Figs. 1, 3, 6, discharge circuit 108, 308, 606, respectively have a Zener diode ZD. MPEP 2144.04(IV & VI) establishes that changes in proportion or duplication of parts are obvious).
The combination of Muramatsu and Miyata discloses a base LED discharge circuit upon which the claimed invention is an improvement. Kim discloses a comparable LED discharge circuit which has been improved in the same way as the claimed invention. Hence, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify or add to the combination of Muramatsu and Miyata the teachings of Kim for the predictable result of reducing power consumption of the display device (Kim at page 6).
As to claim 3, the combination of Muramatsu, Miyata, and Kim discloses the circuit of claim 2, wherein each of the Zener diodes is configured to set a discharge voltage at the respective LED line terminal (Muramatsu at Figs. 1, 3, 6).
The combination of Muramatsu and Miyata discloses a base LED discharge circuit upon which the claimed invention is an improvement. Kim discloses a comparable LED discharge circuit which has been improved in the same way as the claimed invention. Hence, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify or add to the combination of Muramatsu and Miyata the teachings of Kim for the predictable result of reducing power consumption of the display device (Kim at page 6).
As to claim 4, the combination of Muramatsu, Miyata and Kim discloses the circuit of claim 2, wherein the current sink circuit includes a plurality of current sources, in which each respective current source is coupled between a respective discharge output terminal and the ground terminal (Muramatsu at Figs. 1, 5, current source 510).
As to claim 5, the combination of Muramatsu, Miyata, and Kim discloses the circuit of claim 1, wherein the discharge circuit is configured to discharge stored energy associated with a given LED line terminal during a line switch time interval responsive to a respective line switch being controlled to disconnect the LED voltage terminal from the given LED line terminal, in which the line switch time interval represents a time interval between the given LED line terminal being turned off and a next LED line terminal being turned on (Muramatsu at Figs. 3-4).
Claims 6, 7, 8, 9, 10 are rejected under 35 U.S.C. 103 as being unpatentable over Muramatsu and Miyata as applied to claim 1 above, and further in view of Everitt (US 2002/0183945 A1, Published December 5, 2002).
As to claim 6, the combination of Muramatsu and Miyata discloses the circuit of claim 1.
The combination does not disclose a pre-charge circuit that includes a plurality of pre-charge switches, each having a pre-charge input terminal, a pre-charge output terminal and a channel control terminal, in which each pre-charge input terminal is coupled to an input voltage terminal and each pre-charge output terminal is coupled to a respective channel output terminal of a plurality of channel output terminals.
However, Everitt does disclose a pre-charge circuit that includes a plurality of pre-charge switches, each having a pre-charge input terminal, a pre-charge output terminal and a channel control terminal, in which each pre-charge input terminal is coupled to an input voltage terminal and each pre-charge output terminal is coupled to a respective channel output terminal of a plurality of channel output terminals (Everitt at Fig. 4A, switches 478; ¶ [0046]).
The combination of Muramatsu and Miyata discloses a base LED display device upon which the claimed invention is an improvement. Everitt discloses a comparable LED display device which has been improved in the same way as the claimed invention. Hence, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify or add to the combination of Muramatsu and Miyata the teachings of Everitt for the predictable result of overcoming obstacles to accurate generation a desired amount of light output from an LED display, particularly in view of the relatively high parasitic capacitances, and forward voltages which vary with time and temperature, which are quite pronounced in devices like OLEDs (Everitt at ¶ [0035]).
As to claim 7, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 6, wherein the pre-charge circuit is configured to apply a pre-charge voltage to one or more channel output terminals responsive to the one or more channel output terminals being turned off (Everitt at Fig. 4A).
The combination of Muramatsu and Miyata discloses a base LED display device upon which the claimed invention is an improvement. Everitt discloses a comparable LED display device which has been improved in the same way as the claimed invention. Hence, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify or add to the combination of Muramatsu and Miyata the teachings of Everitt for the predictable result of overcoming obstacles to accurate generation a desired amount of light output from an LED display, particularly in view of the relatively high parasitic capacitances, and forward voltages which vary with time and temperature, which are quite pronounced in devices like OLEDs (Everitt at ¶ [0035]).
As to claim 8, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 6, further comprising a current driver for each LED channel, in which each current driver is configured to provide driving current to turn on a respective one of the channel output terminals (Miyata at Fig. 1).
As to claim 9, the combination of Muramatsu, Miyata and Everitt discloses the circuit of claim 6, further comprising an LED matrix having a plurality of line inputs and a plurality of channel outputs, in which each of the line inputs is coupled to a respective line terminal and each of the channel output terminals is coupled to a respective one of the channel outputs (Muramatsu at Figs. 1-2, in particular).
As to claim 10, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 6 implemented as an integrated circuit (Examiner takes an official notice that integrated circuits are well-known in the art).
Claims 11, 12, 13, 16, 17, 18, 19 are rejected under 35 U.S.C. 103 as obvious over Muramatsu (US 2016/0042719 A1, Published February 11, 2016) in view of Miyata (US 2020/0257167 A1, Published August 13, 2020) and Everitt (US 2002/0183945 A1, Published December 5, 2002).
As to claim 11, Muramatsu discloses a circuit comprising: a switch network (Muramatsu at Fig. 2, switches (transistor pairs on left side) connected to respective lines Line_n; Fig. 9, switches COMn) configured to couple a light emitting diode (LED) voltage terminal to a respective LED line terminal of a plurality of LED line terminals responsive to a respective switch control signal in which the plurality of LED line terminals are adapted to be coupled to line inputs of an LED Matrix (Muramatsu at Fig. 2, the VLED connections to the transistor pair are analogous to a LED voltage terminal, and the transistor pair is controlled by LINE SELECTED SIGNAL: Line_n ; Fig. 9, the VLED connection to source of transistor COMn and is controlled by line select signals LSn).
Muramatsu does not disclose a discharge circuit coupled to the plurality of LED line terminals and configured to discharge stored energy associated with a given LED line terminal during a line switch time interval responsive to a respective line switch being turned off to disconnect the respective LED voltage terminal from the given LED line terminal, in which the line switch time interval represents a time interval between the given LED line terminal being turned off and a next LED line terminal being turned on.
However, Miyata does disclose a discharge circuit coupled to the plurality of LED line terminals and configured to discharge stored energy associated with a given LED line terminal during a line switch time interval responsive to a respective line switch being turned off to disconnect the respective LED voltage terminal from the given LED line terminal (Miyata at Figs. 1, 10, discharge control circuit 440b is connected to power source line PLn; ¶ [0110] discloses “The discharge control circuit 440b lowers a voltage level at the anode of each of LEDs 462 included in a corresponding block after an end of a period in which the power source voltage VLED is supplied to the corresponding block.”),
in which the line switch time interval represents a time interval between the given LED line terminal being turned off and a next LED line terminal being turned on (Miyata at Figs. 10, in particular).
Muramatsu discloses a base LED display device upon which the claimed invention is an improvement. Miyata discloses a comparable LED display device which has been improved in the same way as the claimed invention. Hence, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify or add to Muramatsu the teachings of Miyata for the predictable result of driving LEDs without causing erroneous light of LEDs (Miyata at ¶ [0027])
The combination does not disclose a pre-charge circuit configured to provide a pre-charge voltage to one or more respective channel output terminals responsive to the one or more respective channel output terminals being turned off.
However, Everitt does disclose a pre-charge circuit configured to provide a pre-charge voltage to one or more respective channel output terminals responsive to the one or more respective channel output terminals being turned off (Everitt at Fig. 4A, switches 478; ¶ [0046]).
The combination of Muramatsu and Miyata discloses a base LED display device upon which the claimed invention is an improvement. Everitt discloses a comparable LED display device which has been improved in the same way as the claimed invention. Hence, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify or add to the combination of Muramatsu and Miyata the teachings of Everitt for the predictable result of overcoming obstacles to accurate generation a desired amount of light output from an LED display, particularly in view of the relatively high parasitic capacitances, and forward voltages which vary with time and temperature, which are quite pronounced in devices like OLEDs (Everitt at ¶ [0035]).
As to claim 12, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 11, wherein the discharge circuit includes: a plurality of discharge switches, in which each discharge switch is coupled between a respective LED line terminal and a current circuit and configured to turn on and couple a respective line terminal to the current circuit responsive to the respective LED line terminal being turned off (Muramatsu at Fig. 5, predischarge transistor 530).
As to claim 13, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 12, wherein the current circuit includes a respective current source coupled between each discharge switch and a ground terminal, in which each current source is configured to sink current from a respective LED line terminal responsive to the respective discharge switch being turned on (Muramatsu at Figs. 5-6; ¶ [0021]-[0022], [0028]-[0029]).
As to claim 16, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 11, wherein the pre-charge circuit includes a plurality of pre-charge switches, in which each of the pre-charge switches is configured to couple a respective one of the channel output terminals to a pre-charge voltage terminal responsive to a respective one of the channel output terminals being turned off and the pre-charge voltage terminal is configured to supply the pre-charge voltage (Everitt at Fig. 4A, switches 478).
Muramatsu discloses a base LED display device upon which the claimed invention is an improvement. Everitt discloses a comparable LED display device which has been improved in the same way as the claimed invention. Hence, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify or add to Muramatsu the teachings of Everitt for the predictable result of overcoming obstacles to accurate generation a desired amount of light output from an LED display, particularly in view of the relatively high parasitic capacitances, and forward voltages which vary with time and temperature, which are quite pronounced in devices like OLEDs (Everitt at ¶ [0035]).
As to claim 17, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 16, further comprising a current driver for each LED channel, in which each current driver is configured to provide driving current to turn on a respective one of the channel output terminals (Muramatsu at Fig. 8, output diver circuit 830).
As to claim 18, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 11, further comprising an LED matrix having a plurality of line inputs and a plurality of channel outputs, in which each of the line inputs is coupled to a respective line terminal and each of the channel output terminals is coupled to a respective channel output terminal (Muramatsu at Fig. 1).1
As to claim 19, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 11 implemented as an integrated circuit (Examiner takes an official notice that integrated circuits are well-known in the art).
Claims 14, 15 are rejected under 35 U.S.C. 103 as obvious over Muramatsu, Miyata, and Everitt as applied to claims 12 respectively above, and in further view of Kim (CN 1011361169, Published March 5, 2008 – translation attached).
As to claim 14, the combination of Muramatsu, Miyata, and Everitt discloses the circuit of claim 12.
While Muramatsu does depict Zener diodes (Muramatsu at Fig. 9, the combination is silent as to wherein the discharge circuit further includes a plurality of Zener diodes, in which each of the Zener diodes is configured to set a respective discharge voltage at the respective LED line terminal responsive to the discharge switch being turned on to couple the respective LED line terminal to the LED voltage terminal.
However, Kim does disclose that he discharge circuit further includes a plurality of Zener diodes, in which each of the Zener diodes is configured to set a respective discharge voltage at the respective LED line terminal responsive to the discharge switch being turned on to couple the respective LED line terminal to the LED voltage terminal (Kim at Figs. 1, 3, 6, discharge circuit 108, 308, 606, respectively have a Zener diode ZD. MPEP 2144.04(IV & VI) establishes that changes in proportion or duplication of parts are obvious).
The combination of Muramatsu, Miyata, and Everitt discloses a base LED discharge circuit upon which the claimed invention is an improvement. Kim discloses a comparable LED discharge circuit which has been improved in the same way as the claimed invention. Hence, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify or add to the combination of Muramatsu, Miyata, and Everitt the teachings of Kim for the predictable result of reducing power consumption of the display device (Kim at page 6).
As to claim 15, the combination of Muramatsu, Miyata, Everitt, and Kim discloses the circuit of claim 12, wherein each discharge switch is configured to turn off and disconnect the respective line terminal and the current circuit responsive to the respective LED line terminal being turned on (Muramatsu at Fig. 5).2
Claims 22 are rejected under 35 U.S.C. 103 as obvious over Miyata (US 2020/0257167 A1, Published August 13, 2020).
As to claim 22, Muramatsu discloses the system of claim 20, wherein the current sink circuit, the switch circuit, and the discharge circuit are implemented in a respective integrated circuit (Examiner takes an official notice that integrated circuits are well-known in the art. MPEP 2144.04(V) establishes that making integral is obvious).
Response to Arguments
Applicant’s arguments with respect to claims 1-20 have been considered but they are believed to be addressed above, and therefore, moot in view of the new grounds of rejection.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Chang (US 11,783,765 B1, Patented October 10, 2023) is made of record for its relevance to claims 1-22 by disclosing a pre-charging circuit 430 and a pre-discharging circuit 420 as depicted in Fig. 2A:
PNG
media_image1.png
744
506
media_image1.png
Greyscale
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Sanjiv D Patel whose telephone number is (571)270-5731. The examiner can normally be reached Monday - Friday, 9:00 am - 5:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Boddie can be reached at 571-272-0666. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Sanjiv D. Patel/Primary Examiner, Art Unit 2625
08/28/2026
1 See also Everitt at Fig. 4.
2 See also Everitt at Fig. 4A.
Prosecution Insights