DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/22/25 has been entered.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment/Arguments
In the reply filed 12/22/25, directed entry by the RCE filed 1/8/26, claims 1, 4-14, 16 and 18-21 have been amended, claim 17 has been cancelled, and claims 22 and 23 are newly added.
In view of the amendment to claim 16, while the rejection under 35 U.S.C. § 112(d) has been addressed, claim 16 now appears to be similar in scope to claim 7, as indicated under the “Claim Objections” section below.
Regarding the rejection of claim 11 under 35 U.S.C. 112(b), since claim 1 has been amended to recite “a first digital-to-analog converter (DAC)” in line 12, and claim 11 is also amended to recite “a first DAC” in line 3, an objection to claim 11 is raised below as it appears that both recitations of “a first DAC” refer to the same DAC.
Applicant's arguments filed 12/22/25 have been fully considered but they are not persuasive. Claim 1 has been amended to include “a first analog-to-digital converter (ADC)” and “a feedback loop including a first digital-to-analog converter (DAC),” and analogous features have been presented in amended claim 13. While Applicant argues that the cited reference to Gupta fails to teach the claim limitations because “the feedback is based on the co-site transmitted signal and is not based on the output signal derived from the received signal” (Remarks, p. 7), it is respectfully noted that the feedback is also based on the received signal as the output of ADC 535 is provided as input to each of the digital correlators 800 (see Fig. 9). Accordingly, claims 1, 4-10, 12-14, 16 and 18-21 stand rejected, as detailed below.
Claim Objections
Claim 11 is objected to because of the following informalities:
In claim 11, line 3, it is suggested that “a first DAC” be changed back to --the first DAC-- since a first DAC is now introduced in base claim 1. Appropriate correction is required.
Applicant is advised that should claim 7 be found allowable, claim 16 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 22 and 23 are rejected under 35 U.S.C. 112(d) as being in improper dependent form for depending from canceled claim 15.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 7, 9, 12-14, 16 and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gupta et al. U.S. Pat. No. 8,055,235.
Regarding claim 1, Gupta discloses an interferer cancellation device in Fig. 9 comprising:
a device with an antenna input (i.e. 500) to receive a signal and including an output, wherein the signal comprises a wanted signal together with an unwanted interferer, the device comprising:
a subtractor (i.e. flux subtractor circuit in combination with signal combiner 930) including a first subtractor input (i.e. signal 515) coupled to the antenna input to receive the signal, a second subtractor input (i.e. left-most input to signal combiner 930), a third subtractor input (i.e. right-most input to signal combiner 930), and a subtractor output (530), the subtractor configured to subtract a second signal (i.e. output of left-most Amp 570) at the second subtractor input and a third signal (i.e. output of right-most Amp 570) at the third subtractor input from the signal (515) at the first subtractor input to produce the wanted signal (i.e. SR – see col. 11, l. 19) at the subtractor output;
a first analog-to-digital converter (ADC 535) coupled between the subtractor and the output of the device, the first ADC configured to convert a signal at the subtractor output into a digital output signal at the output (see Fig. 9);
a feedback loop including a first digital-to-analog converter (DAC) between the output and the second subtractor input (i.e. DAC before left-most AMP 570 not explicitly shown: col. 11, ll. 59-67), the first DAC configured to provide the second signal (see Fig. 9); and
a feedback device comprising: a recovery element (i.e. DSP 545, digital correlator 800, gain and delay adj. 920, and digital amplifier 565) to reconstruct the unwanted interferer interfering with the wanted signal into digital based on the digital output signal (provided as input to digital correlators 800); and
one or more second DACs (i.e. DACs before AMPs 570 not explicitly shown: col. 11, ll. 59-67), each second DAC including an input coupled to the recovery element (i.e. output of right-most digital amplifier 565) and including an output coupled to the third subtractor input to provide an analog version of the reconstructed unwanted interferer (i.e. Transmit Signal #1 555); and wherein the subtractor subtracts the reconstructed unwanted interferer (i.e. output of right-most Amp 570) and a feedback signal of the feedback loop (i.e. output of left-most Amp 570) from the received signal to produce the wanted signal at the subtractor output (col. 14, ll. 19-24).
Regarding claims 7 and 16, Gupta discloses that the one or more second DACS of the feedback device comprises two second DACs (i.e. see Fig. 9, DACs before middle and right-most AMPs 570, not explicitly shown – col. 11, ll. 59-67).
Regarding claim 9, in one embodiment, the carrier baseband signal, reconstructed by the two second DACs, is up-converted to a center frequency of the unwanted interferer by using up-conversion mixers (550).
Regarding claim 12, the unwanted interferer is a periodic-steady carrier (col. 1, ll. 32-37).
Regarding claim 13, Gupta discloses a method to operate a carrier cancellation device, the method comprising:
receiving a signal comprising a wanted signal (SR) with an unwanted interferer at an input (i.e. see Fig. 9 – signal received from antenna 500);
filtering (via filter 505) and digitizing (via ADC 535) the signal to produce a digital output signal;
producing an analog feedback signal from the digital output signal (i.e. via DAC before left-most AMP 570, not explicitly shown: col. 11, ll. 59-67),
recovering the unwanted interferer based on the digital output signal (i.e. see Fig. 9: right-most chain including digital correlator 800 receiving output of ADC 535);
reconstructing an analog reconstructed recovered unwanted interferer based on the recovered unwanted interferer (i.e. output of digital correlator provided to gain and delay adj. circuits 920, amplifier 565, and DAC before AMP 570 not shown – see col. 11, ll. 59-67; Fig. 9);
and subtracting the analog feedback signal (i.e. from output of left-most digital correlator 800 connected to waveform template library 910 and receiving a feedback signal from ADC 535) and the analog reconstructed unwanted interferer from the signal at the input (via. Signal Combiner 930 and Subtractor Circuit 520) to determine the wanted signal (col. 14, ll. 19-24).
Regarding claim 14, Gupta further discloses that recovering of the unwanted interferer and a band-width limitation of the recovered interferer may be carried out in quadrature baseband (i.e. see Fig. 4; col. 11, ll. 31-37).
Regarding claim 21, Gupta discloses that the feedback device comprises two feedback DACs (i.e. see Fig. 9, DACs before middle and right-most AMPs 570, not explicitly shown – col. 11, ll. 59-67).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 4-6, 8 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Gupta et al. in view of Damm U.S. Pat. App. Pub. No. 2019/0222458.
Regarding claim 4, Gupta discloses an interferer cancellation device as described above, but does not expressly disclose that the at least one second DAC is built such that quantization error resulting in harmonic content are outside of the side bands of the signal.
Damm discloses use of DACs where harmonics occur at unused sideband frequencies outside the frequency of interest (¶ [0042]). It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of the claimed invention, to employ DACs where quantization error resulting in harmonic content are outside of the side bands of the signal, as suggested by Damm, in the interferer cancellation device of Gupta, in order to avoid affecting the signal frequency of interest.
Regarding claim 5, one skilled in the art would recognize that quantization errors are to be defined weaker than the unwanted interferer in order to detect and cancel the interferer.
Regarding claim 6, Gupta discloses an interferer cancellation device as described above, but does not expressly disclose that a band-pass filter is used to limit the bandwidth of the one or more second DACs, such that a quantization error of the one or more second DACs does not interfere with the sidebands of the signal.
Damm discloses use of DACs where harmonics occur at unused sideband frequencies outside the frequency of interest, and may be removed by filtering (¶ [0042]), where one skilled in the art would recognize that band-pass filters may be used to remove content in a specific frequency band of interest. It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of the claimed invention, to use a band-pass filter to filter out components of any residual quantization error, as suggested by Damm, in the interferer cancellation device of Gupta, to remove interfering components from the signal frequency.
Regarding claim 8, Gupta discloses an interferer cancellation device where the feedback device comprises two second DACs, as described above, and further discloses that quadrature baseband processing may be employed (Fig. 3), but does not expressly disclose low-pass filters in quadrature baseband are used to limit a bandwidth of the signals of the two second DACs such that a quantization error of the two second DACs does not interfere with the signal.
Damm discloses use of DACs where harmonics occur at unused sideband frequencies outside the frequency of interest, and may be removed by filtering (¶ [0042]), where one skilled in the art would recognize that low-pass filters may be used to remove content in a specific frequency band of interest from DC to a cutoff frequency. It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of the claimed invention, to use a low-pass filters to filter out components of quantization error, as suggested by Damm, in the interferer cancellation device of Gupta, to remove interfering components.
Regarding claims 18-20, Gupta discloses that the feedback device comprises two feedback DACs (i.e. see Fig. 9, DACs before middle and right-most AMPs 570, not explicitly shown – col. 11, ll. 59-67).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Gupta et al. in view of Damm as applied to claim 8 above, and further in view of Ahmed et al. “Blocker Tolerant Sigma Delta ADC” (submitted by Applicant).
Regarding claim 10, Gupta in combination with Damm disclose an interferer cancellation device comprising DACs and filters, as described above, but do not expressly disclose that the interferer cancellation device is a bandpass Sigma Delta ADC.
Ahmed discloses blocker rejection in bandpass Sigma-Delta ADCs (see abstract). It would have been obvious to one of ordinary skill in the art, prior to the effective filing date of the claimed invention, to use blocker tolerant Sigma-Delta ADCs as taught by Ahmed, in the interferer cancellation device of Gupta et al. as they are preferred in high frequency because of its inherent aliasing filtering and allowing higher speed with lower power consumption (see Gupta, p. 336, section III).
Conclusion
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/DAVID B LUGO/Primary Examiner, Art Unit 2631 1/23/2026