Prosecution Insights
Last updated: May 29, 2026
Application No. 18/519,565

Host System Failover via Data Storage Device Configured to Provide Memory Services

Final Rejection §103
Filed
Nov 27, 2023
Priority
Dec 02, 2022 — provisional 63/385,951
Examiner
RAJAPUTRA, SUMAN
Art Unit
2163
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology, Inc.
OA Round
3 (Final)
69%
Grant Probability
Favorable
4-5
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allowance Rate
114 granted / 165 resolved
+14.1% vs TC avg
Strong +38% interview lift
Without
With
+38.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
19 currently pending
Career history
197
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
90.6%
+50.6% vs TC avg
§102
6.7%
-33.3% vs TC avg
§112
0.2%
-39.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 165 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION 2. This Office Action is in response to the filing with the office dated 12/18/2025. Claims 1, 11 and 17 are independent claims. Claims 1-20 are presented in this office action. Priority 3. Applicant’s claim for the benefit of a prior-filed provisional Application No. 63/385,951 filed on Dec 2, 2022 is acknowledged by the examiner. Response to amendment/arguments 4. Applicant’s arguments with respect to the rejection of claims under 35 U.S.C. § 102 (a)(i) and 103(a) have been fully considered and are not persuasive. Hence, a new Non-Final is being issued. Please see the response to the arguments below. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). Response to 103 rejection 5. Applicant’s arguments on page 2 regarding independent claims 1, 11 and 17 recite “Applicant submits that the cited art does not teach or suggest at least the emphasized elements above. In particular, the claims relate to a first host system that writes first database records to a storage device and a second host system that services requests for both those first database records and second database records, where data identifying changes to be made to the second database records were stored in the storage device by the first host system”. Examiner respectfully disagrees as Factor et al discloses “servicing, by the second host system running the second database manager, database requests based on the first database records and the second database records” ((Paragraphs [0030] [0039], [0040] discloses, in case of failure of a host second host takes over and executes the requests based on the first databases records/ previous records and the second databases records/ modified/ new records are serviced by the second host system). Sreedhar et al also teaches, “servicing, by the second host system running the second database manager, database requests based on the first database records and the second database records” (Paragraph [0070] discloses, In case of powered down, MPSD is decoupled and removed from the first host-computing device and moved and/or coupled to a second host-computing device in order to service/ execute the requests. Also see [0067]). Therefore Factor et al and also Sreedhar et al teach the argued limitation. Therefore the rejection is maintained. Claim Rejections - 35 U.S.C. § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 6. Claims 1-3, 5-20 are rejected under 35 U.S.C. 103 as being unpatentable over Sahin; Adnan (US 20220100687 A1) in view of Factor; Michael (US 20060218200 A1) and in further view of Sreedhar; Pradeep (US 20220398046 A1). Regarding independent claim 1, Sahin; Adnan (US 20220100687 A1) teaches, a method, comprising: providing, over a connection from a host interface of a memory sub-system (Fig. 8 Paragraph [0137] The PDI (peripheral device interconnect) 856 may provide interconnectivity between the CPU 862 and other physical components of the host system that are external (i.e., peripheral) to the CPU, including any of the computing unit 854, the SSI 858 and the other hardware resource(s) 860. The peripheral device interconnect 856 may be a switch that provides connectivity between the CPU and peripheral hardware components (Examiner interprets host interface of a memory sub-system as connection point between the host system (like a CPU) and the memory components (hardware resources))), a first portion of the memory sub-system to a first host system as a memory device accessible via a first protocol and a second portion of the memory sub-system to the first host system as a storage device accessible via a second protocol (Paragraph [0138] the host system 850 may be configured to use portions of the GM (Global memory) 840 as host memory… to employ virtual memory techniques and the direct internal fabric connectivity and RDMA capabilities of the SSI 858, to use portions of the physical storage devices (Examiner interprets first portion using first protocol as accessing the memory portion via memory protocol and a second portion of the memory sub-system to the first host system as a storage device accessible via a I/O protocol) the CXL capabilities of PDI 856 may be used to utilize computer-readable media resources of the storage system 820 as both storage and memory for the host. For example, the I/O protocols and memory protocols of CXL may be used to implement the semantics of storage and memory to utilize the computer-readable media resources of the storage system 820 as both storage and memory); writing, by the first host system running a first database manager and into the storage device via the second protocol, first database records; storing, by the first host system running the first database manager and into the memory device via the first protocol (Paragraph [0034] discloses, writing the data into the storage device via second protocol (I/O protocol). Also See [0044], [0045]); Sahin et al fails to explicitly teach, data identifying changes to second database records to be written into the storage device; loading, by the second host system running a second database manager and according to the second protocol, the data identifying the changes to the second database records; and servicing, by the second host system running the second database manager database requests based on the first database records and the second database records. Factor; Michael (US 20060218200 A1) teaches, data identifying changes to second database records to be written into the storage device (Paragraph [0030] The log records that are written by the host server 10 to the storage server 24 are not complete database records. Rather in some embodiments, they are a journal of modifications to specific portions or fields of the database records. The information in the log record is interpretable on the storage server 24. Alternatively, the log records may be coded or uncoded instructions. In either case, when the information or the instructions are interpreted on the storage server 24, the storage server 24 executes operations to bring the data structures of the target database into a consistent and up-to-date state responsively to the transaction performed in the host server 10 (Examiner interprets identifying changes to the database records as identifying the modified data)); and servicing, by the second host system running the second database manager, database requests based on the first database records and the second database records (Paragraphs [0030] [0039], [0040] discloses, (Paragraphs [0030] [0039], [0040] discloses, in case of failure of a host second host takes over and executes the requests based on the first databases records/ previous records and the second databases records/ modified records are serviced by the second host system. Also see Paragraph [0009]). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Sahin et al by providing, data identifying changes to second database records to be written into the storage device; loading, by the second host system running a second database manager and according to the second protocol, the data identifying the changes to the second database records; and servicing, by the second host system running the second database manager database requests based on the first database records and the second database records, as taught by Factor. et al (Paragraphs [0033], [0034], [0039], [0040]). One of the ordinary skill in the art would have been motivated to make this modification, by doing so saves host resources and also avoids two data transfers--from the log device to the host, and from the host to the main device. The inventive arrangement is particularly advantageous in a network storage environment, as taught by Factor. et al (Paragraph [0010], [0011]). Sahin et al and Factor et al fails to explicitly teach, connecting the connection from the host interface of the memory sub-system to a second host system separate from the first host system to provide the second host system to the memory device via the first protocol and the storage device via the second protocol; loading, by the second host system running a second database manager and according to the second protocol. Sreedhar; Pradeep (US 20220398046 A1) teaches, connecting the connection from the host interface of the memory sub-system to a second host system separate from the first host system to provide the second host system to the memory device via the first protocol and the storage device via the second protocol (Paragraph [0069]- [0071] discloses if the initialization event is determined to be a power cycle event, then the MPSD moved from the first host system to the second host system using different protocols. Examiner interprets power cycle event as failure of the first host system (memory device via the first protocol and the storage device via the second protocol is taught by Sahin et al (Paragraph [0138]). Therefore sreedhar et al with sahin et al combined teach, the entire limitation); loading, by the second host system running a second database manager and according to the second protocol (Paragraph [0073], [0074] If the determined protocol is NVMe, the process 600 may further determine the PMR usage and association such as if the PMR is to be enabled and/or what the values of its various parameters may be such as, but not limited to, size and/or physical and/or logical addresses, etc. (block 620). In many embodiments, the process 600 may further determine if the PMR is enabled and managed within the storage device (block 625). If enabled, then various embodiments of the process 600 may load the most recently stored PMR data into memory at the correct locations (block 630)); and servicing, by the second host system running the second database manager, database requests based on the first database records and the second database records (Paragraph [0035] A device driver for the storage device 120 may maintain metadata 135, such as a logical to physical address mapping structure, to map logical addresses of the logical address space 134 to media storage locations on the storage device(s) 120. The device driver may be configured to provide storage services to one or more host clients 116. The host clients 116 may include local clients operating on the host-computing device 110 and/or remote clients 117 accessible via the network 115 and/or communication interface 113. The host clients 116 may include, but are not limited to: operating systems, file systems, database applications, server applications, kernel-level processes, user-level processes, applications, and the like. Also see [0067], [0070]). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Sahin et al by providing, connecting the connection from the host interface of the memory sub-system to a second host system separate from the first host system to provide the second host system to the memory device via the first protocol and the storage device via the second protocol, as taught by Sreedhar et al (Paragraphs[0069], [0070]). One of the ordinary skill in the art would have been motivated to make this modification, the communications aspects of NVMe, the protocol allows access to various device features and resources. An example of such a feature is the ability to use a persistent memory region (PMR). Such a region is a portion of the storage device's internal memory that maintains its data (e.g., is persistent) between power cycles and/or device initializations as taught by Sreedhar et al (Paragraph [0006]). Regarding dependent claim 2, Sahin et al, Factor et al and Sreedhar et al teach, the method of claim 1. Sahin et al further teaches, wherein the connection is a computer express link connection (Paragraph [0137] discloses, the connection is Compute Express Link (CXL)). Regarding dependent claim 3, Sahin et al, Factor et al and Sreedhar et al teach, the method of claim 2. Sreedhar et al further teaches, wherein the connecting of the connection from the host interface of the memory sub-system to the second host system is in response to a failure of the first host system (Paragraph [0069], [0070] discloses if the initialization event is determined to be a power cycle event, then the MPSD moved from the first host system to the second host system. Examiner interprets power cycle event as failure of the first host system). Regarding dependent claim 5, Sahin et al, Factor et al and Sreedhar et al teach, the method of claim 3. Sreedhar et al further teaches, wherein the first protocol is configured to identify access locations via memory addresses at a first data granularity (Paragraph [0035] A device driver for the storage device 120 may maintain metadata 135, such as a logical to physical address mapping structure, to map logical addresses of the logical address space 134 to media storage locations on the storage device(s) 120. The device driver may be configured to provide storage services to one or more host clients 116. The host clients 116 may include local clients operating on the host-computing device 110 and/or remote clients 117 accessible via the network 115 and/or communication interface 113. The host clients 116 may include, but are not limited to: operating systems, file systems, database applications, server applications, kernel-level processes, user-level processes, applications, and the like. Also see [0037]); and the second protocol is configured to identify access locations via logical block addresses at a second data granularity (Paragraph [0037] The device driver may be further communicatively coupled to one or more storage systems 102 which may include different types and configurations of storage devices 120 including, but not limited to: solid-state storage devices, semiconductor storage devices, SAN storage resources, or the like. The one or more storage devices 120 may comprise one or more respective controllers 126 and non-volatile memory channels 122. The device driver may provide access to the one or more storage devices 120 via any compatible protocols or interface 133 such as, but not limited to, SATA and PCIe. If storage device 120 is a multi-protocol device, a protocol interface 137 may be used to select the correct or desired protocol. The metadata 135 may be used to manage and/or track data operations performed through the protocols or interfaces 133. The logical address space 134 may comprise a plurality of logical addresses, each corresponding to respective media locations of the one or more storage devices 120. The device driver may maintain metadata 135 comprising any-to-any mappings between logical addresses and media locations. Also see Paragraph [0034]). Factor et al also further teaches, wherein the first protocol is configured to identify access locations via memory addresses at a first data granularity (Paragraph [0033] A mapping 38 is provided for the log volume that identifies the structure and location of database tables on the storage server or on other storage servers in the case of a distributed database. Also see Paragraph [0013]); and the second protocol is configured to identify access locations via logical block addresses at a second data granularity (Paragraph [0033] A mapping 38 is provided for the log volume that identifies the structure and location of database tables on the storage server or on other storage servers in the case of a distributed database. Also see Paragraph [0013]). Regarding dependent claim 6, Sahin et al, Factor et al and Sreedhar et al teach, the method of claim 3. Sreedhar et al further teaches, further comprising: reconstructing, by the second host system (Paragraph [0069], [0070] discloses if the initialization event is determined to be a power cycle event, then the MPSD moved from the first host system to the second host system. Examiner interprets power cycle event as failure of the first host system); Factor et al further teaches, the second database records based on the data identifying the changes to the second database records (Paragraphs [0009], [0011] According to a disclosed embodiment of the invention, all logging and storage issues in a database are directed to a single storage server. A modification of a database record is written only once from the host server to a log record on the storage server, instead of being written twice, once to the log record and again to a storage server when the page containing the data is flushed out. Subsequently, the storage server interprets the database log records, and modifies the database storage accordingly. Using this method, the number of bytes written from the host to the storage server is potentially reduced by fifty percent. Also See Paragraphs [0039], [0040]). Regarding dependent claim 7, Sahin et al, Factor et al and Sreedhar et al teach, the method of claim 6. Factor et al further teach, wherein the data identifying the changes to the second database records includes write-ahead log entries (Paragraph [0031] data is intentionally written as received continually, appended to the end of the active log (Examiner interprets write-ahead log entries as appending the entries to the end of the log file)). Regarding dependent claim 8, Sahin et al, Factor et al and Sreedhar et al teach, the method of claim 6. Factor et al further teach, wherein the data identifying the changes to the second database records includes simple sorted tables (Paragraph [0013] In one aspect of the method, the storage server has a database table space and a plurality of logical volumes. The method is further carried out by designating one of the logical volumes as a log volume to receive the log entry, establishing a one-to-one mapping between the database table space and the log volume, and identifying the database record using the mapping). Regarding dependent claim 9, Sahin et al, Factor et al and Sreedhar et al teach, the method of claim 6. Sreedhar et al further teaches, wherein the storage device provided by the memory sub-system contains no data representative of the second database records at a time of the failure of the first host system (Paragraph [0070] When the MPSD is powered down, it may optionally be decoupled and removed from the first host-computing device and moved and/or coupled to a second host-computing device (block 590). The process 500 may then proceed to again power up the MPSD (block 510) as before. However, if the MPSD is not removed from the first host-computing device, then the process 500 may still proceed to power up the MPSD (block 510) again). Regarding dependent claim 10, Sahin et al, Factor et al and Sreedhar et al teach, the method of claim 3. Sreedhar et al further teaches, further comprising: storing, by the first host system running the first database manager and into the memory device via the first protocol (Paragraph [0054] discloses storing by the first host system the data into the memory via first protocol), at least a portion of the second database records (portion of the second database records / modified records is taught by Factor et al (Paragraph [0030]); and loading, by the second host system running the second database manager and according to the second protocol (Paragraph [0073], [0074] If the determined protocol is NVMe, the process 600 may further determine the PMR usage and association such as if the PMR is to be enabled and/or what the values of its various parameters may be such as, but not limited to, size and/or physical and/or logical addresses, etc. (block 620). In many embodiments, the process 600 may further determine if the PMR is enabled and managed within the storage device (block 625). If enabled, then various embodiments of the process 600 may load the most recently stored PMR data into memory at the correct locations (block 630) (Examiner interprets second protocol as different protocol)), the portion of the second database records (portion of the second database records / modified records is taught by Factor et al (Paragraph [0030]). Regarding independent claim 11, Sahin; Adnan (US 20220100687 A1) teaches, a host system (Fig. 1 Paragraph [0020]), comprising: a memory configured to store instructions representative of a database manager; a cache; and a processing device configured to: execute the instructions to run the database manager (Fig. 1 Paragraph [0021] discloses, host system, a cache, processing device, a memory); communicate, over a connection from a host interface of a memory sub-system to the host system to access (Fig. 8 Paragraph [0137] The PDI (peripheral device interconnect) 856 may provide interconnectivity between the CPU 862 and other physical components of the host system that are external (i.e., peripheral) to the CPU, including any of the computing unit 854, the SSI 858 and the other hardware resource(s) 860. The peripheral device interconnect 856 may be a switch that provides connectivity between the CPU and peripheral hardware components (Examiner interprets host interface of a memory sub-system as connection point between the host system (like a CPU) and the memory components (hardware resources))): a memory device attached by the memory sub-system to the host system via a first protocol via the cache for cache coherent memory access; and a storage device attached by the memory sub-system to the host system via a second protocol for storage access (Paragraph [0138] the host system 850 may be configured to use portions of the GM (Global memory) 840 as host memory… to employ virtual memory techniques and the direct internal fabric connectivity and RDMA capabilities of the SSI 858, to use portions of the physical storage devices (Examiner interprets first portion using first protocol as accessing the memory portion via memory protocol and a second portion of the memory sub-system to the first host system as a storage device accessible via a I/O protocol) the CXL capabilities of PDI 856 may be used to utilize computer-readable media resources of the storage system 820 as both storage and memory for the host. For example, the I/O protocols and memory protocols of CXL may be used to implement the semantics of storage and memory to utilize the computer-readable media resources of the storage system 820 as both storage and memory); and a storage device attached by the memory sub-system to the host system via a second protocol for storage access (Paragraph [0034] discloses, writing the data into the storage device via second protocol (I/O protocol)); Sahin et al fails to explicitly teach, execute load instructions to access, according to the second protocol, data identifying changes to second database records; and service database requests based on first database records stored in the storage device and the second database records. Factor; Michael (US 20060218200 A1) teaches, data identifying changes to second database records (Paragraph [0030] The log records that are written by the host server 10 to the storage server 24 are not complete database records. Rather in some embodiments, they are a journal of modifications to specific portions or fields of the database records. The information in the log record is interpretable on the storage server 24. Alternatively, the log records may be coded or uncoded instructions. In either case, when the information or the instructions are interpreted on the storage server 24, the storage server 24 executes operations to bring the data structures of the target database into a consistent and up-to-date state responsively to the transaction performed in the host server 10 (Examiner interprets, data identifying changes as identifying the modified data)); and service database requests based on first database records stored in the storage device and the second database records (Paragraphs [0030] [0039], [0040] discloses, in case of failure of a host second host takes over and executes the requests based on the first databases records/ previous records and the second databases records/ modified records are serviced by the second host system. Also see Paragraph [0009]). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Choe et al by providing, data identifying changes to second database records to be written into the storage device; loading, by the second host system running a second database manager and according to the second protocol, the data identifying the changes to the second database records; and servicing, by the second host system running the second database manager database requests based on the first database records and the second database records, as taught by Factor. et al (Paragraphs [0033], [0034], [0039], [0040]) One of the ordinary skill in the art would have been motivated to make this modification, by doing so saves host resources and also avoids two data transfers--from the log device to the host, and from the host to the main device. The inventive arrangement is particularly advantageous in a network storage environment, as taught by Factor. et al (Paragraph [0010], [0011]). Sahin et al and Factor et al fails to explicitly teach, execute load instructions to access, according to the second protocol. Sreedhar; Pradeep (US 20220398046 A1) teaches, execute load instructions to access, according to the second protocol (Paragraph [0073], [0074] If the determined protocol is NVMe, the process 600 may further determine the PMR usage and association such as if the PMR is to be enabled and/or what the values of its various parameters may be such as, but not limited to, size and/or physical and/or logical addresses, etc. (block 620). In many embodiments, the process 600 may further determine if the PMR is enabled and managed within the storage device (block 625). If enabled, then various embodiments of the process 600 may load the most recently stored PMR data into memory at the correct locations (block 630)); and service database requests based on first database records stored in the storage device and the second database records (Paragraph [0035] A device driver for the storage device 120 may maintain metadata 135, such as a logical to physical address mapping structure, to map logical addresses of the logical address space 134 to media storage locations on the storage device(s) 120. The device driver may be configured to provide storage services to one or more host clients 116. The host clients 116 may include local clients operating on the host-computing device 110 and/or remote clients 117 accessible via the network 115 and/or communication interface 113. The host clients 116 may include, but are not limited to: operating systems, file systems, database applications, server applications, kernel-level processes, user-level processes, applications, and the like. Also see [0067], [0070]). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Choe et al by providing, connecting the connection from the host interface of the memory sub-system to a second host system separate from the first host system to provide the second host system to the memory device via the first protocol and the storage device via the second protocol, as taught by Sreedhar et al (Paragraphs[0069], [0070]). One of the ordinary skill in the art would have been motivated to make this modification, the communications aspects of NVMe, the protocol allows access to various device features and resources. An example of such a feature is the ability to use a persistent memory region (PMR). Such a region is a portion of the storage device's internal memory that maintains its data (e.g., is persistent) between power cycles and/or device initializations as taught by Sreedhar et al (Paragraph [0006]). Regarding dependent claim 12, Sahin et al, Factor et al and Sreedhar et al teach, the host system of claim 11. Choe et al further teaches, wherein the connection is a computer express link connection (Paragraph [0137] discloses, the connection is Compute Express Link (CXL)). Regarding dependent claim 13, Sahin et al, Factor et al and Sreedhar et al teach, the host system of claim 11. Factor et al further teaches, wherein the processing device is further configured to: reconstruct the second database records based on the data identifying the changes to the second database records (Paragraphs [0009], [0011] According to a disclosed embodiment of the invention, all logging and storage issues in a database are directed to a single storage server. A modification of a database record is written only once from the host server to a log record on the storage server, instead of being written twice, once to the log record and again to a storage server when the page containing the data is flushed out. Subsequently, the storage server interprets the database log records, and modifies the database storage accordingly. Using this method, the number of bytes written from the host to the storage server is potentially reduced by fifty percent. Also See Paragraphs [0039], [0040]). Regarding dependent claim 14, Sahin et al, Factor et al and Sreedhar et al teach, the host system of claim 13. Factor et al further teach, wherein the data identifying the changes to the second database records includes write-ahead log entries, or simple sorted tables (Paragraph [0031] data is intentionally written as received continually, appended to the end of the active log (Examiner interprets write-ahead log entries as appending the entries to the end of the log file)). Regarding dependent claim 15, Sahin et al, Factor et al and Sreedhar et al teach, the host system of claim 14. Sreedhar et al further teaches, wherein the storage device provided by the memory sub-system contains no data representative of the second database records at a time of the storage device being attached to the host system by the memory sub-system (Paragraph [0070] When the MPSD is powered down, it may optionally be decoupled and removed from the first host-computing device and moved and/or coupled to a second host-computing device (block 590). The process 500 may then proceed to again power up the MPSD (block 510) as before. However, if the MPSD is not removed from the first host-computing device, then the process 500 may still proceed to power up the MPSD (block 510) again). Regarding dependent claim 16, Sahin et al, Factor et al and Sreedhar et al teach, the host system of claim 11. Sreedhar et al further teaches, wherein the processing device is further configured to: load, according to the second protocol (Paragraph [0073], [0074] If the determined protocol is NVMe, the process 600 may further determine the PMR usage and association such as if the PMR is to be enabled and/or what the values of its various parameters may be such as, but not limited to, size and/or physical and/or logical addresses, etc. (block 620). In many embodiments, the process 600 may further determine if the PMR is enabled and managed within the storage device (block 625). If enabled, then various embodiments of the process 600 may load the most recently stored PMR data into memory at the correct locations (block 630)), at least a portion of the second database records from the memory device attached by the memory sub-system to the host system (portion of the second database records / modified records is taught by Factor et al (Paragraph [0030]). Regarding independent claim 17, Sahin; Adnan (US 20220100687 A1) teaches, a non-transitory computer storage medium storing instructions which, when executed in a computing system, cause the computing system to perform a method, comprising: running, in a host system of the computing system, a database manager (Fig. 1 Paragraph [0021] discloses a host system); communicating, over a connection from a host interface of a memory sub-system to the host system to access (Fig. 8 Paragraph [0137] The PDI (peripheral device interconnect) 856 may provide interconnectivity between the CPU 862 and other physical components of the host system that are external (i.e., peripheral) to the CPU, including any of the computing unit 854, the SSI 858 and the other hardware resource(s) 860. The peripheral device interconnect 856 may be a switch that provides connectivity between the CPU and peripheral hardware components (Examiner interprets host interface of a memory sub-system as connection point between the host system (like a CPU) and the memory components (hardware resources))): a memory device attached by the memory sub-system to the host system for cache coherent memory access via a first protocol; and a storage device attached by the memory sub-system to the host system for storage access via a second protocol ((Paragraph [0138] the host system 850 may be configured to use portions of the GM (Global memory) 840 as host memory… to employ virtual memory techniques and the direct internal fabric connectivity and RDMA capabilities of the SSI 858, to use portions of the physical storage devices (Examiner interprets first portion using first protocol as accessing the memory portion via memory protocol and a second portion of the memory sub-system to the first host system as a storage device accessible via a I/O protocol) the CXL capabilities of PDI 856 may be used to utilize computer-readable media resources of the storage system 820 as both storage and memory for the host. For example, the I/O protocols and memory protocols of CXL may be used to implement the semantics of storage and memory to utilize the computer-readable media resources of the storage system 820 as both storage and memory); Sahin et al fails to explicitly teach, executing load instructions to access, according to the second protocol, data identifying changes to second database records; and servicing database requests based on first database records stored in the storage device and the second database records. Factor; Michael (US 20060218200 A1) teaches, data identifying changes to second database records (Paragraph [0030] The log records that are written by the host server 10 to the storage server 24 are not complete database records. Rather in some embodiments, they are a journal of modifications to specific portions or fields of the database records. The information in the log record is interpretable on the storage server 24. Alternatively, the log records may be coded or uncoded instructions. In either case, when the information or the instructions are interpreted on the storage server 24, the storage server 24 executes operations to bring the data structures of the target database into a consistent and up-to-date state responsively to the transaction performed in the host server 10 (Examiner interprets data identifying changes as identifying the modified data)); and servicing database requests based on first database records stored in the storage device and the second database records ((Paragraphs [0030] [0039], [0040] discloses, in case of failure of a host second host takes over and executes the requests based on the first databases records/ previous records and the second databases records/ modified records are serviced by the second host system. Also see Paragraph [0009]). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Sahin et al by providing, data identifying changes to second database records to be written into the storage device; loading, by the second host system running a second database manager and according to the second protocol, the data identifying the changes to the second database records; and servicing, by the second host system running the second database manager database requests based on the first database records and the second database records, as taught by Factor. et al (Paragraphs [0033], [0034], [0039], [0040]) One of the ordinary skill in the art would have been motivated to make this modification, by doing so saves host resources and also avoids two data transfers--from the log device to the host, and from the host to the main device. The inventive arrangement is particularly advantageous in a network storage environment, as taught by Factor. et al (Paragraph [0010], [0011]). Sahin et al and Factor et al fails to explicitly teach, execute load instructions to access, according to the second protocol. Sreedhar; Pradeep (US 20220398046 A1) teaches, execute load instructions to access, according to the second protocol (Paragraph [0073], [0074] If the determined protocol is NVMe, the process 600 may further determine the PMR usage and association such as if the PMR is to be enabled and/or what the values of its various parameters may be such as, but not limited to, size and/or physical and/or logical addresses, etc. (block 620). In many embodiments, the process 600 may further determine if the PMR is enabled and managed within the storage device (block 625). If enabled, then various embodiments of the process 600 may load the most recently stored PMR data into memory at the correct locations (block 630)); and servicing database requests based on first database records stored in the storage device and the second database records (Paragraph [0035] A device driver for the storage device 120 may maintain metadata 135, such as a logical to physical address mapping structure, to map logical addresses of the logical address space 134 to media storage locations on the storage device(s) 120. The device driver may be configured to provide storage services to one or more host clients 116. The host clients 116 may include local clients operating on the host-computing device 110 and/or remote clients 117 accessible via the network 115 and/or communication interface 113. The host clients 116 may include, but are not limited to: operating systems, file systems, database applications, server applications, kernel-level processes, user-level processes, applications, and the like. Also see [0067], [0070]). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Sahin et al and Factor et al by providing, connecting the connection from the host interface of the memory sub-system to a second host system separate from the first host system to provide the second host system to the memory device via the first protocol and the storage device via the second protocol, as taught by Sreedhar et al (Paragraphs[0069], [0070]). One of the ordinary skill in the art would have been motivated to make this modification, the communications aspects of NVMe, the protocol allows access to various device features and resources. An example of such a feature is the ability to use a persistent memory region (PMR). Such a region is a portion of the storage device's internal memory that maintains its data (e.g., is persistent) between power cycles and/or device initializations as taught by Sreedhar et al (Paragraph [0006]). Regarding dependent claim 18, Sahin et al, Factor et al and Sreedhar et al teach, the non-transitory computer storage medium of claim 17. Choe et al further teaches, wherein the connection is a computer express link connection (Paragraph [0137] discloses, the connection is Compute Express Link (CXL)). Regarding dependent claim 19, Sahin et al, Factor et al and Sreedhar et al teach, the non-transitory computer storage medium of claim 17. Factor et al further teaches, wherein the method further comprises: reconstructing the second database records based on the data identifying the changes to the second database records (Paragraphs [0009], [0011] According to a disclosed embodiment of the invention, all logging and storage issues in a database are directed to a single storage server. A modification of a database record is written only once from the host server to a log record on the storage server, instead of being written twice, once to the log record and again to a storage server when the page containing the data is flushed out. Subsequently, the storage server interprets the database log records, and modifies the database storage accordingly. Using this method, the number of bytes written from the host to the storage server is potentially reduced by fifty percent. Also See Paragraphs [0039], [0040]). Regarding dependent claim 20, Sahin et al, Factor et al and Sreedhar et al teach, the non-transitory computer storage medium of claim 17. Sreedhar et al further teaches, wherein the method further comprises: executing load instructions to access, according to the second protocol (Paragraph [0073], [0074] If the determined protocol is NVMe, the process 600 may further determine the PMR usage and association such as if the PMR is to be enabled and/or what the values of its various parameters may be such as, but not limited to, size and/or physical and/or logical addresses, etc. (block 620). In many embodiments, the process 600 may further determine if the PMR is enabled and managed within the storage device (block 625). If enabled, then various embodiments of the process 600 may load the most recently stored PMR data into memory at the correct locations (block 630)), at least a portion of the second database records from the memory device attached by the memory sub-system to the host system (portion of the second database records / modified records is taught by Factor et al (Paragraph [0030]). 7. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Sahin; Adnan (US 20220100687 A1) in view of Factor; Michael (US 20060218200 A1), Sreedhar; Pradeep (US 20220398046 A1) and in further view of JUNG; Myoungsoo (US 20240264957 A1). Regarding dependent claim 4, Sahin et al, Factor et al and Sreedhar et al teach, the method of claim 3. Sahin et al, Factor et al and Sreedhar et al fails to explicitly teach, wherein the first protocol is configured for cache coherent memory access via load instructions and store instructions and the second protocol is configured for storage access via read commands and write commands. JUNG; Myoungsoo (US 20240264957 A1) teaches, wherein the first protocol is configured for cache coherent memory access via load instructions and store instructions (Paragraphs [0064], [0066] discloses, accessing cache coherent memory access via load/store instructions using CXL.mem. Also see [0071], [0072], [0095] (Examiner interprets first protocol as using CXL.cache and the CXL.mem.) and the second protocol is configured for storage access via read commands and write commands (Paragraph [0058] discloses, accessing the storage devices using second protocol/ CXL.io. Also see [0064], [0066]). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Sahin et al, Factor et al and Sreedhar et al by providing, wherein the first protocol is configured for cache coherent memory access via load instructions and store instructions and the second protocol is configured for storage access via read commands and write commands, as taught by JUNG et al (Paragraph [0066]). One of the ordinary skill in the art would have been motivated to make this modification, by doing so Multiple protocols of the CXL may integrate the PCIe storage into a cache coherent memory space, generating much larger memory pools than the existing memory expansion using only the DRAM or PMEM, as taught by JUNG et al (Paragraph [0067]). Closest Prior Art 7. The prior art made of record and not relied upon is considered pertinent to the applicant’s disclosure. YANG; Ziye (US 20210089236 A1) teaches, Block storage can involve dividing data into blocks and then stores those blocks as separate pieces, with a unique identifier. For example, a block can have a unit size of 512B and logical block address 0 (LBA0) can refer to a first block, LBA1 can refer to a second block, and so forth. Client intermediary 202 can convert intermediary ABIO format commands to backend I/O command. Use of an abstracted common block-based format can assist with conversion of front-end protocols or semantics to a variety of different backend storage protocols or semantics and vice versa (Paragraph [0024]). 8. Examiner has pointed out particular references contained in the prior arts of record in the body of this action for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and Figures may apply as well. It is respectfully requested from the applicant, in preparing the response, to consider fully the entire references as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior arts or disclosed by the examiner. It is noted that any citation to specific pages, columns, figures, or lines in the prior art references any interpretation of the references should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. In re Heck, 699 F.2d 1331-33, 216 USPQ 1038-39 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006, 1009, 158 USPQ 275, 277 (CCPA 1968))). Conclusion Applicant’s amendments/Arguments necessitated the rejection as presented in this office action. THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SUMAN RAJAPUTRA whose telephone number is (571) 272-4669. The examiner can normally be reached between 8:00 AM - 5:00 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tony Mahmoudi (571) 272-4078 can be reached. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/ patents/ apply/ patent-center for more information about Patent Center and https://www.uspto.gov/ patents/ docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /S. R./ Examiner, Art Unit 2163 /ALEX GOFMAN/Primary Examiner, Art Unit 2163
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Prosecution Timeline

Nov 27, 2023
Application Filed
Mar 11, 2025
Non-Final Rejection mailed — §103
Jun 11, 2025
Response Filed
Sep 18, 2025
Non-Final Rejection mailed — §103
Dec 18, 2025
Response Filed
Mar 31, 2026
Final Rejection mailed — §103 (current)

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4-5
Expected OA Rounds
69%
Grant Probability
99%
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3y 1m (~7m remaining)
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