Prosecution Insights
Last updated: August 17, 2026
Application No. 18/520,897

MULTILAYER CERAMIC CAPACITOR

Final Rejection §103
Filed
Nov 28, 2023
Priority
Feb 13, 2023 — RE 10-2023-0018753
Examiner
DOLE, TIMOTHY J
Art Unit
2800
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electro-Mechanics Co., Ltd.
OA Round
2 (Final)
74%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
204 granted / 274 resolved
+6.5% vs TC avg
Moderate +7% lift
Without
With
+6.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
12 currently pending
Career history
288
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
46.7%
+6.7% vs TC avg
§102
35.2%
-4.8% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 274 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-5, 10 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okai et al. (US 20170076864 and hereinafter Okai ‘864) in view of Kato (US 20170278633). In regards to claim 1, Okai ‘864 discloses a multilayer ceramic capacitor comprising: a body including a capacitance formation region (region of overlapping electrodes 12 – FIGs. 1-2) including a plurality of dielectric layers (10 – FIG. 2; [0058]), and a plurality of first internal electrodes and a plurality of second internal electrodes (12 – FIG. 2; [0058]) alternately stacked with one of the plurality of dielectric layers interposed therebetween in a first direction (Z – FIG. 1); and a first external electrode and a second external electrode (6, 8 – FIG. 1; [0058]) disposed on the body, spaced apart from each other in a second direction different from the first direction (seen in FIG. 1), with the capacitance formation region between the first external electrode and the second external electrode, and connected to the plurality of first internal electrodes and the plurality of second internal electrodes, respectively (seen in FIG. 1), wherein the body further includes a plurality of side margin portions (16 – FIG. 2; [0058]) disposed to have the capacitance formation region therebetween in a third direction (X – FIG. 2) different from the first and second directions, the plurality of dielectric layers, as compared to the plurality of first and second internal electrodes, protrude more toward the plurality of side margin portions (seen in FIG. 2), and portions of each of the plurality of side margin portions are located between the plurality of dielectric layers (seen in FIG. 2). Okai ‘864 fails to disclose as viewed from a side of the multilayer capacitor, the first and second external electrodes are respectively disposed so as not to overlap the body in the third direction. Kato discloses a multilayer capacitor (fig. 1-6C) wherein as viewed from a side of the multilayer capacitor (fig. 1 and 2), the first and second external electrodes (fig. 1 (112) and (113)) are respectively disposed so as not to overlap the body in the third direction (fig. 1, electrodes 112 and 113 cover face f1 and f2 respectively, but do not extend onto faces f3 or f4, paragraphs [0039-0040]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Kato with Okai ‘864 to incorporate the external electrodes as taught by Kato in the structure taught by Okai ‘864, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows the component to meet a demand for size reduction (paragraph [0011]). In regards to claim 2, Okai ‘864 further discloses wherein the plurality of side margin portions respectively includes at least one of insulating polymer, epoxy, and Ajinomoto Build-up Film (ABF) (described in [0082]). In regards to claim 3, Okai ‘864 further discloses wherein Young's modulus of each of the plurality of side margin portions is less than 50 GPa (see Tables 2, 5, 7). In regards to claim 4, Okai ‘864 further discloses wherein the plurality of side margin portions respectively includes a protrusion protruding between the plurality of dielectric layers (seen in FIG. 2), and a margin layer (layer of 16 outward from layers of 10 as seen in FIG. 2) overlapping the plurality of dielectric layers in the third direction (seen in FIG. 2), wherein the protrusion and the margin layer include the same insulating material (seen in FIG. 2). In regards to claim 5, Okai ‘864 further discloses wherein the margin layer is exposed to an outside of the body (seen in FIG. 2), and the protrusion contacts the plurality of first internal electrodes and the plurality of second internal electrodes (seen in FIG. 2). In regards to claim 10, Okai ‘864 further discloses wherein the protrusion is integral with the margin layer (seen in FIG. 2). In regards to claim 13, Okai ‘864 further discloses wherein the Young's modulus of each of the plurality of side margin portions is less than Young's modulus of the plurality of dielectric layers (see Table 5 and [0063], [0078], noting the Young's modulus of epoxy resin is less than ceramic). Claim(s) 1-2, 4-5, 7 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Okai et al. (US 20170076869 and hereinafter Okai ‘869) in view of Kato (US 20170278633). In regards to claim 1, Okai ‘869 discloses a multilayer ceramic capacitor comprising: a body (4 – FIG. 2; [0050]) including a capacitance formation region (14 – FIG. 1; [0061]) including a plurality of dielectric layers (10 – FIGs. 1-2; [0051]), and a plurality of first internal electrodes and a plurality of second internal electrodes (12 – FIGs. 1-2; [0051]) alternately stacked with one of the plurality of dielectric layers interposed therebetween in a first direction (Z – FIG. 1); and a first external electrode and a second external electrode (6, 8 – FIG. 1; [0050]) disposed on the body, spaced apart from each other in a second direction (Y – FIG. 1) different from the first direction, with the capacitance formation region between the first external electrode and the second external electrode (seen in FIG. 1), and connected to the plurality of first internal electrodes and the plurality of second internal electrodes, respectively (seen in FIG. 1), wherein the body further includes a plurality of side margin portions (16 – FIG. 2; [0050]) disposed to have the capacitance formation region therebetween in a third direction (X – FIG. 2) different from the first and second directions (seen in FIG. 2), the plurality of dielectric layers, as compared to the plurality of first and second internal electrodes, protrude more toward the plurality of side margin portions (seen in FIG. 2A), and portions of each of the plurality of side margin portions are located between the plurality of dielectric layers (seen in FIG. 2A). Okai ‘869 fails to disclose as viewed from a side of the multilayer capacitor, the first and second external electrodes are respectively disposed so as not to overlap the body in the third direction. Kato discloses a multilayer capacitor (fig. 1-6C) wherein as viewed from a side of the multilayer capacitor (fig. 1 and 2), the first and second external electrodes (fig. 1 (112) and (113)) are respectively disposed so as not to overlap the body in the third direction (fig. 1, electrodes 112 and 113 cover face f1 and f2 respectively, but do not extend onto faces f3 or f4, paragraphs [0039-0040]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Kato with Okai ‘869 to incorporate the external electrodes as taught by Kato in the structure taught by Okai ‘869, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows the component to meet a demand for size reduction (paragraph [0011]). In regards to claim 2, Okai ‘869 further discloses wherein the plurality of side margin portions respectively includes at least one of insulating polymer, epoxy, and Ajinomoto Build-up Film (ABF) (see [0089], [0159], noting side margin portions including resin, i.e. insulating polymer). In regards to claim 4, Okai ‘869 further discloses wherein the plurality of side margin portions respectively includes a protrusion protruding between the plurality of dielectric layers (seen in FIG. 3A), and a margin layer (layer of 16 outward from layers of 10 as seen in FIG. 2) overlapping the plurality of dielectric layers in the third direction (seen in FIG. 2), wherein the protrusion and the margin layer include the same insulating material (seen in FIGs. 2-3). In regards to claim 5, Okai ‘869 further discloses wherein the margin layer is exposed to an outside of the body (seen in FIG. 2), and the protrusion contacts the plurality of first internal electrodes and the plurality of second internal electrodes (seen in FIGs. 3A-3B). In regards to claim 7, Okai ‘869 further discloses wherein a protrusion length of the protrusion is greater than 1µm and less than 20µm (seen in Column 4 of Tables 2-3). In regards to claim 10, Okai ‘869 further discloses wherein the protrusion is integral with the margin layer. Claim(s) 1, 4-7, 10 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takagi (US 20200126724 and hereinafter Takagi ‘724) in view of Kato (US 20170278633). In regards to claim 1, Takagi ‘724 discloses a multilayer ceramic capacitor comprising: a body (10 – FIG. 1; [0115]) including a capacitance formation region (region of 10 having overlapping electrodes 21, 22 – FIGs. 3-4) including a plurality of dielectric layers (20 – FIG. 3; [0067]), and a plurality of first internal electrodes and a plurality of second internal electrodes (21, 22 – FIGs. 3-4; [0060]) alternately stacked with one of the plurality of dielectric layers interposed therebetween in a first direction (T – FIG. 1); and a first external electrode and a second external electrode (51, 52 – FIG. 1; [0115]) disposed on the body, spaced apart from each other in a second direction (L – FIG. 1) different from the first direction, with the capacitance formation region between the first external electrode and the second external electrode, and connected to the plurality of first internal electrodes and the plurality of second internal electrodes, respectively (seen in FIG. 2), wherein the body further includes a plurality of side margin portions (41; or alternatively 41a – FIGs. 4-5; [0040]) disposed to have the capacitance formation region therebetween in a third direction (W – FIGs. 4-5) different from the first and second directions, the plurality of dielectric layers, as compared to the plurality of first and second internal electrodes, protrude more toward the plurality of side margin portions (seen in FIG. 5), and portions of each of the plurality of side margin portions are located between the plurality of dielectric layers (seen in FIG. 5). Takagi ‘724 fails to disclose as viewed from a side of the multilayer capacitor, the first and second external electrodes are respectively disposed so as not to overlap the body in the third direction. Kato discloses a multilayer capacitor (fig. 1-6C) wherein as viewed from a side of the multilayer capacitor (fig. 1 and 2), the first and second external electrodes (fig. 1 (112) and (113)) are respectively disposed so as not to overlap the body in the third direction (fig. 1, electrodes 112 and 113 cover face f1 and f2 respectively, but do not extend onto faces f3 or f4, paragraphs [0039-0040]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Kato with Takagi ‘724 to incorporate the external electrodes as taught by Kato in the structure taught by Takagi ‘724, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows the component to meet a demand for size reduction (paragraph [0011]). In regards to claim 4, Takagi ‘724 further discloses wherein the plurality of side margin portions respectively includes a protrusion protruding between the plurality of dielectric layers (seen in FIG. 5), and a margin layer (layer of width Ta and/or Tb as seen in FIG. 5) overlapping the plurality of dielectric layers in the third direction (seen in FIG. 5), wherein the protrusion and the margin layer include the same insulating material (described in [0069]). In regards to claim 5, Takagi ‘724 further discloses wherein the margin layer (layer of width Ta and/or Tb) is exposed to an outside of the body (seen in FIG. 1), and the protrusion contacts the plurality of first internal electrodes and the plurality of second internal electrodes (seen in FIG. 5). In regards to claim 6, Takagi ‘724 fails to expressly disclose, with sufficient specificity, wherein a protrusion length of the protrusion is greater than a thickness of the margin layer. However, Takagi ‘724 further teaches a protrusion length of the protrusion is preferably about 5 μm or less, more preferably about 2 μm or less, and still more preferably about 1 μm or less, for example ([0058]) and a thickness of the margin layer (margin layer of width Ta) is about 0.1 μm or more and about 20 μm or less ([0061]); thus Takagi ‘724 teaches a range overlapping with a protrusion length of the protrusion is greater than a thickness of the margin layer. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to construct the multilayer ceramic capacitor of Takagi ‘724 such that a protrusion length of the protrusion is greater than a thickness of the margin layer, as taught by Takagi ‘724, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows for maintaining the shape and performance of the multilayer ceramic capacitor (Takagi ‘724: [0060]). Furthermore, while the specific ranges of “a protrusion length of the protrusion is greater than a thickness of the margin layer” is not specifically disclosed in the cited references a prima facie case of obviousness exists when the claimed ranges “overlap or lie inside ranges disclosed by the prior art” In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). In regards to claim 7, Takagi ‘724 further discloses wherein a protrusion length of the protrusion is greater than 1µm and less than 20µm (see [0058], noting a protrusion length is preferably about 5 μm or less). In regards to claim 10, Takagi ‘724 further discloses wherein the protrusion is integral with the margin layer (layer of width Ta) (seen in FIG. 5). In regards to claim 12, Takagi ‘724 further discloses wherein a thickness of the body along the first direction is less than 100µm (see [0028], noting a thickness of the capacitor, i.e. a thickness of the body plus 2 times the thickness of the external electrodes, being 0.1mm or 100µm). Claim(s) 1-5, 9-11, and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang (US 20140085767 and hereinafter Kang ‘767) in view of Okai ‘864 and further in view of Kato (US 20170278633). In regards to claim 1, Kang ‘767 discloses a multilayer ceramic capacitor comprising: a body (10 – FIG. 2; [0034]) including a capacitance formation region including a plurality of dielectric layers (layers of 10 – FIG. 2), and a plurality of first internal electrodes and a plurality of second internal electrodes (21, 22 – FIG. 2; [0034]) alternately stacked with one of the plurality of dielectric layers interposed therebetween in a first direction (T – FIG. 1); and a first external electrode and a second external electrode (31; or alternatively, 30a – FIG. 2; [0034]) disposed on the body, spaced apart from each other in a second direction (L – FIG. 1) different from the first direction, with the capacitance formation region between the first external electrode and the second external electrode (seen in FIG. 2), and connected to the plurality of first internal electrodes and the plurality of second internal electrodes, respectively (seen in FIG. 2), wherein the body further includes a plurality of side margin portions (11 – FIGs. 2, 4; [0065]) disposed to have the capacitance formation region therebetween in a third direction different from the first and second directions (W – FIG. 2). Kang ‘767 fails to expressly disclose the plurality of dielectric layers, as compared to the plurality of first and second internal electrodes, protrude more toward the plurality of side margin portions, and portions of each of the plurality of side margin portions are located between the plurality of dielectric layers. Okai ‘864 teaches the plurality of dielectric layers (10 – FIG. 2; [0058]), as compared to the plurality of first and second internal electrodes (12 – FIG. 2; [0058]), protrude more toward the plurality of side margin portions (16 – FIG. 2; [0058], [0082]) (seen in FIG. 2), and portions of each of the plurality of side margin portions are located between the plurality of dielectric layers (seen in FIG. 2). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Okai ‘864 with Kang ‘767 to incorporate the plurality of dielectric layers, as compared to the plurality of first and second internal electrodes, protrude more toward the plurality of side margin portions, and portions of each of the plurality of side margin portions are located between the plurality of dielectric layers as taught by Okai ‘864 in the structure taught by Kang ‘767, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows the component to have good thermal shock resistance and reduced acoustic noise (Okai ‘864: [0012]). Kang ‘767 fails to disclose as viewed from a side of the multilayer capacitor, the first and second external electrodes are respectively disposed so as not to overlap the body in the third direction. Kato discloses a multilayer capacitor (fig. 1-6C) wherein as viewed from a side of the multilayer capacitor (fig. 1 and 2), the first and second external electrodes (fig. 1 (112) and (113)) are respectively disposed so as not to overlap the body in the third direction (fig. 1, electrodes 112 and 113 cover face f1 and f2 respectively, but do not extend onto faces f3 or f4, paragraphs [0039-0040]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize the teachings of Kato with Kang ‘767 as modified to incorporate the external electrodes as taught by Kato in the structure taught by Kang ‘767 as modified, as one having ordinary skill in the art would have been motivated to do this with a reasonable expectation of success because such a combination and/or modification allows the component to meet a demand for size reduction (paragraph [0011]). In regards to claim 2, modified Kang ‘767 further teaches wherein the plurality of side margin portions respectively includes at least one of insulating polymer, epoxy, and Ajinomoto Build-up Film (ABF) (Kang ‘767: [0067]; Okai ‘864: [0082]). In regards to claim 3, modified Kang ‘767 further teaches wherein Young's modulus of each of the plurality of side margin portions is less than 50 GPa (see Okai ‘864: Tables 2, 5, 7). In regards to claim 4, modified Kang ‘767 further teaches wherein the plurality of side margin portions respectively includes a protrusion protruding between the plurality of dielectric layers (seen in Okai ‘864: FIG. 2), and a margin layer overlapping the plurality of dielectric layers in the third direction, wherein the protrusion and the margin layer include the same insulating material (seen in FIG. 2). In regards to claim 5, modified Kang ‘767 further teaches wherein the margin layer is exposed to an outside of the body, and the protrusion contacts the plurality of first internal electrodes and the plurality of second internal electrodes (seen in Okai ‘864: FIG. 2). In regards to claim 9, modified Kang ‘767 further teaches wherein the body further includes a plurality of cover layers (portions of body 10 between region of overlapping electrodes 21, 22 and upward and downward surfaces of body 10 as seen in Kang ‘767: FIGs. 2, 4) disposed with the capacitance formation region therebetween in the first direction (seen in FIGs. 2, 4), and the plurality of side margin portions respectively includes an edge portion covering a portion of an outer surface of each of the first and second external electrodes in the first direction (seen in FIGs. 2-3). In regards to claim 10, modified Kang ‘767 further teaches wherein the protrusion is integral with the margin layer (Okai ‘864: FIG. 2). In regards to claim 11, modified Kang ‘767 further teaches wherein the plurality of side margin portions respectively includes an edge portion covering a portion of an outer surface of each of the first and second external electrodes in the first direction (seen in Kang ‘767: FIG. 2). modified Kang ‘767 fails to teach the edge portion, the margin layer, and the protrusion are integral with each other. However, it has been held that forming in one piece an article which has formally been formed in two pieces and put together involves only routine skill in the art. In re Larson, 340 F.2d 965, 968, 144 USPQ 347, 349 (CCPA 1965). Accordingly, as the device of modified Kang ‘767 would perform the same function as before, such a change to modified Kang ‘767 would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention. In regards to claim 13, modified Kang ‘767 further teaches wherein the Young's modulus of each of the plurality of side margin portions is less than Young's modulus of the plurality of dielectric layers (see Table 5 and [0063], [0078], noting the Young's modulus of epoxy resin is less than ceramic). Allowable Subject Matter Claims 14-21 are allowed. The following is an examiner’s statement of reasons for allowance: Claim 14 was amended to recite previously indicated allowable subject matter from claim 18. In regards to claim 14, specifically, the prior art fails to teach or make obvious, alone or in combination, the limitation of wherein a length of the edge portion in the third direction is greater than a thickness of the margin layer. Claims 15-21 are considered to be allowable based on their dependency on claim 14. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Response to Arguments Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Timothy J Dole whose telephone number is (571)272-2229. The examiner can normally be reached M-F 6:30am-2:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Wellington can be reached at (571)272-4483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Timothy J. Dole/ Supervisory Patent Examiner, Art Unit 2847
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Prosecution Timeline

Nov 28, 2023
Application Filed
Sep 22, 2025
Non-Final Rejection mailed — §103
Dec 19, 2025
Response Filed
Jul 29, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
74%
Grant Probability
81%
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