DETAILED ACTION
This action is in response to the original filing of 11-28-2023. Claims 1-20 are pending and have been considered below:
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-9 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1: Claims 1-9 represent method, system and medium type claims. Therefore claims 1-9 are directed to either a process, machine, manufacture or composition of matter.
Regarding claim 1:
2A Prong 1:
generating a hypergraph-based representation based at least in part on the sequence of data, where the generating comprises at least one of: assigning a value for each array element in an adjacency array representation based on at least one bit in the sequence of data, or forming a hypergraph representation where each hyperedge between two or more nodes corresponds to at least one bit in the sequence of data;
and generating compressed data associated with the sequence of data based at least in part on the hypergraph-based representation, where the compressed data comprises a second number of qubits less than the first number of bits.
As drafted, under the broadest reasonable interpretation, the claim covers mental processes (concepts performed in the human mind (including an observation, evaluation, judgment, opinion).
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
receiving the sequence of data;
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
receiving the sequence of data;
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
Regarding claim 2:
2A Prong 1:
No abstract idea
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
where the adjacency array representation contains array elements indicating whether two or more nodes are adjacent or not in the hypergraph representation. (Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
where the adjacency array representation contains array elements indicating whether two or more nodes are adjacent or not in the hypergraph representation. (Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
Regarding claim 3:
2A Prong 1:
No abstract idea
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
where the generating of the compressed data comprises preparing one or more quantum states based at least in part on the hypergraph-based representation. (Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
where the generating of the compressed data comprises preparing one or more quantum states based at least in part on the hypergraph-based representation. (Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
Regarding claim 4:
2A Prong 1:
No abstract idea
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
using the compressed data as a fingerprint of the sequence of data.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
using the compressed data as a fingerprint of the sequence of data.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
Regarding claim 5:
2A Prong 1:
No abstract idea
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
where at least one of the hyperedges connects three or more nodes in the hypergraph representation.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
where at least one of the hyperedges connects three or more nodes in the hypergraph representation.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
Regarding claim 6:
2A Prong 1:
No abstract idea
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
where a first hyperedge connects a first number of nodes and a second hyperedge connects a second number of nodes different from the first number of nodes.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
where a first hyperedge connects a first number of nodes and a second hyperedge connects a second number of nodes different from the first number of nodes.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
Regarding claim 7:
2A Prong 1:
generating a first hypergraph-based representation based at least in part on the first state of the sequence of data; performing a first instance of an operation on the first state of the sequence of data based at least in part on the first hypergraph-based representation; modifying the first hypergraph-based representation to generate a second hypergraph- based representation, where the modifying comprises: and determining a set of hyperedges between nodes in a hypergraph corresponding to the second hypergraph-based representation based on corresponding bits in the update;
As drafted, under the broadest reasonable interpretation, the claim covers mental processes (concepts performed in the human mind (including an observation, evaluation, judgment, opinion).
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
receiving a first state of the sequence of data;
receiving an update comprising a portion of a second state of the sequence of data that differs from the first state of the sequence of data, where the update is less than the entire second state of the sequence of data,
and performing a second instance of the operation on the second state of the sequence of data based at least in part on the second hypergraph-based representation.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
receiving a first state of the sequence of data;
receiving an update comprising a portion of a second state of the sequence of data that differs from the first state of the sequence of data, where the update is less than the entire second state of the sequence of data,
and performing a second instance of the operation on the second state of the sequence of data based at least in part on the second hypergraph-based representation.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
Regarding claim 8:
2A Prong 1:
No abstract idea
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
where the received update comprises two or more updates.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
where the received update comprises two or more updates.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
Regarding claim 9:
2A Prong 1:
No abstract idea
2A Prong 2: This judicial exception is not integrated into a practical application.
Additional elements:
where the operation is a controlled-Z quantum gate operation.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
2B: The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
where the operation is a controlled-Z quantum gate operation.
(Adding the words “apply it” (or an equivalent) with the judicial exception, or mere instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea - see MPEP 2106.05(f)).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 7-9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nannicini et al. (“Nannicini” 20210350060 A1).
Claim 7: Nannicini discloses a method for processing states of a sequence of data, the method comprising: receiving a first state of the sequence of data (Figure 1: 112 and Paragraphs 24-25);
generating a first hypergraph-based representation based at least in part on the first state of the sequence of data (Paragraphs 24-25; hypergraph representation);
performing a first instance of an operation on the first state of the sequence of data based at least in part on the first hypergraph-based representation (Paragraph 46; perform operation);
modifying the first hypergraph-based representation to generate a second hypergraph- based representation (Paragraphs 39, 45 and 58; modification), where the modifying comprises: receiving an update comprising a portion of a second state of the sequence of data that differs from the first state of the sequence of data, where the update is less than the entire second state of the sequence of data, and determining a set of hyperedges between nodes in a hypergraph corresponding to the second hypergraph-based representation based on corresponding bits in the update (Paragraphs 39, 45 and 55-58; modified state);
and performing a second instance of the operation on the second state of the sequence of data based at least in part on the second hypergraph-based representation (Paragraph 46; perform operation).
Claim 8: Nannicini discloses a method of claim 7, where the received update comprises two or more updates (Nannicini: Paragraphs 25 and 58; modification). Multiple modification/updates can be performed.
Claim 9: Nannicini discloses a method of claim 7, where the operation is a controlled-Z quantum gate operation (Nannicini: Paragraph 48).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nannicini et al. (“Nannicini” 20210350060 A1) in view of Quantum Hypergraph States Rossi et al. (“Rossi”) pages 1-14; 11-12-2013.
Claim 1: Nannicini discloses a method for compressing a sequence of data comprising a first number of bits, the method comprising: receiving the sequence of data (Figure 1: 112 and Paragraphs 24-25);
generating a hypergraph-based representation based at least in part on the sequence of data, where the generating comprises at least one of: or forming a hypergraph representation where each hyperedge between two or more nodes corresponds to at least one bit in the sequence of data (Paragraph 25; two nodes connected based on quantum data);
and generating compressed data associated with the sequence of data based at least in part on the hypergraph-based representation, where the compressed data comprises a second number of qubits less than the first number of bits (Paragraph 27; decomposition generate sub-set of data with less qubits/circuits).
Nannicini may not explicitly disclose assigning a value for each array element in an adjacency array representation based on at least one bit in the sequence of data.
Rossi is provided because it discloses an adjacency array for quantum states (Figure 1).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to apply a known technique to a known device ready for improvement and provide adjacency array representation within the system of Nannicini. One would have been motivated to provide the functionality because the representation provides space-efficient methods of conveying the data provided.
Claim 2: Nannicini and Rossi disclose a method of claim 1, where the adjacency array representation contains array elements indicating whether two or more nodes are adjacent or not in the hypergraph representation (Rossi: Figure 1).
Claim 3: Nannicini and Rossi disclose a method of claim 1, where the generating of the compressed data comprises preparing one or more quantum states based at least in part on the hypergraph-based representation (Nannicini: abstract and Paragraphs 25-27).
Claim 5: Nannicini and Rossi disclose a method of claim 1, where at least one of the hyperedges connects three or more nodes in the hypergraph representation (Nannicini: abstract and Paragraphs 25-27; representation can provided needed connections).
Claim 6: Nannicini and Rossi disclose a method of claim 1, where a first hyperedge connects a first number of nodes and a second hyperedge connects a second number of nodes different from the first number of nodes(Nannicini: abstract and Paragraphs 25-27) subset provided as hypergraph can connect different number of nodes).
Claims 4 is/are rejected under 35 U.S.C. 103 as being
unpatentable over Nannicini et al. (“Nannicini” 20210350060 A1) and Quantum Hypergraph States Rossi et al. (“Rossi”) pages 1-14; 11-12-2013 in further view of Quantum fingerprinting Buhrman et al. (“Buhrman”) pages 1-8; 2-1-2001.
Claim 4: Nannicini and Rossi disclose a method of claim 1, however may not explicitly describe further comprising using the compressed data as a fingerprint of the sequence of data.
Buhrman is provided because it discloses quantum fingerprinting of quantum data/sequence (abstract).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to apply a known technique to a known device ready for improvement and provide quantum fingerprinting within the system of Nannicini. One would have been motivated to provide the fingerprint functionality because the representation provides an effective comparison method of provided data.
Claims 10-12, 14-15 and 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nannicini et al. (“Nannicini” 20210350060 A1) in view of Aharonov et al. (“Aharonov” 20240046131 A1).
Claim 10: Nannicini discloses a system for generating and transmitting quantum states, the system comprising: a first computing device comprising one or more processors in communication with a first plurality of quantum storage elements; a second computing device comprising one or more processors in communication with (1) a non-volatile memory, (2) a second plurality of quantum storage elements, and (3) control circuitry configured to apply quantum gate operations to the second plurality of the quantum storage elements (Paragraphs 61-66 and 75-76; the elements are provided memory, second computer control circuitry and can be modified as needed), where the second computing device is configured to:
read a first sequence of data from the non-volatile memory, and use the control circuitry to generate a first set of quantum states stored in the second plurality of quantum storage elements based at least in part (Paragraphs 21, 25-27 and 35 (data from quantum description) on at least one of (1) a hypergraph-based representation associated with the first sequence of data or
(2) random circuit sampling and the first sequence of data, where the first sequence of data provides randomness for the random circuit sampling (Paragraph 35; sequence of data can be provided);
and a quantum communication channel between the first computing device and the second computing device configured to transmit the first set of quantum states from the second computing device to the first computing device (Nannicini: Figures 3 and 10; Paragraphs 21, 25-27 and 35 (communication between devices).
However, a random circuit sampling may not be explicitly disclosed.
Abaronov is provided because it discloses qubit characterization and further discloses random circuit sampling of a sequence (Paragraph 159).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to apply a known technique to a known device ready for improvement and provide random sampling within the system of Nannicini. One would have been motivated to provide the sampling because it provides an improved method of evaluation without exploitation.
Claim 11: Nannicini and Abaronov disclose a system of claim 10, where the first computing device is configured to: receive the first set of quantum states transmitted from the second computing device by the quantum communication channel, and perform one or more measurements on (1) the first set of quantum states and (2) a second set of quantum states generated based at least in part on at least one of (A) a hypergraph-based representation associated with a second sequence of data or (B) random circuit sampling and the second sequence of data, where the second sequence of data provides randomness for the random circuit sampling (Abaronov: Paragraph 159; random sample per sequence and Nannicini: Figures 3 and 10; Paragraphs 21, 25-27 and 35 (communication between devices).
Claim 12: Nannicini and Abaronov disclose a system of claim 11, where the first sequence of data is associated with at least one of (1) hardware included in the second computing device at a first time or (2) software loaded onto the second computing device at the first time, and the second sequence of data is associated with at least one of (1) hardware included in the second computing device at a second time or (2) software loaded onto the second computing device at a second time different from the first time (Nannicini: Figure 3:302 and Paragraph 35; processor connected to 302 can provide a plurality of instances).
Claim 14: Nannicini and Abaronov disclose a system of claim 10, where the first sequence of data comprises information associated with a first set of parameters associated with the second computing device (Nannicini: Figure 3:302 and Paragraph 35; data provided can be from one or more quantum elements).
Claim 15: Nannicini and Abaronov disclose a system of claim 10, where the using of the control circuitry to generate the first set of quantum states stored in the second plurality of quantum storage elements is based at least in part on the hypergraph-based representation associated with the first sequence of data and further comprises at least one of (1) assigning a value for each array element in an adjacency array representation based on at least one bit in the first sequence of data or (2) forming a hypergraph representation where each hyperedge between two or more nodes corresponds to at least one bit in the first sequence of data(Nannicini: Figure 3:302/202 and Paragraph 35; data provided can used to form hypergraph representation Paragraph 52).
Claim 17: Nannicini and Abaronov disclose a system of claim 10, where the using of the control circuitry to generate the first set of quantum states stored in the second plurality of quantum storage elements is based at least in part on the hypergraph-based representation associated with the first sequence of data and further comprises applying controlled-Z quantum gate operations (Nannicini: Paragraphs 48 and 52-53).
Claim 18: Nannicini and Abaronov disclose a system of claim 10, where the first sequence of data is associated with a configuration of the second computing device (Nannicini: Figure 10:1046 and Paragraphs 61-66; remote computers).
Claim 19: Nannicini and Abaronov disclose a system of claim 10, further comprising a third computing device comprising one or more processors in communication with (1) a second non-volatile memory, (2) a third plurality of quantum storage elements, and (3) control circuitry configured to apply quantum gate operations to the third plurality of the quantum storage elements (Nannicini: Figure 10 and Paragraphs 61-66; circuitry has multiple memory, storage through remote computers).
Claim 20: Nannicini and Abaronov disclose a system of claim 19, further comprising a second quantum communication channel between the first computing device and the third computing device configured to transmit quantum states from the third computing device to the first computing device (Nannicini: Figure 10 and Paragraphs 61-66; multiple remote computers).
Claim 13 is/are rejected under 35 U.S.C. 103 as being
unpatentable over Nannicini et al. (“Nannicini” 20210350060 A1) and Aharonov et al. (“Aharonov” 20240046131 A1) in further view of Quantum fingerprinting Buhrman et al. (“Buhrman”) pages 1-8; 2-1-2001.
Claim 13: Nannicini and Abaronov disclose a system of claim 11, where the first computing device is configured to determine if the first sequence of data and the second sequence of data are identical based at least in part on the outcomes of the one or more measurements.
Buhrman is provided because it discloses quantum fingerprinting of quantum data/sequence (abstract and Introduction) which allows comparison of the data.
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to apply a known technique to a known device ready for improvement and provide quantum fingerprinting within the system of Nannicini. One would have been motivated to provide the fingerprint functionality because the representation provides an effective comparison method of provided data.
Claim 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nannicini et al. (“Nannicini” 20210350060 A1) and Aharonov et al. (“Aharonov” 20240046131 A1) in further view of Quantum Hypergraph States Rossi et al. (“Rossi”) pages 1-14; 11-12-2013.
Claim 16: Nannicini and Abaronov disclose a system of claim 15, however may not explicitly disclose where the using of the control circuitry comprises assigning a value for each array element in the adjacency array representation based on at least one bit in the first sequence of data, and each array element indicates whether two or more nodes are adjacent or not in the hypergraph representation.
Rossi is provided because it discloses an adjacency array for a quantum state (Figure 1; location and placement provides value to determine adjacency).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to apply a known technique to a known device ready for improvement and provide adjacency array representation within the system of Nannicini. One would have been motivated to provide the functionality because the representation provides space-efficient methods for conveying the data provided.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
20230084278 A1 Figure 7
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/SHERROD L KEATON/ Primary Examiner, Art Unit 2148
9-1-2026
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