DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3, 5, 10-12, 14-19, 21-24 are rejected under 35 U.S.C. 103 as being unpatentable over Melkonyan (US 2020/0350904) in view of Wang et al. (US 2021/0203309).
Regarding Claim 1, Melkonyan discloses a power switch device (Figures 1-2, Abstract, Paragraph 2), comprising:
a wide-bandgap semiconductor switch having a first terminal, a second terminal and a control terminal (GaN HEMT transistor 10 having D, S and G terminals, Figure 1, Paragraphs 2, 28, Claim 2); and
a gate driver (Figure 1, Paragraph 30), comprising:
a driver circuit configured to provide a driver signal to control the wide-bandgap semiconductor switch (comprising 228, 26 providing drive signal to the control terminal of 10, Figure 1, Paragraph 30); and
a diagnostic circuit (comprising 21, 22, 23, 28, Figure 1) configured to sense an electrical characteristic of the wide-bandgap semiconductor switch (current, voltage characteristics, Figure 2, Paragraphs 31-32), and perform a diagnostic test for the wide-bandgap semiconductor switch in response to the electrical characteristic of the wide-bandgap semiconductor switch (Paragraphs 35-37);
wherein the diagnostic circuit comprises: a health monitoring circuit configured to sense the electrical characteristic of the wide-bandgap semiconductor switch when the wide-bandgap semiconductor switch is operating (Paragraphs 31-32, 37, “…The method can be used to determine the reliability, the aging behavior and the remaining lifetime of the GaN HEMT device 10”), compare the electrical characteristic with a first standard of the at least one standard, and issue a warning signal when the electrical characteristic fails to meet the first standard (Paragraph 33, “…when a fault occurs, an error signal is fed to gate 26….”);
wherein the health monitoring circuit is further configured to predict a remaining lifetime of the wide-bandgap semiconductor switch (Paragraph 33, Paragraph 37, “…method can be used to determine the reliability, the aging behavior and the remaining lifetime of the GaN HEMT device 10”) according to a gate to source leakage current of the wide-band gap semiconductor switch and a comparison result of the electrical characteristic and the at least one standard (Paragraph 31, “The unit 23 for signal detection and evaluation is connected between the control terminal G and the second main terminal S. The unit 23 detects the voltage across the gate-source diode. ….. it may detect the current flowing into or out of the gate. Resistor 27 is provided for current detection in the circuit”, note that the current flowing out of the gate includes current flowing out of the gate to the source or gate to source leakage current, and further note that gate to source leakage current can be determined using the detected voltage across the gate-source),
and issue a shutdown signal when a failure event occurs according to the electrical characteristic of the wide-bandgap semiconductor switch (Paragraphs 31-32, Paragraph 33, “…when a fault occurs, an error signal is fed to gate 26…”), wherein when the shutdown signal is issued, the driver circuit is further configured to turn off the wide-bandgap semiconductor switch (Paragraph 33, “when a fault occurs, an error signal is fed to gate 26, so that output of gate 26 ensures a blocking state of GaN HEMT device 10”).
Melkonyan does not disclose a digital interface configured to receive a diagnostic test configuration, wherein the diagnostic test configuration defines a test item corresponding to an electrical characteristic, at least one standard of the test item and a predicted remaining lifetime condition,
the health monitoring circuit predicting the remaining lifetime being based on a comparison result of the electrical characteristic and the at least one standard also, and
the health monitoring circuit issues the shutdown signal to turn off the wide-bandgap semiconductor switch being when the predicted remaining lifetime of the wide-bandgap semiconductor switch fails to meet the predicted remaining lifetime condition defined by the diagnostic test configuration.
Wang discloses a power switch device (Figures 1-9), the power switch device comprising:
a semiconductor switch (100, Figure 1, corresponding element in Figures 2-5), a gate driver to provide a driver signal to control the semiconductor switch (comprising 504, Figure 5 providing drive signal to the control terminal of 500, Paragraph 400),
a digital interface digital interface configured to receive a diagnostic test configuration (comprising 560, 503, 505, 507, Figure 5, Paragraphs 40-41), wherein the diagnostic test configuration defines a test item corresponding to an electrical characteristic, at least one standard of the test item and a predicted remaining lifetime condition (Paragraphs 23, 40-41, 57-58, test configuration defining i) a test item corresponding to an electrical characteristic -drain to source voltage, gate to source voltage of FET, ii) at least one standard of the test item – “degradation threshold”, and iii) a predicted remaining lifetime condition- “desired operation lifetime of FET”, Paragraph 59); and
a diagnostic circuit configured to sense an electrical characteristic of the semiconductor switch (comprising 510, 506, 514, 516, part of 502, Figure 5), and perform a diagnostic test for the semiconductor switch in response to the electrical characteristic of the semiconductor switch (Figures 8-9, Paragraphs 21-23, “…controller can compare the FET voltage measurements to a degradation threshold”, Paragraphs 42, 45);
wherein the diagnostic circuit comprises a health monitoring circuit configured to monitor the electrical characteristic of the switch when the switch is operating and compare the electrical characteristic with a first standard of the at least one standard defined the diagnostic test configuration and issue warning signal when the electrical characteristic fails to meet the first standard (monitoring lifetime semiconductor switch 100, Figures 1-5, 8-9, Paragraph 22, “…..comparison allows health evaluation of the FET”, Paragraph 23, “…can determine that the FET has a remaining operation lifetime below a desired remaining operation lifetime…” ), and
when a predicted remaining lifetime of the semiconductor switch fails to meet the predicted remaining lifetime condition, a shutdown signal is issued to turn off the wide-bandgap semiconductor switch (Paragraph 23, “…the controller can determine that the FET has a remaining operation lifetime below a desired remaining operation lifetime. For example, the controller can compare the FET voltage measurement to a degradation threshold and determine whether the FET voltage measurement meets the degradation threshold based on the comparison. In some described examples, in response to determining that the FET voltage measurement does not meet the degradation threshold, the controller can determine that the FET may experience a potential failure. In such described examples, the controller can generate an alert to facilitate a shutdown of the FET…”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the power switch device of Melkonyan, a digital interface to receive the test configuration defining a standard of the test item and a threshold for the lifetime, and when the lifetime of the semiconductor switch is less than a threshold, a shutdown signal is issued to turn off the wide-bandgap semiconductor switch as taught by Wang, such that repair and/or replacement of the FET can be safely carried out to improve system health and/or reliability (Wang, Paragraph 23).
Regarding Claim 2, combination of Melkonyan and Wang discloses the power switch device of Claim 1, wherein the diagnostic circuit comprises: a start-up diagnostic circuit (Melkonyan, part of 21, 22, 23, 28, Figure 1) configured to sense the electrical characteristic of the wide-bandgap semiconductor switch before the wide-bandgap semiconductor switch is operating, compare the electrical characteristic with a second standard, and issue a fault signal when the electrical characteristic fails to meet the second standard (Melkonyan, Paragraphs 31-32, “…unit 23 detects voltage across the gate-source diode…”, Paragraph 33, “…when a fault occurs, an error signal is fed to gate 26…”).
Regarding Claim 3, combination of Melkonyan and Wang discloses the power switch device of Claim 2, wherein when the fault signal is issued, the driver circuit is further configured to disable the operation of the wide-bandgap semiconductor switch (Melkonyan, Paragraph 33, “when a fault occurs, an error signal is fed to gate 26, so that output of gate 26 ensures a blocking state of GaN HEMT device 10”).
Regarding Claim 5, combination of Melkonyan and Wang discloses the power switch device of Claim 1, wherein the health monitoring circuit is further configured to determine whether a failure event occurs according to the electrical characteristic of the wide-bandgap semiconductor switch, and issue a shutdown signal when the failure event occurs (Melkonyan, Paragraphs 31-32, Paragraph 33, “…when a fault occurs, an error signal is fed to gate 26…”); wherein when the shutdown signal is issued, the driver circuit is further configured to turn off the wide-bandgap semiconductor switch (Paragraph 33, “when a fault occurs, an error signal is fed to gate 26, so that output of gate 26 ensures a blocking state of GaN HEMT device 10”).
Regarding Claim 8, combination of Melkonyan and Wang discloses the power switch device of Claim 1, wherein the gate driver further comprises: a digital interface configured to receive a diagnostic test configuration (Wang, comprising 507, 505, Figure 5, Paragraphs 40-41 in the combination)
Regarding Claim 10, combination of Melkonyan and Wang discloses the power switch device of Claim 1, wherein the wide-bandgap semiconductor switch is integrated on a first die, and the gate driver is integrated on a second die (Melkonyan, 10 and 28, 26 on separately integrated, Figure 1, Paragraphs 2, 28, Claim 2).
Regarding Claim 11, Melkonyan discloses a power switch device (Figures 1-2, Abstract, Paragraph 2), comprising:
a wide-bandgap semiconductor switch having a first terminal, a second terminal and a control terminal (10 comprising D, G, and S terminals, Figure 1); and
a fault detection circuit (comprising 21, 22, 23, 28, Figure 1) configured to sense an electrical characteristic of the wide-bandgap semiconductor switch(current, voltage characteristics, Figure 2, Paragraphs 31-32), and issue a fault signal when the electrical characteristic of the wide-bandgap semiconductor switch indicates the wide-bandgap semiconductor switch is damaged (Paragraphs 33-37);
wherein the fault detection circuit is configured to monitor a health status of the wide-band gap semiconductor switch when the wide-band gap semiconductor switch is operating (Paragraphs 31-32, 37), and predict a remaining lifetime of the wide-bandgap semiconductor switch according to a gate to source leakage current of the wide-bandgap semiconductor switch (Paragraph 31, “The unit 23 for signal detection and evaluation is connected between the control terminal G and the second main terminal S. The unit 23 detects the voltage across the gate-source diode. ….. it may detect the current flowing into or out of the gate. Resistor 27 is provided for current detection in the circuit”, note that the current flowing out of the gate includes current flowing out of the gate to the source or gate to source leakage current, and further note that gate to source leakage current can be determined using the detected voltage across the gate-source, Paragraph 37, “…method can be used to determine the reliability, the aging behavior and the remaining lifetime of the GaN HEMT device 10”), and issue a shutdown signal to turn off the wide-bandgap semiconductor switch based on the fault signal (Paragraphs 31-32, Paragraph 33, “…when a fault occurs, an error signal is fed to gate 26 ensures a blocking state of GaN HEMT device 10”);
wherein the wide-bandgap semiconductor switch is integrated on a first die, and the gate driver is integrated on a second die (10 and 28, 26 on separately integrated, Figure 1).
health monitoring circuit predicting the remaining lifetime being based on the diagnostic test configuration also
Melkonyan does not disclose a digital interface configured to receive a diagnostic test configuration, wherein the diagnostic test configuration defines a test item corresponding to an electrical characteristic, at least one standard of the test item and a predicted remaining lifetime condition,
fault detection circuit predicting the remaining lifetime being based on a health status also, and the health monitoring circuit issues the shutdown signal to turn off the wide-bandgap semiconductor switch being when the predicted remaining lifetime of the wide-bandgap semiconductor switch fails to meet the predicted remaining lifetime condition defined by the diagnostic test configuration.
Wang discloses a power switch device (Figures 1-9), comprising:
a semiconductor switch (100, Figures 1-5), a gate driver comprising a gate driver circuit configured to provide a driver signal to control the semiconductor switch (comprising 504, Figure 5 providing drive signal to the control terminal of 500, Paragraph 400),
a digital interface digital interface configured to receive a diagnostic test configuration (comprising 560, 503, 505, 507, Figure 5, Paragraphs 40-41), wherein the diagnostic test configuration defines a test item corresponding to an electrical characteristic, at least one standard of the test item and a predicted remaining lifetime condition (Paragraphs 23, 40-41, 57-58, test configuration defining i) a test item corresponding to an electrical characteristic -drain to source voltage, gate to source voltage of FET, ii) at least one standard of the test item – “degradation threshold”, and iii) a predicted remaining lifetime condition- “desired operation lifetime of FET”, Paragraph 59); and
a fault detection circuit configured to sense the electrical characteristic of the semiconductor switch (comprising 510, 506, 514, 516, part of 502, Figure 5), and issue a fault signal when the electrical characteristic of the semiconductor switch indicates the switch is damaged (Figures 8-9, Paragraphs 21-23, 42, 45);
wherein the fault detection circuit is configured to monitor a health status and monitoring a lifetime of semiconductor switch (monitoring lifetime semiconductor switch 100, Figures 1-5, 8-9), and
and when the predicted remaining lifetime of the semiconductor switch fails to meet the predicted remaining lifetime condition, a shutdown signal is issued to turn off the wide-bandgap semiconductor switch (Paragraph 23, “…the controller can determine that the FET has a remaining operation lifetime below a desired remaining operation lifetime. For example, the controller can compare the FET voltage measurement to a degradation threshold and determine whether the FET voltage measurement meets the degradation threshold based on the comparison. In some described examples, in response to determining that the FET voltage measurement does not meet the degradation threshold, the controller can determine that the FET may experience a potential failure. In such described examples, the controller can generate an alert to facilitate a shutdown of the FET…”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the power switch device of Melkonyan, a digital interface to receive the test configuration defining a standard of the test item and a threshold for the lifetime, and when the lifetime of the semiconductor switch is less than a threshold, a shutdown signal is issued to turn off the wide-bandgap semiconductor switch as taught by Wang, such that repair and/or replacement of the FET can be safely carried out to improve system health and/or reliability (Wang, Paragraph 23).
Regarding Claim 12, combination of Melkonyan and Wang discloses the power switch device of Claim 11, wherein when the electrical characteristic of the wide-bandgap semiconductor switch indicates the wide-bandgap semiconductor switch is damaged, the driver circuit is further configured to disable the operation of the wide-bandgap semiconductor switch (Melkonyan, Paragraphs 31-22, Paragraph 33, “…when a fault occurs, an error signal is fed to gate 26, so that the output of gate 26 ensures a blocking state of GaN HEMT device 10…”).
Regarding Claim 14, combination of Melkonyan and Wang discloses the power switch device of Claim 11, wherein the electrical characteristic of the wide-bandgap semiconductor switch includes a drain to source leakage current of the wide-bandgap semiconductor switch (Melkonyan, Claim 7).
Regarding Claim 15, combination of Melkonyan and Wang discloses the power switch device of Claim 11, wherein the electrical characteristic of the wide-bandgap semiconductor switch includes a pinch-off voltage of the wide-bandgap semiconductor switch (Melkonyan, Figure 2 shows the characteristic of gate current vs gate-source voltage, pinchoff voltage is -VGS(off), Paragraph 22).
Regarding Claim 16, combination of Melkonyan and Wang discloses the power switch device of Claim 11, wherein the electrical characteristic of the wide-bandgap semiconductor switch includes a gate threshold of the wide-bandgap semiconductor switch (Melkonyan, Figure 2 shows the characteristic of gate current vs gate-source voltage, Paragraph 22).
Regarding Claim 17, combination of Melkonyan and Wang discloses the power switch device of Claim 11, wherein the electrical characteristic of the wide-bandgap semiconductor switch includes an on-resistance of the wide-bandgap semiconductor switch (Melkonyan, Figure 2 shows the characteristic of gate current vs gate-source voltage as a function of temperature for , Paragraph 22).
Regarding Claim 18, combination of Melkonyan and Wang discloses the power switch device of Claim 11, wherein the electrical characteristic of the wide-bandgap semiconductor switch includes a body diode voltage drop of the wide-bandgap semiconductor switch (Melkonyan, Figure 2 shows the characteristic of gate current vs gate-source voltage, Paragraph 22, gate source voltage includes a diode voltage drop).
Claim 19 recites a corresponding method for controlling a wide-bandgap semiconductor switch of Claim 1, more broadly recited. Therefore, Claim 19 is rejected at least for the same reasons as for Claim 1.
Regarding Claim 21, combination of Melkonyan and Wang discloses the power switch device of Claim 1, wherein the diagnostic test configuration further defines an eligible range of a health monitor parameter (Paragraph 57, “…the controller 502 includes the database 570 to record data, such as the baseline data 575, the historical data 580, etc. In some examples, the baseline data 575 corresponds to one or more pre-defined thresholds (e.g., degradation threshold(s))….”).
Regarding Claim 22, combination of Melkonyan and Wang discloses the power switch device of Claim 1, wherein the diagnostic test configuration further defines a desired action corresponding to an event (circuit interface 560 coupled to alert generator 590, Figure 5, Paragraph 57, “…alert generator 590 can transmit an alert to a different controller, …. to a user interface (e.g., a display in a vehicle), one or more speakers (e.g., a speaker of a vehicle audio system), etc., and/or a combination thereof. In some examples, the alert includes a message (e.g., a string of ASCII characters, one or more words, etc.) indicating that the first transistor 508 and/or other components of the gate driver system 500 needs maintenance, requires replacement, or other action”, Paragraph 58).
Regarding Claim 23, combination of Melkonyan and Wang discloses the power switch device of Claim 11, wherein the diagnostic test configuration further defines an eligible range of a health monitor parameter (Paragraph 57, “…the controller 502 includes the database 570 to record data, such as the baseline data 575, the historical data 580, etc. In some examples, the baseline data 575 corresponds to one or more pre-defined thresholds (e.g., degradation threshold(s))….”).
Regarding Claim 24, combination of Melkonyan and Wang discloses the power switch device of Claim 11, wherein the diagnostic test configuration further defines a desired action corresponding to an event (circuit interface 560 coupled to alert generator 590, Figure 5, Paragraph 57, “…alert generator 590 can transmit an alert to a different controller, …. to a user interface (e.g., a display in a vehicle), one or more speakers (e.g., a speaker of a vehicle audio system), etc., and/or a combination thereof. In some examples, the alert includes a message (e.g., a string of ASCII characters, one or more words, etc.) indicating that the first transistor 508 and/or other components of the gate driver system 500 needs maintenance, requires replacement, or other action”, Paragraph 58).
Claims 7 is rejected under 35 U.S.C. 103 as being unpatentable over Melkonyan (US 2020/0350904) in view of Wang et al. (US 2021/0203309) and Budde et al. (US 2024/0015417).
Regarding Claim 7, combination of Melkonyan and Wang discloses the power switch device of Claim 1, wherein the gate driver further comprises: a circuit configured to receive the electrical characteristic of the wide-bandgap semiconductor switch (Melkonyan, comprising 23, 21, Figure 1, Paragraphs 31-34), and transmit the electrical characteristic of the wide-bandgap semiconductor switch to a controller (Melkonyan, 23, 21 output to 28, 22, 26, Figure 1).
Combination of Melkonyan and Wang does not specifically disclose the gate driver further comprising a telemetry circuit being configured to receive the electrical characteristic of the wide-bandgap semiconductor switch, and transmit the electrical characteristic of the wide-bandgap semiconductor switch to a controller.
Budde discloses a power switch device (Figures 1-12), the power switch device comprising a semiconductor switch (comprising 102, Figure 1); and
a gate driver to drive the semiconductor switch (comprising 106, Figures 1, 4), comprising: a telemetry circuit configured to receive the electrical characteristic of the semiconductor switch (output from sensors to 110 to 118, Figure 4, Paragraphs 20-22), and transmit the electrical characteristic of the semiconductor switch to a controller (118 output to 414, 108, 116Figure 4, Paragraphs 20-22). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the power switch device of the combination, a telemetry circuit as taught by Budde for faster processing of the sensed data to reduce response time and speed of operation and safety of the power switch device.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Melkonyan (US 2020/0350904) in view of Wang et al. (US 2021/0203309) and Hubbard et al. (US 2023/0251298).
Regarding Claim 9, combination of Melkonyan and Wang does not specifically disclose the power switch device of Claim 1, further comprising: a cascode switch having a first terminal, a second terminal and a control terminal, wherein the first terminal of the cascode switch is coupled to the second terminal of the wide-bandgap semiconductor switch; wherein the driver circuit is further configured to provide the driver signal to the control terminal of the cascode switch, the cascode switch is turned on or turned off in response to the driver signal, and the operation of the wide-bandgap semiconductor switch is controlled according to the operation of the cascode switch.
Hubbard discloses a power switch device (Figures 1-3) comprising: a semiconductor switch having a first terminal, a second terminal and a control terminal (comprising DUT FET 304 having first terminal 312, a second terminal 308 and a control terminal 316, Figure 3), a driver (comprising 384, 336, Figure 3), and a cascode switch having a first terminal, a second terminal and a control terminal (334 comprising source/320, drain gate terminals, Figure 3), wherein the first terminal of the cascode switch is coupled to the second terminal of the semiconductor switch (source/320 connected to 308); wherein the driver circuit is further configured to provide the driver signal to the control terminal of the cascode switch, the cascode switch is turned on or turned off in response to the driver signal (336 coupled to the control/gate terminal of 334, Figure 3), and the operation of the semiconductor switch is controlled according to the operation of the cascode switch (operating voltage for the semiconductor switch is provided by the operation of 334, Figure 4).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination power switch device, a cascode switch as taught by Hubbard to controllably provide the operating voltage to the wide-bandgap semiconductor switch.
Response to Arguments
Applicant's arguments filed on 8/04/2026 have been fully considered but they are not persuasive and/or rendered moot in view of current rejection addressing the new limitations.
Applicant argues, on Pages 10-12 of the Remarks that secondary reference Wang does not disclose the amended limitations of the digital interface in Claim 1, that are missing in the primary reference Melkonyan, and specifically argues that Wang’s disclosed the degradation thresholds are not the predicted remaining lifetime condition.
In response, examiner respectfully notes that as discussed above in the rejection, Wang’s disclosed “degradation threshold” meets the claimed “at least one standard of the test item” and Wang’s disclosed “desired operation lifetime of FET” meets the claimed “a predicted remaining lifetime condition”. It is further respectfully noted that Wang discloses the argued upon limitations of the diagnostic test configuration, as discussed in Paragraphs 23, 40-41, 57-58, having test configuration defining i) a test item corresponding to an electrical characteristic -drain to source voltage, gate to source voltage of FET, ii) at least one standard of the test item – “degradation threshold”, and iii) a predicted remaining lifetime condition- “desired operation lifetime of FET”. It is further respectfully noted that Claim does not limit the argued upon limitations by any specific value, type to overcome Wang reference as a secondary reference.
Regarding Applicant further arguments, toward Wang reference, examiner respectfully notes that the secondary reference is used in combination with Melkonyan, and the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). In this case, Wang reference discloses the claimed digital interface, missing in the primary reference Melkonyan, the digital interface of Wang is configured to receive the test configuration having the recited limitations.
Regarding Applicant’s arguments, on Pages 12-13 of the Remarks toward independent claims 11 and 19 and dependent claims, please see response to arguments toward Claim 1.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Frank et al. (US 10,469,057) discloses a method of controlling a power switch device (Figures 1-9), the method comprising monitoring a lifetime of semiconductor switch (monitoring lifetime semiconductor switch 10, Figures 3-8), and when the lifetime of the semiconductor switch is less than a threshold, a shutdown signal is issued to turn off the wide-bandgap semiconductor switch (Column 12, lines 27-33); Onda et al. (US 2024/0006978) discloses a semiconductor driving device 10 that performs ON/OFF control of a semiconductor switching element 50 (see Figures 2-3 for example and Abstract) comprising a gate driving unit 14 which applies a voltage generated by the gate power supply unit 11, between the gate terminal and the source terminal, and a gate leakage current detection unit 13 which detects gate leakage current of the semiconductor switching element on the basis of voltage occurring at a gate resistor RG connected to the gate terminal, using a negative-side potential of the gate power supply unit as a reference and a gate deterioration diagnosis unit 12a.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LUCY M THOMAS whose telephone number is (571)272-6002. The examiner can normally be reached Mon-Fri 9:30 am - 5:30 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal L Hammond can be reached at (571)270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LUCY M THOMAS/Examiner, Art Unit 2838, 9/14/2026
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
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