DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the limitation “wherein the-semiconductor bodies of the first sub-group of semiconductor bodies differ from the-semiconductor bodies of the second sub-group of semiconductor bodies” is ambiguous. It is unclear if the semiconductor bodies differ by type or if the first and second group do not share semiconductor bodies. In order to further prosecution, the examiner interprets the limitation to mean the first sub-group and second sub-group to each have its own set of semiconductor bodies, i.e. not sharing semiconductor bodies.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2, 5-14 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Nogawa (Pub. No. US 2024/0030211).
As to claim 1, Nogawa discloses a power semiconductor module arrangement comprising:
a substrate 11 (fig. 2) comprising a dielectric insulation layer (¶0045) and a first metallization layer 12 arranged on a first side of the dielectric insulation layer, wherein the first metallization layer comprises a plurality of different sections (fig. 5) that are separate and distinct from each other; and
a plurality of semiconductor bodies 41-44 arranged on the first metallization layer, and comprising a first sub-group of semiconductor bodies (see fig. 5 below, arrow 1) and a second sub-group of semiconductor bodies (fig. 5 below, arrow 2), wherein the-semiconductor bodies of the first sub-group of semiconductor bodies differ from the-semiconductor bodies of the second sub-group of semiconductor bodies,
wherein each of the plurality of semiconductor bodies comprises a control electrode 412, 422, 432, 442 and a controllable load path between a first load electrode 411, 421, 431, 441 and a second load electrode 512, 522, 523, 524,
wherein the first load electrode of each of the plurality of semiconductor bodies is electrically coupled to a first section of the first metallization layer (¶0098),
wherein the second load electrodes of each of the semiconductor bodies of the first sub-group of semiconductor bodies are electrically coupled to a second section of the first metallization layer 13, 14, and the second load electrodes of each of the semiconductor bodies of the second sub-group of semiconductor bodies are electrically coupled to a third section of the first metallization layer 13, 14, wherein the control electrodes of each of the semiconductor bodies of the first sub-group of semiconductor bodies are electrically coupled to a fourth section of the first metallization layer 16, and the control electrodes of each of the semiconductor bodies of the second sub-group of semiconductor bodies are electrically coupled to a fifth section of the first metallization layer 16, and
wherein the first sub-group of semiconductor bodies is symmetrical to the second sub-group of semiconductor bodies (see fig. 5 below).
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As to claim 2, Nogawa discloses that the semiconductor bodies of the first sub-group of semiconductor bodies are arranged symmetrically about a first axis of symmetry, and the semiconductor bodies of the second sub-group of semiconductor bodies are arranged symmetrically about a second axis of symmetry (see fig. 5 above, each sub-group have symmetry about an X axis).
As to claim 5, Nogawa discloses that the first load electrode of each of the plurality of semiconductor bodies is electrically coupled to the first section using an electrically conductive connection layer (¶0065-0068 discloses using solder or sintered material),
the second load electrodes of each of the semiconductor bodies of the first sub-group of semiconductor bodies are electrically coupled to the second section using one or more electrical connection elements 512, 522, 532, 542 (figs. 2-4, 5),
the second load electrodes of the semiconductor bodies of the second sub-group of semiconductor bodies are electrically coupled to the third section using one or more electrical connection elements 512, 522, 532, 542 (figs. 2-4, 5),
the control electrodes of each of the semiconductor bodies of the first sub-group of semiconductor bodies are electrically coupled to the fourth section using one or more electrical connection elements and the control electrodes of each of the semiconductor bodies of the second sub-group of semiconductor bodies are electrically coupled to the fifth section using one or more electrical connection elements (fig. 5, see wires 511, 521, 531, 541).
As to claim 6, Nogawa discloses that an electrical connection element comprises a bonding wire, a bonding ribbon, a connection plate, a conductor rail, or a connection clip (fig. 5 shows a plurality of wires).
As to claim 7, Nogawa disclsoes that the first load electrodes of each of the plurality of semiconductor bodies is a drain electrodes, the second load electrodes of each of the plurality of semiconductor bodies is a source electrodes, and the control electrodes of each of the plurality of semiconductor bodies is a gate electrode, or the first load electrodes of each of the plurality of semiconductor bodies are-is a collector electrodes, the second load electrodes of each of the plurality of semiconductor bodies is an emitter electrode, and the control electrodes of each of the plurality of semiconductor bodies is a base electrode (¶0125, 0065-0068).
As to claim 8, Nogawa discloses that the first section is arranged between the second section and the third section of the first metallization layer (fig. 5).
As to claim 9, Nogawa disclsoes that the fourth section is arranged between the second section and the first section, and the fifth section is arranged between the third section and the first section (fig. 5).
As to claim 10, Nogawa discloses that the first sub-group of semiconductor bodies and the second sub-group of semiconductor bodies each comprise an even number of semiconductor bodies (fig. 5).
As to claim 11, Nogawa discloses that the first sub-group of semiconductor bodies and the second sub-group of semiconductor bodies each comprise an uneven number of semiconductor bodies (¶0126).
As to claim 12, Nogawa discloses that the first sub-group of semiconductor bodies is symmetrical to the second sub-group of semiconductor bodies about a third axis of symmetry (see fig. 5 above, symmetrical about a Y axis).
As to claim 13, Nogawa discloses that the third axis of symmetry is perpendicular to each of the first axis of symmetry and the second axis of symmetry (see fig. 5 above, symmetrical about a Y axis).
As to claim 14, Nogawa discloses that the first sub-group of semiconductor bodies is point symmetrical to the second sub-group of semiconductor bodies about a center of symmetry (see fig. 5 above).
Allowable Subject Matter
Claims 3-4, 15-16 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Regarding dependent claim 3, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations within the claim and limitation recited in claim 1, a combination of limitations that discloses a housing, wherein the substrate is arranged inside or forms a bottom of the housing; a plurality of terminal elements, each comprising a first end and a second end, wherein the first end of each of a first sub-group of terminal elements is electrically and mechanically coupled to the first section of the first metallization layer, wherein the first end of each of a second sub-group of terminal elements is electrically and mechanically coupled to the second section of the first metallization layer, wherein the first end of each of a third sub-group of terminal elements is electrically and mechanically coupled to the third section of the first metallization layer, wherein the first end of each of a fourth sub-group of terminal elements is electrically and mechanically coupled to the fourth section of the first metallization layer, and wherein the first end of each of a fifth sub-group of terminal elements is electrically and mechanically coupled to the fifth section of the first metallization layer, and wherein the second end of each of the plurality of terminal elements extends to the an outside of the housing. None of the reference art of record discloses or renders obvious such a combination.
Regarding dependent claim 15, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations within the claim and limitation recited in claim 1, a combination of limitations that discloses a plurality of freewheeling elements arranged on the first metallization layer, and comprising a first sub-group of freewheeling elements and a second sub-group of freewheeling elements, wherein the-freewheeling elements of the first sub-group differ of freewheeling elements from the-freewheeling elements of the second sub-group of freewheeling elements, wherein the first sub-group of freewheeling elements is electrically coupled to the first sub- group (S1) of semiconductor bodies, and the second sub-group of freewheeling elements is electrically coupled to the second sub-group of semiconductor bodies. None of the reference art of record discloses or renders obvious such a combination.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMOL H PATEL whose telephone number is (571)270-7833. The examiner can normally be reached 9:30AM-6:00PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TIMOTHY THOMPSON can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AMOL H PATEL/Examiner, Art Unit 2847
/TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847 /