Prosecution Insights
Last updated: July 17, 2026
Application No. 18/521,875

SYSTEMS, METHODS, AND APPARATUS FOR MEMORY PROTECTION FOR COMPUTATIONAL STORAGE DEVICES

Non-Final OA §103
Filed
Nov 28, 2023
Priority
Nov 30, 2022 — provisional 63/429,125
Examiner
NIPA, WASIKA
Art Unit
2433
Tech Center
2400 — Computer Networks
Assignee
Samsung Electronics Co., Ltd.
OA Round
3 (Non-Final)
75%
Grant Probability
Favorable
3-4
OA Rounds
2m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
233 granted / 309 resolved
+17.4% vs TC avg
Strong +29% interview lift
Without
With
+29.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
19 currently pending
Career history
325
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
94.5%
+54.5% vs TC avg
§102
2.2%
-37.8% vs TC avg
§112
1.1%
-38.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 309 resolved cases

Office Action

§103
Detailed Action The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . RCE filed on 03/16/2026 and claim filed on 02/19/2026 is acknowledged. Claims 1-20 are currently pending and have been considered below. Claim 1, 10 and 15 are independent claim. Claim 1, 10, 15 have been amended. No claim is added new. Continued Examination under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 03/16/2026 has been entered. Priority This application has PRO 63/429,125 filed on 11/30/2022. Response to Arguments Applicant's arguments added in the amendment filed on 02/19/2026 have been fully considered but moot in view of new ground of rejection. The reasons set forth below. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Yang (US Patent Application Publication No 2021/0072927 A1) in view of Gunda (US Patent No 11,403,011 B1). Regarding Claim 1, Yang discloses a system for managing memory, the system comprising: one or more memory resources (Yang, Fig-1); wherein the system is configured to: receive a command specifying an amount of computational resources and an amount of memory resources associated with a program (Yang, ¶[0018], the user space includes a plurality of executing application. Each application may execute functions in a user space storage library. Fig-5, ¶[0030], the storage driver discovers one or more physical controllers, having physical namespace in storage devices. This discovery may occur by polling the bus for new storage devices or receiving a signal when the storage device is coupled to the bus); and process the command by the controller (Yang, ¶[0030]-¶[0031], a virtual controller is generated to have virtual namespaces representing physical namespace in one or more physical controllers. The virtual controller may be dynamically assigned to applications during operations to allow for flexible assignment of application to the physical namespaces in virtual namespaces assigned to virtual controllers). Yang does not explicitly discuss the following limitation that Gunda teaches: a controller in a storage device (Gunda, Fig-1, col 8, line 30-60, storage device may include non-volatile memory, controller 123); one or more computational resources in the storage device, distinct from the controller (Gunda, Fig-1, col 7, line 15-55, the L2P mapping table stores the mapping of logical addresses specified for data written from the host device to physical addresses in the NVM indicating the location where each of the data is stored. This mapping may be performed by the controller of the storage device); wherein the processing includes dynamically assigning a portion of the one or more computational resources and assigning a portion of the one or more memory resources based on the command for use by the program (Gunda, col 5, line 1-10, allows for dynamic configuration for host read performance of random read operation. Col 13, line 1-10, a memory controller that implements an NVMe protocol or an extension to an NVMe protocol that allows the memory controller to request a dynamic change to the size); and executing, in the storage device and on the assigned portion of the one or more computational resources, the program using the assigned portion of the one or more memory resources (Gunda, Fig-1, col 8, line 5-55, when the controller 123 executes the read command or write command, the controller accesses the mapping from the cache and reads the data from or writes the data to the NVM at the specified physical address. Col 9, line 5-30). Yang in view of Gunda are analogous art because they are from the “same field of endeavor” and are from the same “problem solving area”. Namely, they pertain to the field of “managing access to storage devices and resources from multiple applications”. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the invention of Yang in view of Gunda to include the idea of caching a portion of a management table that is used to translate between logical addresses used by the host system and physical addresses in the non-volatile memory. The benefit is when the memory system receives a read or write command, it can determine which memory location needs to be accessed (Gunda, col 1, line 30-50). Regarding claim 2, Yang in view of Gunda discloses the system of claim 1, wherein the command specifies that the portion of the one or more memory resources is restricted from access (Yang, ¶[0015], to manage application access to the storage devices so as to prevent uneven distribution of accesses by the applications to the storage devices. Thus, application access is managed to avoid overloading certain storage devices and to guarantee quality of service levels assigned to the applications). Regarding claim 3, Yang in view of Gunda discloses the system of claim 1, wherein the system determines that the program attempts to access a region of the one or more memory resources different from the assigned portion of the one or more memory resources and the system stops execution of the program (Yang, ¶[0012], sharing the NVMe driver in the user space with multiple applications may not be efficient if multiple independent applications can access all of the NVMe devices, which may result in overburdening certain of the NVMe devices being accessed by multiple applications in a single host. Also Gunda, Fig-1, col 8, line 5-55, when the controller 123 executes the read command or write command, the controller accesses the mapping from the cache and reads the data from or writes the data to the NVM at the specified physical address. Col 9, line 5-30). Regarding claim 4, Yang in view of Gunda discloses the system of claim 1, wherein the one or more memory resources comprises one or more local memory namespaces (Yang, ¶[0014], multiple processes to share storage devices by generating a plurality of virtual controllers, including virtual namespaces that each map to a physical namespace in a physical controller of one of the storage devices, and assigning each application to a virtual controller). Regarding Claim 5, Yang in view of Gunda discloses the system of claim 1, wherein the system comprises one or more storage resources including one or more storage namespaces (Yang, ¶[0014], multiple processes to share storage devices by generating a plurality of virtual controllers, including virtual namespaces that each map to a physical namespace in a physical controller of one of the storage devices, and assigning each application to a virtual controller). Regarding Claim 6, Yang in view of Gunda discloses the system of claim 1, wherein the program is a first program in a multi-tenant environment comprising at least a second program (Yang, ¶[0014], generating a plurality of virtual controllers). Regarding Claim 7, Yang in view of Gunda discloses the system of claim 1, wherein the command is based on a protocol, the protocol including non-volatile memory express (NVMe) (Yang, ¶[0013], one technique to support multiple processes sharing I/O resources involves having a kernel driver manage access to the NVMe devices. Gunda, col 13, line 1-10, memory controller implements an NVMe protocol). Regarding Claim 8, Yang in view of Gunda discloses the system of claim 1, wherein the one or more computational resources comprises a computational resource comprising at least one of a central processing unit (CPU), a graphical processing unit (GPU), a field-programmable gate array (FPGA), a tensor processing unit (TPU), or an application-specific integrated circuit (ASIC) (Yang, ¶[0042], FPGA, ASIC. Also Gunda, col 14, line 10-20). Regarding Claim 9, Yang in view of Gunda discloses the system of claim 1, wherein the storage device comprises a non- volatile memory express (NVMe) enabled storage device, and the controller comprises an NVMe controller (Yang, ¶[0013], one technique to support multiple processes sharing I/O resources involves having a kernel driver manage access to the NVMe devices. Gunda, col 13, line 1-10, memory controller implements an NVMe protocol). Regarding Claim 10, Yang discloses a method for managing memory, the method comprising: receiving, by a controller, a command specifying an amount of computational resources and an amount of memory resources associated with a program (Yang, ¶[0018], the user space includes a plurality of executing application. Each application may execute functions in a user space storage library. Fig-5, ¶[0030], the storage driver discovers one or more physical controllers, having physical namespace in storage devices. This discovery may occur by polling the bus for new storage devices or receiving a signal when the storage device is coupled to the bus); and processing the command by the controller (Yang, ¶[0030]-¶[0031], a virtual controller is generated to have virtual namespaces representing physical namespace in one or more physical controllers. The virtual controller may be dynamically assigned to applications during operations to allow for flexible assignment of application to the physical namespaces in virtual namespaces assigned to virtual controllers). Yang does not explicitly discuss the following limitation that Gunda teaches: a controller in a storage device (Gunda, Fig-1, col 8, line 30-60, storage device may include non-volatile memory, controller 123); the storage device comprising the controller and the computational resources distinct from the controller (Gunda, Fig-1, col 7, line 15-55, the L2P mapping table stores the mapping of logical addresses specified for data written from the host device to physical addresses in the NVM indicating the location where each of the data is stored. This mapping may be performed by the controller of the storage devic); wherein the processing includes dynamically assigning a portion of one or more computational resources and assigning a portion of one or more memory resources based on the command for use by the program (Gunda, col 5, line 1-10, allows for dynamic configuration for host read performance of random read operation. Col 13, line 1-10, a memory controller that implements an NVMe protocol or an extension to an NVMe protocol that allows the memory controller to request a dynamic change to the size); and executing, in the storage device and on the assigned portion of the one or more computational resources, the program using the assigned portion of the one or more memory resources (Gunda, Fig-1, col 8, line 5-55, when the controller 123 executes the read command or write command, the controller accesses the mapping from the cache and reads the data from or writes the data to the NVM at the specified physical address. Col 9, line 5-30). Yang in view of Gunda are analogous art because they are from the “same field of endeavor” and are from the same “problem solving area”. Namely, they pertain to the field of “managing access to storage devices and resources from multiple applications”. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the invention of Yang in view of Gunda to include the idea of caching a portion of a management table that is used to translate between logical addresses used by the host system and physical addresses in the non-volatile memory. The benefit is when the memory system receives a read or write command, it can determine which memory location needs to be accessed (Gunda, col 1, line 30-50). Regarding Claim 11, Yang in view of Gunda discloses the method of claim 10, wherein the command specifies that the portion of the one or more memory resources is restricted from access (Yang, ¶[0015], to manage application access to the storage devices so as to prevent uneven distribution of accesses by the applications to the storage devices. Thus, application access is managed to avoid overloading certain storage devices and to guarantee quality of service levels assigned to the applications). Regarding Claim 12, Yang in view of Gunda discloses the method of claim 10, wherein the method further comprises determining that the program attempts to access a region of the one or more memory resources different from the assigned portion of the one or more memory resources and the storage device stops execution of the program (Yang, ¶[0012], sharing the NVMe driver in the user space with multiple applications may not be efficient if multiple independent applications can access all of the NVMe devices, which may result in overburdening certain of the NVMe devices being accessed by multiple applications in a single host. Also Gunda, Fig-1, col 8, line 5-55, when the controller 123 executes the read command or write command, the controller accesses the mapping from the cache and reads the data from or writes the data to the NVM at the specified physical address. Col 9, line 5-30). Regarding Claim 13, Yang in view of Gunda discloses the method of claim 10, wherein the program is a first program in a multi-tenant environment comprising at least a second program (Yang, ¶[0014], generating a plurality of virtual controllers). Regarding Claim 14, Yang in view of Gunda discloses the method of claim 10, wherein the command is based on a protocol, the protocol including non-volatile memory express (NVMe) (Yang, ¶[0013], one technique to support multiple processes sharing I/O resources involves having a kernel driver manage access to the NVMe devices. Gunda, col 13, line 1-10, memory controller implements an NVMe protocol). Regarding Claim 15, Yang discloses a storage device for managing memory, the storage device comprising: one or more memory resources (Yang, Fig-1); wherein the device is configured to: receive a command specifying an amount of computational resources and an amount of memory resources associated with a program (Yang, ¶[0018], the user space includes a plurality of executing application. Each application may execute functions in a user space storage library. Fig-5, ¶[0030], the storage driver discovers one or more physical controllers, having physical namespace in storage devices. This discovery may occur by polling the bus for new storage devices or receiving a signal when the storage device is coupled to the bus); and process the command by the controller (Yang, ¶[0030]-¶[0031], a virtual controller is generated to have virtual namespaces representing physical namespace in one or more physical controllers. The virtual controller may be dynamically assigned to applications during operations to allow for flexible assignment of application to the physical namespaces in virtual namespaces assigned to virtual controllers). Yang does not explicitly discuss the following limitation that Gunda teaches: a controller (Gunda, Fig-1, col 8, line 30-60, storage device may include non-volatile memory, controller 123); one or more computational resources, distinct from the controller (Gunda, Fig-1, col 7, line 15-55, the L2P mapping table stores the mapping of logical addresses specified for data written from the host device to physical addresses in the NVM indicating the location where each of the data is stored. This mapping may be performed by the controller of the storage device); wherein the processing includes dynamically assigning a portion of one or more computational resources and assigning a portion of one or more memory resources based on the command for use by the program (Gunda, col 5, line 1-10, allows for dynamic configuration for host read performance of random read operation. Col 13, line 1-10, a memory controller that implements an NVMe protocol or an extension to an NVMe protocol that allows the memory controller to request a dynamic change to the size); and executing, in the storage device and on the assigned portion of the one or more computational resources, the program using the assigned portion of the one or more memory resources (Gunda, Fig-1, col 8, line 5-55, when the controller 123 executes the read command or write command, the controller accesses the mapping from the cache and reads the data from or writes the data to the NVM at the specified physical address. Col 9, line 5-30). Yang in view of Gunda are analogous art because they are from the “same field of endeavor” and are from the same “problem solving area”. Namely, they pertain to the field of “managing access to storage devices and resources from multiple applications”. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the invention of Yang in view of Gunda to include the idea of caching a portion of a management table that is used to translate between logical addresses used by the host system and physical addresses in the non-volatile memory. The benefit is when the memory system receives a read or write command, it can determine which memory location needs to be accessed (Gunda, col 1, line 30-50). Regarding Claim 16, Yang in view of Gunda discloses the storage device of claim 15, wherein the command specifies that the portion of the one or more memory resources is restricted from access (Yang, ¶[0015], to manage application access to the storage devices so as to prevent uneven distribution of accesses by the applications to the storage devices. Thus, application access is managed to avoid overloading certain storage devices and to guarantee quality of service levels assigned to the applications). Regarding Claim 17, Yang in view of Gunda discloses the storage device of claim 15, wherein the device is further configured to determine that the program attempts to access a region of the one or more memory resources different from the assigned portion of the one or more memory resources and the storage device stops execution of the program (Yang, ¶[0012], sharing the NVMe driver in the user space with multiple applications may not be efficient if multiple independent applications can access all of the NVMe devices, which may result in overburdening certain of the NVMe devices being accessed by multiple applications in a single host. Also Gunda, Fig-1, col 8, line 5-55, when the controller 123 executes the read command or write command, the controller accesses the mapping from the cache and reads the data from or writes the data to the NVM at the specified physical address. Col 9, line 5-30). Regarding Claim 18, Yang in view of Gunda discloses the storage device of claim 15, wherein the program is a first program in a multi-tenant environment comprising at least a second program (Yang, ¶[0014], generating a plurality of virtual controllers). Regarding Claim 19, Yang in view of Gunda discloses the storage device of claim 15, wherein the command is based on a protocol, the protocol including non-volatile memory express (NVMe) (Yang, ¶[0013], one technique to support multiple processes sharing I/O resources involves having a kernel driver manage access to the NVMe devices. Yang, ¶[0013], one technique to support multiple processes sharing I/O resources involves having a kernel driver manage access to the NVMe devices. Gunda, col 13, line 1-10, memory controller implements an NVMe protocol). Regarding Claim 20, Yang in view of Gunda discloses the storage device of claim 15, wherein the storage device comprises a non-volatile express (NVMe) enabled storage device (Yang, ¶[0013], one technique to support multiple processes sharing I/O resources involves having a kernel driver manage access to the NVMe devices). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure (see PTO-Form 892). Any inquiry concerning this communication or earlier communications from the examiner should be directed to WASIKA NIPA whose telephone number is (571)272-8923. The examiner can normally be reached on M-F, 8 am to 5 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeffrey Pwu can be reached on 571-272-6798. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WASIKA NIPA/ Primary Examiner, Art Unit 2433
Read full office action

Prosecution Timeline

Show 6 earlier events
Feb 17, 2026
Applicant Interview (Telephonic)
Feb 18, 2026
Examiner Interview Summary
Feb 19, 2026
Response after Non-Final Action
Mar 16, 2026
Request for Continued Examination
Apr 01, 2026
Response after Non-Final Action
May 05, 2026
Non-Final Rejection mailed — §103
Jul 16, 2026
Examiner Interview Summary
Jul 16, 2026
Applicant Interview (Telephonic)

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Prosecution Projections

3-4
Expected OA Rounds
75%
Grant Probability
99%
With Interview (+29.1%)
2y 10m (~2m remaining)
Median Time to Grant
High
PTA Risk
Based on 309 resolved cases by this examiner. Grant probability derived from career allowance rate.

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