DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Applicant is advised that the Notice of Allowance mailed 01/21/2026 is vacated. If the issue fee has already been paid, applicant may request a refund or request that the fee be credited to a deposit account. However, applicant may wait until the application is either found allowable or held abandoned. If allowed, upon receipt of a new Notice of Allowance, applicant may request that the previously submitted issue fee be applied. If abandoned, applicant may request refund or credit to a specified Deposit Account.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114.
Drawings
The drawings are objected to because portions of the drawings filed 11/29/2023 are not of sufficient quality so that all details in the drawings are reproducible in the printed patent. See MPEP 608.2 (VII)(B). The black and white copy of the submitted drawings which appear in the IFW reflect the quality of the drawings that will appear in the printed patent; these drawings show the degree of blurriness that occurs after converting the original grayscale drawings to black and white. These drawings do not meet the requirement set forth in 37 CFR 1.84(b)(1). These drawings also do not meet the requirement set forth in 37 CFR 1.84(l). All drawings must be made by a process which will give them satisfactory reproduction characteristics. Every line, number, and letter must be durable, clean, black (except for color drawings), sufficiently dense and dark, and uniformly thick and well-defined. The weight of all lines and letters must be heavy enough to permit adequate reproduction. This requirement applies to all lines however fine, to shading, and to lines representing cut surfaces in sectional views. Lines and strokes of different thicknesses may be used in the same drawing where different thicknesses have a different meaning.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
Page 5, line 1 (¶9) should be amended to read “It is extremely challenging to implement radial stubs…”.
Para. 25, line 3, should be amended to read “impedance of a transmission line”.
Para. 25, line 5 reads “in one embodiments, embodiments of the invention provide a choke”. This line should be corrected.
Appropriate correction is required.
Claim Objections
Claims 11-12 and 18-19 are objected to because of the following informalities:
Claim 11 (line 1): “the first bias” should be amended to “the bias” to avoid antecedent basis issues.
Claim 18 (line 4): typo “second capacitor” should read “second capacitor bank”.
Appropriate correction is required.
Claims 12 and 19 are objected to due to their dependency.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 14-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 recites “further comprising a controller configured to operate the switch and configured to select one or more capacitors in the capacitor bank, wherein the controller is configured to connect the selected one or more capacitors to the bias line”. It is unclear whether the switch (bolded) refers to the first switch recited in claim 1, or to the second switches associated with each capacitor in the capacitor bank. It is also not clear what the difference is between the controller configured to operate the switch and configured to connect the selected one or more capacitors to the bias line. Looking at fig. 3A of the instant Specification, the first switch 318 can be switched on/off and therefore controlling the first switch connects the selected one or more capacitors to the bias line. Or does the controller of claim 14 control the second switches (302, 304, 314, 316)? Clarification is required.
The Examiner interprets this claim as best understood.
Claim 15 is rejected due to its dependency.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 8, 11, 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by IDS document Taravati et al. (US 2024/0072452; “Taravati” or “T”).
Claim 1: Taravati discloses (fig. 5 below & figs. 6-7) “A reconfigurable intelligent surface (title, reflective beam-steering metasurface; ¶33, “tunable beam shapes”) comprising:
a substrate comprising a plurality of unit cells, wherein each of the unit cells comprises (¶8, “a metasurface system is provided. The metasurface system comprises a dielectric layer interposed between two conductor layers. Each of the conductor layers comprises a plurality of unit-cells embedded therein. Each unit-cell in the plurality of unit-cells comprises a surrounding circuit. The surrounding circuit may be composed of at least one microstrip patch radiator in electrical connection with one phase shifter in electrical connection with a unilateral circuit, e.g., a transistor. The transistor radio frequency (RF) circuit includes two decoupling capacitors, and the DC biasing circuit of the transistor includes an inductor, two capacitors and one resistor.”):
a metal element (unit-cell 107; ¶5, “a dielectric layer sandwiched between two conductor layers. The top layer may include patch antenna elements”) formed on a first surface (upper conductor layer) of the substrate (dielectric layer) and configured to be resonant with a frequency or a range of frequencies (¶38, “The proposed concept and nonreciprocity technique can be utilized at different frequency bands ranging from acoustics and microwaves to terahertz and optics. For instance, one may fabricate a similar metasurface at millimeter waves and terahertz frequencies by adjusting the dimensions of the patch antenna elements”);
a radio frequency component connected with the metal element (¶44, “each phase shifter includes an inductor and a by-pass capacitor”);
a bias line (119) formed on a second surface of the substrate (¶43, “The bottom conductor layer includes two metals, the first metal 118 acts as the background grounding of the patch antennas 107, and the second metal 119 provides the DC bias of the transistors 116”); and
a capacitor bank (fig. 5, ¶41, “The nonreciprocal phase shifter is formed by two power dividers 115 a, 115 b, two unilateral transistor-based amplifiers 116 a and 116 b, two fixed phase shifters 114 a and 114 b, and four decoupling capacitors 104, 105, 106 and 107”) connected to the bias line (¶8, “the DC biasing circuit of the transistor”) with a first switch (transistors 116a, 116b),
wherein the capacitor bank comprises selectable capacitors (the state of the decoupling capacitors depends on the direction of the signal entering the structure - ¶42 “FIG. 5 depicts the structure of a two-way nonreciprocal phase shifter 113. The nonreciprocal phase shifter is formed by two power dividers 115 a, 115 b, two unilateral transistor-based amplifiers 116 a and 116 b, two fixed phase shifters 114 a and 114 b, and four decoupling capacitors 104, 105, 106 and 107. The top and bottom phase shifters provide different phase shifts. The top and bottom amplifiers may provide equal amplification and isolation, in the forward and backward directions, respectively. The signal entering the structure from the left side 118 goes through the upper arm, experiences amplification by the top amplifier and then passes through the top phase shifter. However, the signal entering the structure from the right side 119 goes through the lower arm, experiences amplification by the bottom amplifier and then passes through the bottom phase shifter.”)”.
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Claim 8: Taravati discloses the reconfigurable intelligent surface of claim 1, further comprising a second bias line (fig. 5 shows a first bias line 119 associated with power divider 115b, and a second bias line associated with power divider 115a).
Claim 11: Taravati discloses the reconfigurable intelligent surface of claim 1, wherein the first bias line is configured to control an operation of the radio frequency component (¶8, “The DC biasing circuit of the transistor includes an inductor and a by-pass capacitor”).
Claim 13: Taravati discloses the reconfigurable intelligent surface of claim 1, further comprising vias connecting the radio frequency component to the bias line (¶43, “The DC bias of transistors are supplied to the bottom-right side of the top layer 120, transferred to the bottom layer through a via hole, and then supplied to each transistor through a via hole.”).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 5, 16 are rejected under 35 U.S.C. 103 as being unpatentable over IDS document Taravati et al. (US 2024/0072452; “Taravati” or “T”) in view of Singh et al. (NPL “Reconfigurable PCM GeTe-Based Latching 6-Bit Digital Switched Capacitor Bank”; “Singh”).
Claim 2: Taravati discloses (figs. 5-7) the reconfigurable intelligent surface of claim 1.
Taravati does not explicitly disclose wherein each of the selectable capacitors is associated with a second switch.
Singh teaches (fig. 1 below) a capacitor bank that utilizes PCM switches where the selectable capacitors are associated with a second switch (RF PCM switches are associated with capacitors CP1-CP6) (p. 94, final paragraph). Singh teaches “the capacitor bank can be integrated with various RF circuits” (abstract) such as impedance matching networks and tunable filters (Introduction).
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It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the reconfigurable intelligent surface of Taravati wherein each of the selectable capacitors is associated with a second switch, as taught by Singh. Doing so allows for a highly miniaturized PCM switched capacitor bank that demonstrates a high capacitance tuning ratio of 58:1 while having an extremely small footprint (Introduction of Singh).
Claim 5: Taravati teaches the reconfigurable intelligent surface of claim 1.
T does not explicitly disclose wherein the selectable capacitors are configured to be selected in series or parallel.
Singh teaches a capacitor bank that utilizes PCM switches where the selectable capacitors (RF PCM switches are associated with capacitors CP1-CP6) are configured to be selected in series or parallel (see fig. 2 below).
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It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the reconfigurable intelligent surface of Taravati in view of Singh, wherein the selectable capacitors are configured to be selected in series or parallel, as taught by Singh. Doing so allows for a highly miniaturized PCM switched capacitor bank that demonstrates a high capacitance tuning ratio of 58:1 while having an extremely small footprint (Introduction of Singh).
Claim 16: Taravati discloses (figs. 5-7) A reconfigurable intelligent surface (title, reflective beam-steering metasurface; ¶33, “tunable beam shapes”) comprising (¶8, “a metasurface system is provided. The metasurface system comprises a dielectric layer interposed between two conductor layers. Each of the conductor layers comprises a plurality of unit-cells embedded therein. Each unit-cell in the plurality of unit-cells comprises a surrounding circuit. The surrounding circuit may be composed of at least one microstrip patch radiator in electrical connection with one phase shifter in electrical connection with a unilateral circuit, e.g., a transistor. The transistor radio frequency (RF) circuit includes two decoupling capacitors, and the DC biasing circuit of the transistor includes an inductor, two capacitors and one resistor.”):
a substrate comprising a plurality of unit cells, wherein each of the unit cells comprises:
a metal element (unit-cell 107; ¶5, “a dielectric layer sandwiched between two conductor layers. The top layer may include patch antenna elements”) formed on a first surface (upper conductor layer) of the substrate (dielectric layer) and configured to be resonant with a frequency or a range of frequencies (¶38, “The proposed concept and nonreciprocity technique can be utilized at different frequency bands ranging from acoustics and microwaves to terahertz and optics. For instance, one may fabricate a similar metasurface at millimeter waves and terahertz frequencies by adjusting the dimensions of the patch antenna elements”);
a radio frequency component connected with the metal element (¶44, “each phase shifter includes an inductor and a by-pass capacitor”);
a first bias line (119) formed on a second surface of the substrate (¶43, “The bottom conductor layer includes two metals, the first metal 118 acts as the background grounding of the patch antennas 107, and the second metal 119 provides the DC bias of the transistors 118”);
a second bias line formed on the second surface (fig. 5 shows a first bias line 119 associated with power divider 115b, and a second bias line associated with power divider 115a); and
a first capacitor bank (fig. 5, ¶41, “The nonreciprocal phase shifter is formed by two power dividers 115 a, 115 b, two unilateral transistor-based amplifiers 116 a and 116 b, two fixed phase shifters 114 a and 114 b, and four decoupling capacitors 104, 105, 106 and 107”) connected to the first bias line (¶8, “the DC biasing circuit of the transistor”) with a first switch (transistors 116a, 116b), wherein the first capacitor bank comprises selectable capacitors (the state of the decoupling capacitors depends on the direction of the signal entering the structure, and are therefore selectable);
a second capacitor bank connected to the second bias line (fig. 5 shows a first bias line 119 associated with power divider 115b, and a second bias line associated with power divider 115a) with a second switch (two decoupling capacitors associated with transistor 116b), wherein the second capacitor bank comprises selectable capacitors.
T does not explicitly disclose “selectable capacitors that are each associated with a switch”.
Singh teaches (fig. 1) a capacitor bank that utilizes PCM switches where the selectable capacitors are associated with a second switch (RF PCM switches are associated with capacitors CP1-CP6) (p. 94, final paragraph).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the reconfigurable intelligent surface of Taravati wherein the selectable capacitors are each associated with a second switch, as taught by Singh. Doing so allows for a highly miniaturized PCM switched capacitor bank that demonstrates a high capacitance tuning ratio of 58:1 while having an extremely small footprint (Introduction of Singh).
Claim(s) 3-4, 17 are rejected under 35 U.S.C. 103 as being unpatentable over IDS document Taravati et al. (US 2024/0072452; “Taravati” or “T”) in view of Singh et al. (NPL “Reconfigurable PCM GeTe-Based Latching 6-Bit Digital Switched Capacitor Bank”; “Singh”), and further in view of Song et al. (US 2008/0083924; “Song”).
Claim 3: the modified Taravati discloses the reconfigurable intelligent surface of claim 2.
The modified Taravati teaches wherein each of the second switches comprises a material configured to change from a low resistive state to a high resistive state (Singh teaches each of the second switches comprises GeTe, which is a phase change material – abstract).
The modified Taravati does not teach wherein the first switch and each of the second switches comprises a material configured to change from a low resistive state to a high resistive state in response to a first voltage pulse and change from the high resistive state to the low resistive state in response to a second voltage pulse.
T does disclose (¶46) “other amplifiers may be used” (the amplifier is transistor-based, ¶42). “For example, high frequency applications may wish to use alternative amplifiers”.
Song teaches that a thin film transistor comprises a phase change material (chalcogenide) such as GST (¶28). The instant Specification states that GST is a chalcogenide alloy (in ¶16) and that chalcogenide alloys are examples of [phase change] materials that can switch from high resistance states to low resistance states by applying a voltage or voltage pulse. The state may be changed by applying a voltage (¶15). A person of ordinary skill in the art would recognize that any switch in the reconfigurable intelligent surface of Taravati in view of Singh can be implemented using a phase change material, as the first and second switches are both connected to the bias line and used to implement the reconfigurable intelligent surface.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the reconfigurable intelligent surface of Taravati in view of Singh such that the first switch and each of the second switches comprises a material configured to change from a low resistive state to a high resistive state in response to a first voltage pulse and change from the high resistive state to the low resistive state in response to a second voltage pulse, as taught by Singh and Song. Doing so allows for a switch that can be operated using a lower amount of energy while maintaining the required speed of operation.
Claim 4: the modified Taravati teaches the reconfigurable intelligent surface of claim 3, wherein the material comprises a chalcogenide material (¶28 of Song).
Claim 17: the modified Taravati teaches the reconfigurable intelligent surface of claim 16, wherein the switches associated with the selectable capacitors of the first capacitor bank and the switches associated with the selectable capacitors of the second capacitor bank comprise a material configured to change from a low resistive state to a high resistive state. (see fig. 1 & p. 94, col. 1 of Singh, “The PCM switches are represented as reversible binary resistive switches providing resistance between ON-state and OFF-state”).
The modified Taravati does not explicitly teach wherein the first switch, the second switch, and the switches associated with selectable capacitors comprise a material configured to change state in response to a first voltage pulse and change from the high resistive state to the low resistive state in response to a second voltage pulse.
Song teaches that a thin film transistor comprises a phase change material (chalcogenide) such as GST (¶28). The instant Specification states that GST is a chalcogenide alloy (in ¶16) and that chalcogenide alloys are examples of [phase change] materials that can switch from high resistance states to low resistance states by applying a voltage or voltage pulse. The state may be changed by applying a voltage (¶15). A person of ordinary skill in the art would recognize that any switch in the reconfigurable intelligent surface of Taravati in view of Singh can be implemented using a phase change material, as the first and second switches are both connected to the bias line and used to implement the reconfigurable intelligent surface.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the reconfigurable intelligent surface of Taravati in view of Singh, wherein the first switch, the second switch, and the switches associated with selectable capacitors comprise a material configured to change state in response to a first voltage pulse and change from the high resistive state to the low resistive state in response to a second voltage pulse, as taught by Singh and Song. Doing so allows for a switch that can be operated using a lower amount of energy while maintaining the required speed of operation.
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over IDS document Taravati et al. (US 2024/0072452; “Taravati” or “T”).
Claim 6: Taravati discloses the reconfigurable intelligent surface of claim 1, wherein the capacitor bank is formed with respect to a ground plane on a first side of the bias line (see figs. 5 & 6, which show a bias line 119 and a first metal 118 which acts as the background grounding of the patch antennas 107, ¶43 & ¶5. ¶35, “each unit cell has a non-reciprocal phase shifter 113. The nonreciprocal phase shifters 113 can be either one-way or two-way”. ¶42, “The nonreciprocal phase shifter is formed by two power dividers 115 a, 115 b, two unilateral transistor-based amplifiers 116 a and 116 b, two fixed phase shifters 114 a and 114 b, and four capacitors”).
Although, Taravati does not explicitly disclose wherein the reconfigurable intelligent surface further comprises a second capacitor bank formed with respect to the ground plane on a second side of the bias line, as the non-reciprocal phase shifter is formed of four capacitors, and figure 5 shows a two-way nonreciprocal phase shifter having the same elements on the upper and lower pathways, the Examiner considers that the upper pathway has two capacitors which form a first capacitor bank, and the lower pathway has two capacitors which form a second capacitor bank. Both the first and second capacitor banks are formed with respect to the ground plane 118 and are formed either side of the DC bias line 119.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art wherein the reconfigurable intelligent surface further comprises a second capacitor bank formed with respect to the ground plane on a second side of the bias line. Doing so allows for two pathways that provide different phase shifts but equal isolation in the forward and backward pathways (¶42 of Taravati).
Claim 7: Taravati discloses the reconfigurable intelligent surface of claim 1, further comprising a plurality of capacitor banks (two capacitors associated with upper pathway in fig. 5, and two capacitors associated with lower pathway in fig. 5), wherein each of the plurality of capacitor banks is connected to the bias line (119) with a corresponding switch (transistor-based amplifier 116a, 116b).
Claims 10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over IDS document Taravati et al. (US 2024/0072452; “Taravati” or “T”) in view of Gupta et al. (US 2023/0352834 – of record; “Gupta”).
Claim 10: Taravati disclose the reconfigurable intelligent surface of claim 1.
T does not disclose wherein the radio frequency component comprises a PIN diode or a varactor diode.
Gupta teaches a reconfigurable intelligent surface (abstract) comprising a unit cell (metal element) which includes an RF component. Gupta uses PIN and varactor diodes (RF components) for phase control in the unit cell (¶55).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the reconfigurable intelligent surface of Taravati wherein the radio frequency component comprises a PIN diode or a varactor diode, as taught by Gupta. Doing so allows for phase control in the unit cell.
Claim 12: Taravati disclose the reconfigurable intelligent surface of claim 11.
Taravati does not explicitly disclose wherein the radio frequency component is configured to operate as a switch.
Gupta teaches that the varactor and PIN diodes can be forward- and reverse-biased (¶78) and can therefore be configured to operate as a switch.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the reconfigurable intelligent surface of Taravati wherein the radio frequency component is configured to operate as a switch, as taught by Gupta. Doing so allows for phase control in the unit cell.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Taravati et al. (US 2024/0072452; “Taravati” or “T”) in view of Singh et al. (NPL “Reconfigurable PCM GeTe-Based Latching 6-Bit Digital Switched Capacitor Bank”; “Singh”) and Song et al. (US 2008/083924; “Song”), and further in view of Matos et al. (US 11,133,588 - of record; “Matos”).
Claim 20: the modified Taravati teaches the reconfigurable intelligent surface of claim 17.
The modified Taravati does not explicitly teach wherein the reconfigurable intelligent surface is a monolithic structure. However, Singh teaches (abstract) “The capacitor bank utilizes six latching PCM RF series switches, monolithically integrated with size MIM capacitors” and (p. 93, ¶1) “The reported fabrication process offers the flexibility to monolithically integrate various planar RF devices”. Matos teaches a planar reconfigurable intelligent surface with a substrate comprising a plurality of unit cells which include a phase change material (col. 1, final para. & col. 7, final para.). Matos also teaches that the reconfigurable intelligent surface (reflectarray that is a planar RF device) can be formed monolithically (at least claim 12). A person of ordinary skill in the art would recognize that a reconfigurable intelligent surface that includes a phase change material, which can be formed monolithically, and a capacitor bank that includes PCM switches and which can be formed monolithically, could be manufactured as a single monolithic structure.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to modify the reconfigurable intelligent surface of Taravati in view of Singh & Song, wherein the reconfigurable intelligent surface is a monolithic structure, as taught by Singh and Matos. Doing so provides a single structure which improves structural integrity and efficiency.
Allowable Subject Matter
Claims 9 and 18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 14-15 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The pertinent prior art, as a whole, or in combination, cannot be reasonably construed as adequately teaching or suggesting the elements and features of the claimed invention(s) as arranged, disposed, or provided in the manner as claimed by the Applicant.
Regarding claim 9, Taravati does not teach, or suggest, wherein the second bias line is connected with a second capacitor bank through a third switch formed of a chalcogenide material.
Regarding claim 18, Taravati does not teach, or suggest, a controller configured to control states of the first switch, the second switch, the switches associated with the selectable capacitors of the first capacitor bank and the switches associated with the selectable capacitors of the second capacitor bank in order to achieve a particular impedance value.
Claim 19 is allowable due to its dependency.
Regarding claim 14, Taravati does not teach, or suggest, further comprising a controller configured to operate the switch and configured to select one or more capacitors in the capacitor bank, wherein the controller is configured to connect the selected one or more capacitors to the bias line.
Claim 15 is allowable due to its dependency.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Naderi (US 20250055321) discloses a programmable intelligent surface comprising unit cells (meta cell) connected to capacitor banks (¶78).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANNA N HAMADYK whose telephone number is (703)756-1672. The examiner can normally be reached 7:30 am - 5:00 pm.
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/ANNA N HAMADYK/Examiner, Art Unit 2845
/DIMARY S LOPEZ CRUZ/Supervisory Patent Examiner, Art Unit 2845
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