DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04/09/2026 has been entered.
Claim Objections
Claim 1 objected to because of the following informalities: “output termina” should read “output terminal”. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1,3,5,20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (US 2023/0069326) in view of Wu et al. (US 2021/0296547).
As to Claim 1, Baek et al. discloses A display panel, comprising: a substrate (fig.1, substrate SUB); a plurality of light-emitting diodes disposed on the substrate, wherein each of the plurality of light-emitting diodes comprises a first electrode and a second electrode (fig.1-3; each pixel include at least one light emitting element LD, each comprising first electrode ET1 and second electrode ET2; para.0058, 0061),
a first electrode wiring disposed on the substrate and electrically connected to second electrodes of the plurality of light-emitting diodes (fig.1,3; pad P2 are connected first electrode wiring power source VSS, which are connected to electrodes ET2 of the light emitting element LD; para.0090,0097);
a plurality of pixel driving circuits disposed on the substrate, wherein each of the plurality of pixel driving circuits comprises a driving sub-circuit (fig.3, transistors M1, M2, capacitor Cst are read as driving sub-circuit) and a detection sub-circuit (fig.3, transistor M3 is read as detection sub-circuit);
the driving sub- circuit is at least coupled to the first electrode of a corresponding one of the plurality of light- emitting diodes (fig.3, driving transistor M1 connected to electrode ET1 of the light emitting element LD; para.0104-0105);
wherein the driving sub-circuit comprises a driving transistor, a switching transistor, and a storage capacitor (fig.3, driving transistor M1, switching transistor M2, and storage capacitor Cst; para.0105,0108,0111);
the detection sub-circuit comprises a detection input terminal and a detection output terminal (fig.3, transistor M3, input terminal connected to power line INL and output terminal connected to node N2); and
the detection sub-circuit is coupled to the first electrode of the corresponding one of the plurality of light-emitting diodes through the detection output terminal (fig.3, terminal of transistor M3 connected to electrode ET1; para.0113-0114);
wherein the detection output termina is further electrically connected to a capacitor electrode plate of the storage capacitor (fig.3, terminal of transistor M3 connected to capacitor electrode of Cst); and
a detection pad portion, wherein the detection pad portion comprises a first detection pad (pad P1) and a second detection pad (pad P2), the first detection pad is electrically connected to detection input terminals of detection sub-circuits of the plurality of pixel driving circuits (fig.1-3, pad P1 are connected to power source VDD, data DS which are connected to driving transistor M1 and switching transistor M2; para.0082,0087,0095), and
the second detection pad is electrically connected to the first electrode wiring (fig.1-3; pads P2 are connected to first electrode wiring VSS; para.0090,0097);
wherein the display panel further comprises a display area and a non-display area surrounding the display area (fig.1-2, display area DA and non-display area NA; para.0052), wherein the detection pad portion is disposed in the display area, and wherein the detection pad portion is disposed at a non-edge portion of the substrate; and
wherein during a detecting period of the display panel, the driving sub-circuit is configured not to work or drive the corresponding one of the plurality of light-emitting diodes (para.0122, during light emitting inspection period a gate-off Voff may be applied to driving transistor M1); and
the first detection pad is configured to be applied a first electrical signal, the second detection pad is configured to be applied a second electrical signal (para.0121, during light emitting element inspection period, power source VDD and Vint applied to pad P1 and power VSS to pad P2),
wherein the first electrical signal is output to the detection input terminals of the detection sub-circuits and is further output to first electrodes of the plurality of light-emitting diodes through detection output terminals of the detection sub- circuits (para.0118-0123, initialization Vint may be transmitted to transistor M3 via pad P1 and output to electrode ET1 of the light emitting element LD) , and the second electrical signal is output to the second electrodes of the plurality of light- emitting diodes through the first electrode wiring (para.0118-0123, power source VSS is applied to electrode ET2 of light emitting element LD via pad P2), to detect whether all of the plurality of light- emitting diodes are normally lighted (para.0121-0123; defects caused by the light emitting elements provided to the pixels are individually detected), ; [or
when the display panel works normally, the driving sub-circuit is configured to drive the corresponding one of the plurality of light-emitting diodes to emit lights, and the detection sub- circuit is configured not to work or drive the corresponding one of the plurality of light-emitting diodes.]
Baek et al. does not expressly disclose wherein the detection pad portion is disposed in the display area, and wherein the detection pad portion is disposed at a non-edge portion of the substrate.
Wu et al. discloses where a plurality of pads may be disposed in the pixel area, and where the first pads are electrically connected to corresponding first signal lines, where the signal line and may be configured to transmit a power signal (fig.1, pads BP1, BP2; para.0037-0038,0042-0043,0045).
It would have been obvious to one ordinary skill before the effective filing date of the claimed invention to modify the device of Baek et al. with the teachings of Wu et al., such that the first and second pads (P1, P2 of Baek) are disposed in the pixel area (as disclosed by Wu). The motivation being to electrically bond the light emitting element, and provide a pad structure that aids in the increasing the overall light transmittance of the micro light emitting diode display panel and the procedures of the manufacturing process can be simplified.
As to Claim 3, Baek et al in view of Wu et al. disclose wherein the detection sub-circuit further comprises a detection driving terminal (Baek-fig.3, gate of transistor M3); and the detection pad portion further comprises a third detection pad, and the third detection pad is electrically connected to detection driving terminals of detection sub-circuits of the plurality of pixel driving circuits (Baek-fig.3, para.0089, signal pad SP transmit gate signals).
As to Claim 5, Baek et al. in view of Wu et al. disclose, wherein the detection sub-circuit comprises a detection transistor, and a source electrode, a drain electrode and a gate electrode of the detection transistor are the detection input terminal, the detection output terminal and the detection driving terminal, respectively (Baek-fig.3, transistor M3).
As to Claim 20, Baek et al. in view of Wu et al. disclose wherein the third paction pad is disposed in the display area (Baek-fig.1-3, signal pad SP; Wu- para.0037-0038,0042-0043,0045- number of pads may be deposed in the pixel area).
Claim(s) 2,4,6,8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (US 2023/0069326) in view of Wu et al. (US 2021/0296547), further in view of Zhu et al. (US 2017/0263187).
As to Claim 2, Baek et al. in view of Wu et al. disclose wherein the detection sub-circuit further comprises a detection driving terminal (Baek-fig.3, gate of transistor M3), but do not expressly disclose the detection driving terminal of the detection sub-circuit is electrically connected to the detection input terminal.
Zhu et al. discloses a transistor having a driving terminal electrically connected to the input terminal (fig.2, gate electrode and first electrode of transistor T1 connected scan signal S1; para.0036,0039).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed Baek et al. in view of Wu et al., with the teachings of Zhu et al., such that the driving terminal of detection transistor (M3) is electrically connected to the input terminal (as disclosed by Zhu et al). The motivation being so that input voltage signal may not only act to turn the transistor, but further act as an initiation voltage to initiate the driving transistor and the light emitting element. Thus, the layout area of the pixel driving circuit may be reduced.
As to Claim 4, Baek et al. in view of Wu et al., as modified by Zhu et al., disclose wherein the detection sub-circuit comprises a detection transistor, and a source electrode, a drain electrode and a gate electrode of the detection transistor are the detection input terminal, the detection output terminal and the detection driving terminal, respectively (Baek-fig.4, transistor M3).
As to Claim 6, Baek et al. in view of Wu et al., as modified by Zhu et al., disclose comprising a plurality of first detection wirings (Baek-fig.13; Vdd and Vint), and the plurality of first detection wirings are configured to electrically connect first electrodes of the plurality of light-emitting diodes to the first detection pad (Baek-fig.1-3; Vdd and Vint lines connect pad P1 to electrode ET1).
As to Claim 8, Baek et al. in view of Wu et al. as modified by Zhu et al., disclose wherein an output terminal of the switching transistor is electrically connected to a driving terminal of the driving transistor and a first capacitor electrode plate of the storage capacitor (Baek-fig.3, terminal of transistor M2 connected to gate of driving transistor M1 and capacitor Cst), and an output terminal of the driving transistor is electrically connected to the first electrode of the corresponding one of the plurality of light-emitting diodes and the capacitor electrode plate of the storage capacitor (Baek-fig.3, terminal of driving transistor M1 connected to electrode ET1 of light emitting element LD and capacitor Cst).
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (US 2023/0069326) in view of Wu et al. (US 2021/0296547), further in view of Zhu et al. (US 2017/0263187), and further in view of Kishii et al. (US 2016/0104422).
As to Claim 9, Baek et al. in view of Wu et al., as modified by Zhu et al. do not expressly disclose, but Kishii et al. discloses: wherein the driving sub-circuit further comprises a monitoring transistor (Kishii-fig.7- transistor T3; para.00172-0173), an output terminal of the monitoring transistor is electrically connected to the first electrode of the corresponding one of the plurality of light-emitting diodes, the output terminal of the driving transistor and the second capacitor electrode plate of the storage capacitor (Kishii-fig.7- terminal of T3 connected to anode of OLED, driving transistor T2 and capacitor Cst).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Baek et al. in view of Wu et al., as modified by Zhu et al., with the teachings of Kishii et al., the motivation being to provide a monitor control transistor that controls whether or not to detect the TFT characteristics and the OLED characteristics.
Claim(s) 10-11, 13, 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (US 2023/0069326) in view of Wu et al. (US 2021/0296547), further in view of Jiang et al. (US 2021/0183282).
As to Claim 10, Baek et al. in view of Wu et al. disclose display panel of Claim 1 (see above),
providing a motherboard to be tested, wherein the motherboard to be tested comprises a plurality of display panels of claim 1; providing a detection power supply, wherein the detection power supply comprises a plurality of electric signal output terminals (Baek-fig.1-3, power source Vdd, Vint, Vss); electrically connecting the plurality of electrical signal output terminals of the detection power supply to corresponding detection pads of the detection pad portion (Baek-fig.1-3; para.0087,0090,0085,0097, 0118-0122; power source Vdd, Vint via pad P1, and Vss via pad P2 ); turning on the detection power supply, and lighting the plurality of light-emitting diodes in the display panel, to detect whether all of the plurality of light-emitting diodes in the display panel are normally lighted (Baek- para.0118-0123); and cutting the motherboard to be tested to form the plurality of display panels, wherein the detection pad portion is disposed at the non-edge portion of the substrate (Wu- para.0037-0038,0042-0043,0045).
Baek et al. in view of Wu et al. do not expressly disclose providing a motherboard to be tested, wherein the motherboard to be tested comprises a plurality of display panels; cutting the motherboard to be tested to form the plurality of display panels.
Jiang et al. discloses: providing a motherboard to be tested, wherein the motherboard to be tested comprises a plurality of display panels (para.0047); and cutting the motherboard to be tested to form the plurality of display panels (para.0047-0049).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Baek et al. in view of Wu et al., with the teachings of Jiang et al., the motivation being to test the display motherboard, thereby preventing the display device from poor display.
As to Claim 11, Baek et al. in view of Wu et al., as modified by Jiang al., disclose wherein the detect whether all of the plurality of light-emitting diodes in the display panel are normally lighted comprises: in response to determine a light-emitting diode being damaged, repairing the damaged light-emitting diode (Baek-para.0123).
As to Claim 13, Baek et al. in view of Wu et al., as modified by Jiang et al., disclose wherein the detection sub-circuit further comprises a detection driving terminal (Baek-fig.3, transistor M3); and the detection pad portion further comprises a third detection pad, and the third detection pad is electrically connected to detection driving terminals of detection sub-circuits of the plurality of pixel driving circuits (Baek-fig.3, para.0089, signal pad SP transmit gate signals).
As to Claim 15, Baek et al. in view of Wu et al., as modified by Jiang et al., disclose wherein the detection sub-circuit comprises a detection transistor, and a source electrode, a drain electrode and a gate electrode of the detection transistor are the detection input terminal, the detection output terminal and the detection driving terminal, respectively (Baek-fig.3, transistor M3).
Claim(s) 12,14,16,18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (US 2023/0069326) in view of Wu et al. (US 2021/0296547), further in view of Jiang et al. (US 2021/0183282), and further in view of Zhu et al. (US 2017/0263187).
As to Claim 12, Baek et al. in view of Wu et al. as modified by Jiang etal, disclose wherein the detection sub-circuit further comprises a detection driving terminal (Baek-fig.3, gate of transistor M3), but do not expressly disclose the detection driving terminal of the detection sub-circuit is electrically connected to the detection input terminal.
Zhu et al. discloses a transistor having a driving terminal electrically connected to the input terminal (fig.2, gate electrode and first electrode of transistor T1 connected scan signal S1; para.0036,0039).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed Baek et al. in view of Wu et al., as modified by Jiang et al., with the teachings of Zhu et al., such that the driving terminal of detection transistor (M3) is electrically connected to the input terminal (as disclosed by Zhu et al). The motivation being so that input voltage signal may not only act to turn the transistor, but further act as an initiation voltage to initiate the driving transistor and the light emitting element. Thus, the layout area of the pixel driving circuit may be reduced.
As to Claim 14, Baek et al. in view of Wu et al., as modified by Jiang et al. and Zhu et al., disclose wherein the detection sub-circuit comprises a detection transistor, and a source electrode, a drain electrode and a gate electrode of the detection transistor are the detection input terminal, the detection output terminal and the detection driving terminal, respectively (Baek-fig.3, transistor M3).
As to Claim 16, Baek et al. in view of Wu et al., as modified by Jiang et al. and Zhu et al., disclose
a plurality of first detection wirings (Baek-fig.13; Vdd and Vint), and the plurality of first detection wirings are configured to electrically connect first electrodes of the plurality of light-emitting diodes to the first detection pad (Baek-fig.1-3; Vdd and Vint lines connect pad P1 to electrode ET1).
As to Claim 18, Baek et al. in view of Wu et al., as modified by Jiang et al. and Zhu et al., disclose
an output terminal of the switching transistor is electrically connected to a driving terminal of the driving transistor and a first capacitor electrode plate of the storage capacitor (Baek-fig.3, terminal of transistor M2 connected to gate of driving transistor M1 and capacitor Cst), and an output terminal of the driving transistor is electrically connected to the first electrode of the corresponding one of the plurality of light-emitting diodes and the capacitor electrode plate of the storage capacitor (Baek-fig.3, terminal of driving transistor M1 connected to electrode ET1 of light emitting element LD and capacitor Cst).
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Baek et al. (US 2023/0069326) in view of Wu et al. (US 2021/0296547), further in view of Jiang et al. (US 2021/0183282), and further in view of Zhu et al. (US 2017/0263187), and further of Kishii et al. (US 2016/0104422).
As to Claim 19, Baek et al. in view of Wu et al., as modified by Jiang et al. and Zhu et al., do not expressly disclose, but Kishii et al. discloses: wherein the driving sub-circuit further comprises a monitoring transistor (Kishii-fig.7- transistor T3; para.00172-0173), an output terminal of the monitoring transistor is electrically connected to the first electrode of the corresponding one of the plurality of light-emitting diodes, the output terminal of the driving transistor and the second capacitor electrode plate of the storage capacitor (Kishii-fig.7- terminal of T3 connected to anode of OLED, driving transistor T2 and capacitor Cst).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Baek et al. in view of Wu et al., as modified by Jiang et al. and Zhu et al., with the teachings of Kishii et al., the motivation being to provide a monitor control transistor that controls whether or not to detect the TFT characteristics and the OLED characteristics.
{Examiners Note: It is noted that Claims 10-16, 18-19, are drawn to a manufacturing method containing nominal limitations, as being drawn in part to the apparatus of Claim 1. However, because presently the claim as recited does not represent an undue burden to examination, no restriction has been made. Amendment of any claims to include additional non-nominal limitations {particulars of the manufacturing process} that would represent an undue burden may result in restriction due to original presentation}.
Response to Arguments
Applicant’s arguments with respect to claim(s) 04/09/2026 have been considered but are moot because the new ground of rejection applied as necessitated by amendment.
Conclusion
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/DISMERY MERCEDES/ Primary Examiner, Art Unit 2627
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