Prosecution Insights
Last updated: October 23, 2026
Application No. 18/523,583

CONTROL DEVICES TO HANDLE UNBALANCED LOADS FOR POWER SOURCES

Final Rejection §102
Filed
Nov 29, 2023
Examiner
AUGUSTINE, NICHOLAS
Art Unit
2178
Tech Center
2100 — Computer Architecture & Software
Assignee
Cummins Inc.
OA Round
2 (Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
9m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
607 granted / 834 resolved
+17.8% vs TC avg
Strong +28% interview lift
Without
With
+27.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
31 currently pending
Career history
883
Total Applications
across all art units

Statute-Specific Performance

§101
10.6%
-29.4% vs TC avg
§103
37.4%
-2.6% vs TC avg
§102
48.8%
+8.8% vs TC avg
§112
1.9%
-38.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 834 resolved cases

Office Action

§102
DETAILED ACTION A. This action is in response to the following communications: Amendment filed: 05/14/2026. This action is made Final. B. Claims 1-7 remain pending. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cheng, Po-Tai et al. (US Pat. 5,883,796), herein referred to as “Cheng”. As for claim 1, Cheng teaches. A controller for handling unbalanced loads for power sources (col. 5, lines 50-56 a synchronous reference frame based controller (SRF controller)) comprising: a computer-readable medium having instructions stored thereon (col.12, line 1 hardware for processing); and at least one processor configured to execute the instructions to: receive a plurality of signals to be provided to a plurality of legs of an inverter (col. 8, lines 44-56); identify an unbalanced load based on harmonic component being outside a frequency band for a first signal of the plurality of signals (col. 5, line 50 Control of the Voltage compensator inverter to restore the load voltages to a balanced three-phase condition at pre-fault Voltage Signal levels; col. 12 line 15 The dynamic Series Voltage restoration System of the present invention automatically restores an unbalanced power System to the balanced condition. Thus, the present invention may be employed as, and automatically performs the function of, a power line conditioner for restoring balance to an unbalanced System, caused, for example, by connection of the power System to an unbalanced load; col. 8, lines 44-65 the active impedance synthesizer); determine, responsive to the identification of the unbalanced load, an adjustment value by applying a filter having a resonant gain at a target frequency associated with the harmonic component of the first signal; and modify the first signal using the adjustment value to generate a second signal to provide to a leg of the plurality of legs of the inverter (Cheng identifies the problem in power quality with unbalanced multi-phase power that is caused by unbalanced loads and harmonic distortion in the power supply line and the components that can cause harmonic distortion are listed as three-phase diode and thyristor bridge inverters used in DC power supplies, adjustable speed drives (ASDs), and Uninterruptible Power Supplies (UPS). Cheng provides solution with active power line conditioners and/or active filters may be used to compensate for such unbalanced load and harmonic distortion conditions. As known in the art active power line conditions and active filters function in an automatic nature (real-time) and that they inject corrective power to fix them for unbalanced loads, harmonics and voltage fluctuations, thus when the three phrases of a power system does not carry equal current this can be fixed in real-time. Cheng describes his component as “an active impedance synthesizer” which functions as a specialized active filter that uses impedance syntheses to generate inverter voltage commands that correct line conditions automatically. It is a control block inside a power electronics system to behave like a programmable impedance by generating voltage commands based upon measured line currents, resistance and inductance. It operates in a two-phase reference frame by converting three-phase to two for making real-time control easier. This lets the inverter act like a harmonic canceling device, a reactive power compensator, virtual resistor/inductor and stabilizer for unbalanced loads. (col. 3, lines 33-52 and col.8, line 44 – col.9, line 30; col. 25 line 50 – col. 26, line 14 Low pass filters 168 and 170 may be used to extract the DC component from the two-phase Voltage compensator inverter terminal Voltage signals V and V. The low-pass filters 168 and 170 may be realized by maximally flat Butterworth low-pass filters. Other conventional low pass filter designs may also be used, Such as Sixth order Switch-capacitor low-pass filters with an appropriate cut-off frequency (e.g., 10 Hz). The ability to extract a particular frequency component from a measured current or Voltage Signal, using a low-pass filter or Similar device, without introducing any phase delay, is a significant advantage of SRF based controllers. Most other controllers will introduce Significant phase shift at both harmonic and fundamental frequencies.). As for claim 2, Cheng teaches. The controller of claim 1, wherein the at least one processor is further configured to execute the instructions to: identify, from a plurality of components corresponding to the plurality of signals, a component corresponding to the first signal; and determine, in accordance with identified component, the frequency band and the resonant gain to apply for the first signal to suppress voltage spatial harmonics (col. 25 line 50 – col. 26, line 14 and col. 11, line 42 A dynamic Voltage restoration System in accordance with the present invention may also be configured to perform the functions of a System for reducing or eliminating harmonic components in the power transmission line signal. A harmonic controller, Such as an SRF controller, is used to generate harmonic inverter Voltage command Signals which are modulated and provided to the Voltage compensator inverter to control the inverter Switches to generate inverter Voltage Signals to cancel undesirable power transmission line harmonics. Since the harmonic inverter Voltage command Signals generated by the harmonic controller define the harmonic frequency of operation of the Voltage compensator inverter, and the inverter Voltage command Signals provided by the voltage restoration controller define the fundamental frequency operation of the inverter, the harmonic inverter Voltage command Signals may be combined with the inverter Voltage command Signals provided by the Voltage restoration controller So as to provide control Signals for controlling the Voltage compensator inverter to provide Simultaneously both Voltage restoration and harmonic compensation, without modification of the Voltage compensator inverter itself.). As for claim 3, Cheng teaches. The controller of claim 1, wherein the at least one processor is further configured to execute the instructions to: identify the unbalanced load about at least one frequency of a plurality of defined frequencies for the first signal; and determine, responsive to the identification of the unbalanced load, a second adjustment value to be applied about the frequency to suppress the unbalanced load (col. 41, lines 7-20 harmonic filtering or harmonic compensation. AS discussed previously, certain non-linear power electronic loads, Such as three-phase diode and thyristor bridge inverters used in DC power Supplies, adjustable speed drives (ASDs), and uninterruptible power supplies (UPS), can cause harmonic distortion in the power Supply line 78, Such as by injecting harmonic current into the power System. However, it is known that these harmonic components in the transmission line Signal can be reduced or eliminated through active filtering. Active filtering involves the injection of Voltage Signals into the power transmission line which cancel). As for claim 4, Cheng teaches. The controller of claim 1, wherein the at least one processor is further configured to execute the instructions to select, based on a component of a plurality of components corresponding to the first signal, a second frequency band within which to scan for the unbalanced load (col. 11 line 42 dynamic Voltage restoration System in accordance with the present invention may also be configured to perform the functions of a System for reducing or eliminating harmonic components in the power transmission line signal. A harmonic controller, Such as an SRF controller, is used to generate harmonic inverter Voltage command Signals which are modulated and provided to the Voltage compensator inverter to control the inverter Switches to generate inverter Voltage Signals to cancel undesirable power transmission line harmonics. Since the harmonic inverter Voltage command Signals generated by the harmonic controller define the harmonic frequency of operation of the Voltage compensator inverter, and the inverter Voltage command Signals provided by the voltage restoration controller define the fundamental frequency operation of the inverter, the harmonic inverter Voltage command Signals may be combined with the inverter Voltage command Signals provided by the Voltage restoration controller So as to provide control Signals for controlling the Voltage compensator inverter to provide Simultaneously both Voltage restoration and harmonic compensation, without modification of the Voltage compensator inverter itself). As for claim 5, Cheng teaches. The controller of claim 1, wherein the at least one processor is further configured to execute the instructions to: determine that none of the plurality of signals corresponds to a reference signal; and generate, responsive to determining that none of the plurality of signals corresponds to the reference signal, the reference signal set to a defined value to add to the plurality of signals (col. 11, line 8 The compensation reference decision System alternatively may select a lower level of Voltage restoration when extreme Voltage Sags on the transmission lines are encountered. At lower Voltage restoration levels, e.g., a restoration level of 90% of the pre-fault load voltage level, the Voltage compensator inverter can be controlled Such that there is no net power flow between the compensator and the utility transmission lines even under extreme fault conditions. Thus, the use of a compensation reference decision System allows Voltage restoration at less than the full restoration level to be maintained indefinitely in response to Severe utility System fault conditions.). As for claim 6, Cheng teaches. The controller of claim 1, wherein the at least one processor is further configured to execute the instructions to transform the plurality of signals in a first domain to a second plurality of signals in a second domain with the addition of at least one reference signal for a corresponding leg of the plurality of legs, the reference signal to be used to balance across the second plurality of signals (fig. 22; col. 35 lines 21-32 four-leg three-phase inverter for switching devices across DC bus and injecting desired signal). As for claim 7, Cheng teaches. The controller of claim 1, wherein the at least one processor is further configured to execute the instructions to regulate the first signal via a proportional-integral (PI) controller, parallel to adjustment value applied to the first signal (col. 35, lines 4-20 the voltage compensator inverter illustrated in fig. 21-22 has three phase single inverters connected in parallel across common DC bus each of which includes inverter switching devices for adjustment values to first signal). (Note:) It is noted that any citation to specific, pages, columns, lines, or figures in the prior art references and any interpretation of the references should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. In re Heck, 699 F.2d 1331, 1332-33, 216 USPQ 1038, 1039 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006,1009, 158 USPQ 275, 277 (CCPA 1968)). Response to Arguments Applicant's arguments filed 05/14/2026 have been fully considered but they are not persuasive. A1. Applicant agues that Cheng does not teach: “identify an unbalanced load based on harmonic component being outside a frequency band for a first signal of the plurality of signals; determine, responsive to the identification of the unbalanced load, an adjustment value by applying a filter having a resonant gain at a target frequency associated with the harmonic component of the first signal; and modify the first signal using the adjustment value”. R1. Examiner does not agree, Cheng identifies the problem in power quality with unbalanced multi-phase power that is caused by unbalanced loads and harmonic distortion in the power supply line and the components that can cause harmonic distortion are listed as three-phase diode and thyristor bridge inverters used in DC power supplies, adjustable speed drives (ASDs), and Uninterruptible Power Supplies (UPS). Cheng provides solution with active power line conditioners and/or active filters may be used to compensate for such unbalanced load and harmonic distortion conditions. As known in the art active power line conditions and active filters function in an automatic nature (real-time) and that they inject corrective power to fix them for unbalanced loads, harmonics and voltage fluctuations, thus when the three phrases of a power system does not carry equal current this can be fixed in real-time. Cheng describes his component as “an active impedance synthesizer” which functions as a specialized active filter that uses impedance syntheses to generate inverter voltage commands that correct line conditions automatically. It is a control block inside a power electronics system to behave like a programmable impedance by generating voltage commands based upon measured line currents, resistance and inductance. It operates in a two-phase reference frame by converting three-phase to two for making real-time control easier. This lets the inverter act like a harmonic canceling device, a reactive power compensator, virtual resistor/inductor and stabilizer for unbalanced loads. (col. 3, lines 33-52 and col.8, line 44 – col.9, line 30). Quoted citations relied upon: “Other power quality problems which are also faced by industrial customers include unbalanced multi-phase power, which may be caused by unbalanced loads connected to the power system, and harmonic distortion in the power supply line, which is typically caused by non-linear loads, such as three-phase diode and thyristor bridge inverters used in DC power supplies, adjustable speed drives (ASDs), and Uninterruptible Power Supplies (UPS), which cause harmonic distortion in the power supply by injecting harmonic current into the power system that generates transient and spurious frequencies in the power signal.” “(32) The resistance and inductance command signal values are provided to an active impedance synthesizer which generates the DC bus control inverter voltage command signals in the two-phase reference frame. The active impedance synthesizer employs measured power transmission line currents, in combination with the resistance and inductance command signal values, to generate the DC bus control inverter voltage command signals. The measured three-phase line currents are transformed into two-phase synchronously rotating reference frame signal values at the fundamental frequency by a positive sequence three-phase to two-phase synchronous reference frame transformation device. The three-phase to two-phase SRF transformation employs sin .theta. and cos .theta. values to perform the three-phase to synchronously rotating two-phase transformation. The sin .theta. and cos .theta. values may preferably be derived from a phase-locked loop (PLL) on the voltage compensator inverter terminal voltage waveform, and a look-up table of sin .theta. and cos .theta. values. The DC component is extracted from the resulting synchronously rotating two-phase line current signal values using low-pass filters or another method for extracting the DC component from a signal. This DC signal corresponds to the fundamental positive sequence line current component. The extracted DC signals are combined with the DC bus control resistance and inductance command signal values by the active impedance synthesizer to generate the DC bus control inverter voltage command signals in the two-phase reference frame. (The same extracted DC signals may also preferably be used to derive the positive sequence component magnitude of the line current which, as described previously, is used to derive the DC bus control inductance command signal value.) (33) The DC bus control inverter voltage command signals generated by the active impedance synthesizer preferably are combined with the two-phase positive sequence inverter voltage command signals. The combined two-phase DC bus control and positive sequence inverter voltage command signals are then transformed, by a positive sequence two-phase to three-phase transformation at the fundamental frequency, into three-phase command signals which, in turn, are modulated and provided to the voltage compensator inverter to control the inverter switches to generate the desired inverter voltage signal at the fundamental frequency. The positive sequence inverter voltage command signals, including the DC bus control inverter voltage command signals, in combination with the negative sequence inverter voltage command signals, cause the compensator inverter to be controlled to generate an inverter voltage signal in series with the power transmission lines which both restores the load voltage to a balanced three-phase condition at pre-fault voltage levels and rotates the restored load voltage vectors by a phase rotation angle .phi. to ensure that the total real power associated with the voltage compensator inverter is equal to zero.” Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Inquires Any inquiry concerning this communication should be directed to NICHOLAS AUGUSTINE at telephone number (571)270-1056. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. PNG media_image1.png 213 559 media_image1.png Greyscale /NICHOLAS AUGUSTINE/Primary Examiner, Art Unit 2178 September 28, 2026
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Prosecution Timeline

Nov 29, 2023
Application Filed
Feb 27, 2026
Non-Final Rejection mailed — §102
May 14, 2026
Response Filed
Oct 01, 2026
Final Rejection mailed — §102 (current)

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
99%
With Interview (+27.9%)
3y 8m (~9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 834 resolved cases by this examiner. Grant probability derived from career allowance rate.

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