Prosecution Insights
Last updated: August 16, 2026
Application No. 18/525,128

GRAPHENE DEVICE AND METHOD OF FABRICATING A GRAPHENE DEVICE

Final Rejection §102§103
Filed
Nov 30, 2023
Priority
Dec 23, 2022 — EU 22383282.5
Examiner
WATTS, JEREMY DANIEL
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Graphenea Semiconductor S L U
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
6m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
74 granted / 87 resolved
+17.1% vs TC avg
Moderate +14% lift
Without
With
+13.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
35 currently pending
Career history
115
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
69.3%
+29.3% vs TC avg
§102
25.6%
-14.4% vs TC avg
§112
4.8%
-35.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 87 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Claim 15 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on March 12, 2026. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1 – 6, 8 – 10, and 12 – 14 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by US Published Patent Application No. 2018/0130912 to Tateno et al. Regarding claim 1, Tateno et al. teach a method of fabricating a graphene-based solid-state device, the method (Figs. 4 – 5, for example) including the following steps: disposing a graphene layer (12) on a substrate (10), depositing a sacrificial layer (16) on the graphene layer, the sacrificial layer being made of a non-polymeric dielectric material (¶ [0017]), patterning the graphene layer (Fig. 4C) by defining at least one channel region (¶ [0019]), wherein the patterning is done by applying a lithographic process followed by an etching process using a resist layer, thus obtaining a patterned graphene layer (¶ [0019]), wherein the graphene layer has been protected against contamination from the resist layer by the sacrificial layer, patterning on the graphene layer (Fig. 5A) a geometry of at least one metallic contact to be deposited, and depositing the at least one metallic contact (¶ [0019], 24, 26, 28) on the graphene layer. Regarding claim 2, Tateno et al. teach a method, wherein the substrate is made of a material comprising silicon carbide (¶ [0015]). Regarding claim 3, Tateno et al. teach a method, wherein the substrate is formed by two layers, wherein one of the layers is made of one of silicon and the other is made of glass (¶ [0015]; silicon carbide often has a glass form). Regarding claim 4, Tateno et al. teach a method, wherein prior to disposing the at least one graphene layer on the substrate, the substrate is cleaned to remove impurities and increase hydrophilicity ¶ [0015]. Regarding claim 5, Tateno et al. teach a method, wherein the at least one graphene layer is deposited, transferred or grown on the substrate (¶ [0015]). Regarding claim 6, Tateno et al. teach a method, wherein the sacrificial layer is deposited using atomic layer deposition (ALD) (¶ [0017]). Regarding claim 8, Tateno et al. teach a method, wherein the non-polymeric dielectric material of which the sacrificial layer is made is an inorganic oxide (¶ [0017]). Regarding claim 9, Tateno et al. teach a method, wherein the inorganic oxide is A12O3 (¶[0017]). Regarding claim 10, Tateno et al. teach a method, wherein the patterning of the at least one graphene channel is done as follows: applying a wet etching technique to dissolve the area of the sacrificial layer not covered by resist layer, exposing the graphene layer(s) underneath, and applying a dry etching technique to remove the area of graphene layer(s) not covered by the stack formed by sacrificial layer and resist layer (¶ [0018]). Regarding claim 12, Tateno et al. teach a method, wherein the patterning on the graphene layer of the geometry of the at least one metallic contact to be deposited is done as follows: depositing a mask layer on the graphene layer, creating an inverse pattern in the mask layer by removing the mask layer in the selected areas where the metal is to be deposited, and leaving the mask layer in the regions to be protected (¶ [0019]). Regarding claim 13, Tateno et al. teach a method, wherein the at least one metallic contact is deposited as follows: applying a metallic layer, and lifting off the remaining mask layer, thus removing the metal deposited on the remaining mask layer, so that the at least one metallic contact remains only in the regions where metal has a direct contact with the graphene layer (¶ [0019]). Regarding claim 14, Tateno et al. teach a method, wherein the geometry of the at least one metallic contact (28) to be deposited is patterned within the graphene channel and separate from the lateral sides of the graphene channel. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 7, and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Tateno et al. Regarding claim 7, Tateno et al. do not teach a method, wherein the thickness of the sacrificial layer is selected to be between 1k and 100µm. Tateno et al. do not teach or suggest the optimal thickness of the sacrificial layer. It would have been obvious and necessary for one having ordinary skill in the art at the time the invention was filed to find the optimal thickness of the sacrificial layer through routine experimentation since it is desirable for the sacrificial layer to provide the expected protection of the graphene layer. Regarding claim 11, Tateno et al. teach a method wherein the graphene layer not covered by resist is dry etched (¶ [0018]). Tateno et al. do not teach wherein the sacrificial layer is also dry etched. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to also use dry etching to pattern the sacrificial layer, since it is desirable to manufacture devices economically and removing the wet etching step would have reduced the cost of manufacture. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Patent No. 8,673,703 to Lin et al. teach forming a graphene layer on a substrate and patterning the layer using a photoresist. Lin et al. do not teach forming a sacrificial layer on the graphene before patterning. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS W OWENS whose telephone number is (571)272-1662. The examiner can normally be reached M-F 5:30-1:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached at 571-270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. DOUGLAS W. OWENS, Esq. Primary Patent Examiner Art Unit 2897 /DOUGLAS W OWENS/Primary Patent Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Nov 30, 2023
Application Filed
Mar 27, 2026
Non-Final Rejection mailed — §102, §103
Jun 29, 2026
Response Filed
Aug 14, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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DISPLAY SUBSTRATE WITH PIXEL OPENING AND DISPLAY DEVICE
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Patent 12696467
GRAPHENE DEVICE AND METHOD OF FABRICATING A GRAPHENE DEVICE
2y 8m to grant Granted Jul 28, 2026
Patent 12690310
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Patent 12690376
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+13.8%)
3y 3m (~6m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 87 resolved cases by this examiner. Grant probability derived from career allowance rate.

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