DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Election/Restrictions
Applicant’s election without traverse of Invention I, corresponding to claims 1-7, in the reply filed on 01/22/2026 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, because the specification, while being enabling for the oscillator 114 shown in Fig. 4 of the Specification as filed wherein the oscillator circuitry including a second transistor having a first terminal coupled to the first output of the current mirror (transistor 414), having a second terminal coupled to the control terminal (gate of 463 or 438) and having a control terminal coupled to the second terminal of the first transistor (drain of 463 or 438), does not reasonably provide enablement for an oscillator circuitry including a second transistor having a second terminal coupled to the control terminal and the second terminal of the first transistor, and having a control terminal coupled to the second terminals of the first and second transistors. The specification does not enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to use the invention commensurate in scope with these claims. The claimed first and second transistors of the oscillator circuitry results in a single diode receiving an input from the output of the current mirror and the specification does not disclose an oscillator circuitry comprising such a diode. The disclosed oscillator comprising two cross-coupled transistors is not commensurate in scope with the claimed diode structure. The specification is lack of enough amount of guidance or direction to lead one of the ordinary skilled in the art to make and use of an oscillator circuitry from the claimed diode structure.
Claims 2-7 are rejected due to their dependencies to claim 1 above.
Allowable Subject Matter
Claims 1-7 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 1, the prior arts fail to teach or reasonably suggest a circuit comprising: oscillator circuitry including: a first transistor having a first terminal coupled to the first output of the current mirror, having a second terminal, and having a control terminal; and a second transistor having a first terminal coupled to the first output of the current mirror, having a second terminal coupled to the control terminal and the second terminal of the first transistor, and having a control terminal coupled to the second terminals of the first and second transistors, in combination with the other limitations of the claim.
Regarding claims 2-7, claims 2-7 would be allowable due to their dependencies to claim 1 above.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEOKJIN KIM whose telephone number is (571)272-1487. The examiner can normally be reached M-F: 8:30am-5:00pm.
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/SEOKJIN KIM/Primary Examiner, Art Unit 2844
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