Prosecution Insights
Last updated: April 19, 2026
Application No. 18/526,098

ELECTRICAL AND/OR ELECTRONIC DEVICE

Non-Final OA §102§103
Filed
Dec 01, 2023
Examiner
WHALEN, DANIEL B
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Robert Bosch GmbH
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
96%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
793 granted / 993 resolved
+11.9% vs TC avg
Strong +16% interview lift
Without
With
+16.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
53 currently pending
Career history
1046
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
43.4%
+3.4% vs TC avg
§102
32.3%
-7.7% vs TC avg
§112
17.3%
-22.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 993 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: ELECTRICAL AND/OR ELECTRONIC DEVICE COMPRISING ELECTRICAL AND/OR ELECTRONIC ASSEMBLY FORMED ON COOLING DEVICE Claim Objections Claims 8-10 are objected to because of the following informalities: Regarding claim 8, it appears that “an electrical and/or electronic assembly” in line 1 should be changed to, as a suggestion, “an electrical and/or electronic device” in order to correctly refer to an electrical and/or electronic device 1 as shown in Figs. 2-3. Regarding claim 9, “A method for manufacturing an electrical and/or electronic assembly” should be changed to “The method for manufacturing the electrical and/or electronic device”. Regarding claim 10, “an electrical and/or electronic assembly” should be changed to “the electrical and/or electronic device”. Appropriate corrections are required. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Claims 1 and 8 with the limitation “means of an intermediate layer” are being interpreted under 35 U.S.C. 112(f). Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-3, 5, and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Goel et al. (US 2016/0294340 A1; hereinafter “Goel”). Regarding claim 1, Goel teaches an electrical and/or electronic device (1) comprising: at least one cooling device (10) having a top side (11) (a single metal flange 102 having a top side), an electrical and/or electronic assembly (40) (a semiconductor die 120) arranged on the top (11) of the cooling device (10) having a contact surface (41) (a bottom surface of 120), wherein the contact surface (41) faces the top side (11) of the cooling device (10) and is attached to the top side (11) of the cooling device (10) by means of an intermediate layer (30) (a die attach material, not shown in Fig. 1) arranged between the cooling device (10) and the contact surface (41) of the electrical and/or electronic assembly (40), wherein on the top side (11) of the cooling device (10), a laminarly extending coating (20) (a circuit board 108) is arranged on the top side (11) of the cooling device (10), wherein the coating (20) on the top side (11) of the cooling device (10) comprises at least one recess (21) (an opening 112), in which the top side (11) of the cooling device (10) is not coated, wherein the contact surface (41) of the electrical and/or electronic assembly (40) in the recess (21) is in contact with the cooling device (10) and attached to the cooling device (10) (Fig. 1 and paragraphs 15-21). Regarding claim 2, Goel teaches wherein the contact surface (41) of the electrical and/or electronic assembly (40) in the recess (21) of the coating (20) is soldered to the top side (11) of the cooling device (10), wherein the intermediate layer (30) is configured as a solder layer (a die attach material such as a solder, not shown in Fig. 1) (Fig. 1 and paragraph 17). Regarding claim 3, Goel teaches wherein the cooling device (10) is formed from copper (paragraph 15). Regarding claim 5, Goel teaches wherein the recess (21) has a larger surface extent than the contact surface (41) (Fig. 1). Regarding claim 8, Goel teaches a method for manufacturing an electrical and/or electronic assembly, wherein the method comprises the following steps: - providing a cooling device (10) having a top side (11) (a single metal flange 102 having a top side) - coating the top side (11) of the cooling device (10) with a coating (20) (a circuit board 108), wherein the coating (20) is carried out while leaving a recess (21) (an opening 112) on the top side (11) of the cooling device (10), wherein the top side (11) of the cooling device (10) is not coated in the recess (21), - providing an electrical and/or electronic assembly (40) having a contact surface (41) (a semiconductor die 120 having a bottom surface), - arranging and attaching the contact surface (41) of the electrical and/or electronic assembly (40) in the recess (21) on the top side (11) of the cooling device (10) by means of an intermediate layer (30) (a die attach material, not shown in Fig. 1) (Fig. 1 and paragraphs 15-21). Claims 1, 3, and 5-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Viswanathan et al. (US 2018/0153030 A1; hereinafter “Viswanathan”). Regarding claim 1, Viswanathan teaches an electrical and/or electronic device (1) comprising: at least one cooling device (10) having a top side (11) (a heat dissipation structure 14 having a top side), an electrical and/or electronic assembly (40) (a microelectronic device 28) arranged on the top (11) of the cooling device (10) having a contact surface (41) (a bottom surface of 28), wherein the contact surface (41) faces the top side (11) of the cooling device (10) and is attached to the top side (11) of the cooling device (10) by means of an intermediate layer (30) (a device bond layer 38) arranged between the cooling device (10) and the contact surface (41) of the electrical and/or electronic assembly (40), wherein on the top side (11) of the cooling device (10), a laminarly extending coating (20) (a heat dissipation structure 16) is arranged on the top side (11) of the cooling device (10), wherein the coating (20) on the top side (11) of the cooling device (10) comprises at least one recess (21) (a central opening 22), in which the top side (11) of the cooling device (10) is not coated, wherein the contact surface (41) of the electrical and/or electronic assembly (40) in the recess (21) is in contact with the cooling device (10) and attached to the cooling device (10) (Figs. 1-2 and paragraphs 13-19). Regarding claim 3, Viswanathan teaches wherein the cooling device (10) is formed from copper (paragraph 17). Regarding claim 5, Viswanathan teaches wherein the recess (21) has a larger surface extent than the contact surface (41) (Figs. 1-2). Regarding claim 6, Viswanathan teaches wherein the contact surface (41) is arranged entirely within the recess (21) of the coating (20) on the top side (11) of the cooling device (10) (Figs. 1-2). Regarding claim 7, Viswanathan teaches wherein the intermediate layer (30) is arranged entirely within the recess (21) of the coating (20) on the top side (11) of the cooling device (10) (Figs. 1-2). Regarding claim 8, Viswanathan teaches a method for manufacturing an electrical and/or electronic assembly, wherein the method comprises the following steps: - providing a cooling device (10) having a top side (11) (a heat dissipation structure 14 having a top side) - coating the top side (11) of the cooling device (10) with a coating (20) (a heat dissipation structure 16), wherein the coating (20) is carried out while leaving a recess (21) (a central opening 22) on the top side (11) of the cooling device (10), wherein the top side (11) of the cooling device (10) is not coated in the recess (21), - providing an electrical and/or electronic assembly (40) having a contact surface (41) (a microelectronic device 28 having a bottom surface), - arranging and attaching the contact surface (41) of the electrical and/or electronic assembly (40) in the recess (21) on the top side (11) of the cooling device (10) by means of an intermediate layer (30) (a device bond layer 38) (Figs. 1-2 and paragraphs 13-19). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 4 and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Viswanathan. Regarding claim 4, Viswanathan does not explicitly teach that the coating is formed from nickel. However, with Viswanathan teaching the coating (the heat dissipation structure 16) formed of a metal having a high thermal conductivity (paragraph 17) and the high thermal conductivity metal materials such as aluminum, copper, or nickel is listed for the heatsink 18 (paragraph 16), it would have been obvious to one of ordinary skill in the art to utilize one of readily available high thermal conductivity material such as nickel for the material of the coating in order to obtain the desired high thermal conductivity characteristics. Regarding claims 9-10, Viswanathan does not explicitly teach a step of masking the top side of the cooling device by masking prior to coating the top side of the cooling device with the coating. Nevertheless, it would have been obvious to one of ordinary skill in the art to provide a masking pattern only in a region where the recess is to be formed with either soft or hard masking material on the top side of the cooling device prior to coating step in order to effectively provide the recess formed in the coating exposing the top side of the cooling device after completing the coating step and performing the removing step of the masking pattern as one of well-known patterning processes known in the art. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL B WHALEN whose telephone number is (571)270-3418. The examiner can normally be reached on M-F: 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DANIEL WHALEN/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Dec 01, 2023
Application Filed
Feb 05, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
96%
With Interview (+16.0%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 993 resolved cases by this examiner. Grant probability derived from career allow rate.

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