Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the following communication: Amendment filed Jul. 6, 2026. This Action is made Final.
Claims 1, 3-14 and 16-22 are pending in the case. Claims 1, 14 and 18 are independent claims.
Response to Arguments
Applicant’s arguments have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Objections
Claims 21 and 22 are objected for their dependency from rejected independent claim 18. Claims 21 and 22 would be allowable if written in independent form.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-14 and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Gambetta et al. (hereinafter Gambetta) U.S. Patent Publication No. 2020/0342344 in view of Fan et al. (hereinafter Fan) “Optimizing Quantum Circuit Placement via Machine Learning” July 2022.
With respect to independent claim 1, Gambetta teaches a system comprising: a memory (see e.g., Para [118][119]) that stores computer executable components; a processor that executes at least one of the computer executable components that receives an input quantum circuit representation and one or more quantum circuit constraints (see e.g., Para [12][36][52][95][105] and Claim 20 – “An embodiment identifies, using a pattern recognition technique, a portion of the first quantum circuit that can be transformed using a first transformation operation to satisfy a constraint on the quantum circuit design. ““produce a configuration of a first quantum circuit from the classical computing system””Quantum circuit 510 is an example input circuit that can be transformed using application 314. “); and generates a transpiled quantum circuit representation based on the one or more quantum circuit constraints and the input quantum circuit representation (see e.g., Para [12][40][52][95] and claim 1 –“ An embodiment transforms, to a second quantum circuit according to the first transformation operation, the portion, wherein the first transformation operation comprises reconfiguring a gate in the first quantum circuit such that a qubit used in the gate complies with the constraint on the quantum circuit design while participating in the second quantum circuit. An embodiment executes, using the quantum computing system, the second quantum circuit.” “an embodiment uses any suitable pattern recognition technique to match, within a tolerance value, a portion of the quantum circuit with an input circuit pattern of a transformation operation in the library.””Quantum circuit transpiler 314 transpiles the quantum circuit into a different but equivalent quantum circuit.”), wherein the generating the transpiled quantum circuit representation comprises:selecting one or more gate options from a plurality of gate options (see e.g., Fig. 4 and Para [101] – “Circuit transformer 440 performs a transformation operation on a quantum circuit to reconfigure the circuit into a different, but equivalent, quantum circuit. Application 314 can generate the transformation operation to be performed, or select the transformation operation from a transformation operation library.”);
Gambetta does not expressly show the features discussed below. However, Fan teaches assigning a penalty term to the selected one or more gate options based on the one or more quantum circuit constraints (see e.g., Page 22 Section 3.2.2 – “gate reward, which equals to the number of quantum gates executed given the current action, the updated state and hardware constraints, ii)done reward, which is applied when all the quantum gates have been executed, iii)SWAP penalty when a SWAP gate is inserted, an div)non-execution penalty when there are no executable gates after the SWAP gate is inserted.”); and selecting one or more additional gate options from the plurality of gate options based on the penalty term (see e.g., Page 22 Section 3.2.2-3.2.4 and Algorithm 1 – after ab SWAP insertion, the simulator updates the state and returns reward/penalty. The policy network selects the next action from the updated state). Both Gambetta and Fan are directed to quantum circuit optimization methods. Accordingly, it would have been obvious to the skilled artisan before the effective filing date of the claimed invention having Gambetta and Fan in front of them to modify the system of Gambetta to include the above feature. The motivation to combine Gambetta and Fan comes from Fan. Fan discloses the motivation to provide sequential gate transformation options so that circuit placement can be improved (Page 19 and 22 Abstract and Section 3.2.2-3.2.4). This motivation for combination also applies to the remaining claims which depend on this combination.
With respect to dependent claim 3, the modified Gambetta the plurality of gate options comprise a SWAP option to add a SWAP layer to the transpiled quantum circuit representation during generation of the transpiled quantum circuit representation (see e.g., Para[10] [46] - “the three CNOT gates comprising a SWAP gate are arranged in series, giving a depth of 3.”” a SWAP gate can be deconstructed into a particular configuration of three CNOT gates. Thus, a SWAP gate is an input circuit pattern for a CNOT-deconstruction operation. Conversely, three CNOT gates, arranged in an appropriate configuration, are an input pattern for a transformation operation that replaces the three CNOT gates with one SWAP gate.” Also see Fan Section 3.2.2. – “SWAP penalty when a SWAP gate is inserted , and iv)non-execution penalty when there are no executable gates after the SWAP gate is inserted.”).
With respect to dependent claim 4, the modified Gambetta teaches selection the one or more additional gate options is further based on gates of the input quantum circuit representation remaining to be transpiled (see e.g., Para [52][64][65] – “An embodiment attempts to improve the quantum circuit, as measured by the efficiency score, by performing a transformation operation on the circuit. In particular, an embodiment identifies a portion of the quantum circuit that can be transformed using a transformation operation to satisfy a constraint on the quantum circuit design. “ “An embodiment continues in this fashion, performing and evaluating transformation operations, until an end criterion is reached. In one embodiment, an end criterion is an efficiency score above a particular threshold. For example, an initial constraint on the transpilation process may have been to reduce the depth of the quantum circuit to a specified depth. Once the depth is at or below the specified depth, the circuit has been sufficiently transformed and transformation can end.” Additional gates are selected based on gates remaining to be transpiled.” Also see Fan Section 3.2.1 and 3.2.4 – “QCP simulator as the environment to interact with our DRL agent. Based on the current action and state matrix, the QCP simulator outputs the accumulated reward and the next state matrix.”).
With respect to dependent claim 5, the modified Gambetta teaches the transpiled quantum circuit representation is generated further based on a defined preference and a target quantum computer (see e.g., Para [29][43] - “Each quantum processor, although having the same hardware configuration (e.g. having the same number of qubits), can have varying properties.” “A transformation operation can also be used to adapt a generic quantum circuit to a particular quantum processor configuration, or a particular calibration of that processor configuration. For example, a particular quantum processor might have a restriction on which qubits are coupled together, and hence able to communicate, with which other qubits. To adapt a circuit to this quantum processor, a transformation operation redistributes gates into different portions of a quantum circuit.”).
With respect to dependent claim 6, the modified Gambetta teaches the defined preference comprises one or more performance characteristics of the target quantum computer, wherein the one or more performance characteristics are selected from a group consisting of: performance gates of the target quantum computer (see e.g., Para [6] - “Quantum gates are the elementary building blocks for quantum computation, acting on qubits the way classical logic gates act on bits, one and two at a time, to change qubit states in a controllable way. An X gate inverts the state of a single qubit, much like a NOT gate inverts the state of a single bit in classical computing. An H gate, or Hadamard gate, puts a single qubit into a state of superposition, a combination of the 0 and 1 quantum states.”), a coupling map of qubits of the target quantum computer (see e.g., Para [43] - “a particular quantum processor might have a restriction on which qubits are coupled together, and hence able to communicate, with which other qubits. To adapt a circuit to this quantum processor, a transformation operation redistributes gates into different portions of a quantum circuit.”), a gate canceling optimization of the target quantum computer (see e.g., Para [41] - “one example transformation operation rearranges target and control inputs of gates, according to specific transformation rules, to remove redundant gates from a circuit.”), and a gate merging optimization of the target quantum computer (see e.g., Para [42] - “for ease of implementation and hardware efficiency, to implement a particular gate as a circuit of other, simpler or different, gates. For example, any 2-qubit gate can be decomposed into at most 3 CNOT gates. Thus, another example transformation operation decomposes a 2-qubit gate into CNOT gates.”).
With respect to dependent claim 7, the modified Gambetta teaches wherein the one or more quantum circuit constraints comprise descriptive characteristics of the target quantum computer, wherein the descriptive characteristics of the target quantum computer are selected from a group consisting of: a number of qubits comprised in the target quantum computer (see e.g., Para [29] - “Each quantum processor, although having the same hardware configuration (e.g. having the same number of qubits), can have varying properties.”), basis gates of the target quantum computer (see e.g., Para [6][42] –“Quantum gates are the elementary building blocks for quantum computation, acting on qubits the way classical logic gates act on bits, one and two at a time, to change qubit states in a controllable way. An X gate inverts the state of a single qubit, much like a NOT gate inverts the state of a single bit in classical computing. An H gate, or Hadamard gate, puts a single qubit into a state of superposition, a combination of the 0 and 1 quantum states. ““any 2-qubit gate can be decomposed into at most 3 CNOT gates”), a time step parameter for gate operations of the target quantum computer (see e.g., Para [10] - “Programs with a shallower depth take less execution time and provide better performance, so are preferred.”), measurement levels the target quantum computer (see e.g., Para [56] - “’), and a measurement map of qubits of the target quantum computer (see e.g., Para [96] ).
With respect to dependent claim 8, the modified Gambetta teaches the defined preference comprises one or more characteristics of a configuration of the target quantum computer, wherein the one or more characteristics of the configuration of the target quantum computer are selected from a group consisting of: an estimated resonance frequency of qubits of the target quantum computer (see e.g., Para [29][48] - “A quantum processor can have varying properties, …how long a qubit can remain in a superimposed state before decaying to a particular quantum state, the frequency of a particular qubit, gate error”), an estimated frequency of state measurement pulses of the target quantum computer (see e.g., Para [29][48]), a buffer time required between successive operations on the target quantum computer (see e.g., Para [48] - “such as how long a qubit can remain in a particular quantum state before decaying to another quantum state”), a pulse library of the target quantum computer (see e.g., Para [48] - “An embodiment also maintains, for each operation in the operation library, processor configuration dependency information for the operation. ”), a set of available quantum operations of the target quantum computer (see e.g., Para [48] - “An embodiment also maintains, for each operation in the operation library, processor configuration dependency information for the operation. ”), an algorithm that processes qubit measurements to produce usable data from the target quantum computer (see e.g., Para [58] - “An embodiment determines the correctness of the transformed quantum circuit by comparing outputs obtained by executing the transformed quantum circuit with outputs obtained by executing the original quantum circuit. ”), a discriminator of the target quantum computer (see e.g., Para [58] - “An embodiment determines the correctness of the transformed quantum circuit by comparing outputs obtained by executing the transformed quantum circuit with outputs obtained by executing the original quantum circuit. ”), and a data structure that stores results of quantum operations of the target quantum computer (see e.g., Para [78] - “Application 105 stores an operation library, circuits, and metadata in storage 108, or in any other suitable storage.”).
With respect to dependent claim 9, the modified Gambetta teaches generating a plurality of candidate quantum circuit representations based on the input quantum circuit representation (see e.g., Para [54] - “If no pattern matches a portion of the quantum circuit, an embodiment generates a transformation operation. An embodiment can also be configured to generate a transformation operation even if a pattern matches a portion of the quantum circuit.”); and selecting the transpiled quantum circuit representation from the plurality of candidate quantum circuit representations based on the defined preference (see e.g., Para [53] [62] - “Another embodiment selects the transformation that produced the most improved efficiency score when used to transform a previous quantum circuit. Another embodiment selects the transformation operation corresponding to the input circuit pattern that best matches the portion. “” if the new transformation operation both retains circuit correctness and improves an efficiency score of the circuit more than the stored transformation operation, an embodiment replaces the stored transformation operation with the new transformation operation.”).
With respect to dependent claim 10, the modified Gambetta teaches the defined preference is selected from a group consisting of: a controlled not (CNOT) gates (see e.g., Para [28] - “CNOT gates is known to be equivalent to another particular configuration of two CNOT gates.”), a number of circuit layers with CNOT gates, length of the quantum circuit (see e.g., Para [10] - “The length of the longest series in the program is also referred to as the depth of the quantum circuit. For example, the three CNOT gates comprising a SWAP gate are arranged in series, giving a depth of 3.”), and estimated total gate noise of the quantum circuit (see e.g., Para [29] - “gate error (i.e. the rate at which a quantum gate or operation gives an incorrect result), and the like, change over time.”).
With respect to dependent claim 11, the modified Gambetta teaches the computer executable components further comprise: a performance component that identifies a performance metric representing a difference between the input quantum circuit representation and the transpiled quantum circuit representation (see e.g., Para [58] [59] - “An embodiment determines the correctness of the transformed quantum circuit by comparing outputs obtained by executing the transformed quantum circuit with outputs obtained by executing the original quantum circuit. If the execution outputs match by more than a threshold amount, the transformed quantum circuit is considered correct. If the transformed circuit is no longer correct, to within a threshold amount, the embodiment discards the transformed quantum circuit … An embodiment measures an execution efficiency of the quantum computing environment's execution of the transformed quantum circuit, using the same measurement methodology as was used for the original quantum circuit.”); and a training component that retrains the machine learning component based on maximizing the performance metric and the transpiled quantum circuit representation (see e.g., Para [63] - “ If an embodiment determines that a transformation operation is to be stored in the library, the embodiment can also be configured to use such a transformation operation to train a model described herein to generate additional transformation operations. An embodiment performs the training using any model training method known in the art.”).
With respect to dependent claim 12, the modified Gambetta teaches the generating employs a reinforcement learning model (see e.g., Para [56] and Fan Section 3.2.3).
With respect to dependent claim 13, the modified Gambetta teaches the input quantum circuit representation comprises a quantum circuit represented as a series of gates (see e.g., Para [9] - “quantum computing gates can be assembled into larger groups, called quantum circuits, to perform more complicated operations.” and Fan Section 2.1 and 3.2.1).
Claim 14 is rejected for the similar reasons discussed above with respect to claim 1. Claim 16 is rejected for the similar reasons discussed above with respect to claim 6. Claim 17 is rejected for the similar reasons discussed above with respect to claim 7.
With respect to dependent claim 18, the modified Gambetta teaches a computer-implemented method comprising: receiving, by a system operatively coupled to a processor, an input quantum circuit representation and one or more quantum circuit constraints (see e.g., Para [12][36][52][95][105] and Claim 20 – “An embodiment identifies, using a pattern recognition technique, a portion of the first quantum circuit that can be transformed using a first transformation operation to satisfy a constraint on the quantum circuit design. ““produce a configuration of a first quantum circuit from the classical computing system” ”Quantum circuit 510 is an example input circuit that can be transformed using application 314. “); and generating, by the system, using a machine learning model (see e.g., Para [56] - “Another embodiment generates a transformation using a model that has been trained to generate transformation operations. In one embodiment, the model uses an artificial recurrent neuronal network (RNN) architecture. A non-limiting example of an RNN is a long short-term memory (LSTM). An LSTM helps preserve the error that can be backpropagated through time and layers. By maintaining a more constant error, an LSTM allows continued learning over many iterations (e.g. over 1000). Another non-limiting example of a suitable model is a Generative Adversarial Networks (GAN). A GAN includes two parts: a generative network to generates candidates (e.g. candidate transformation operations while the discriminative network distinguishes generator-produced candidates from non-generator-produced candidates. Other model implementations are also possible and contemplated within the scope of the illustrative embodiments.”), a transpiled quantum circuit representation based on the one or more quantum circuit constraints and the input quantum circuit representation, wherein the generating the transpiled quantum circuit representation comprises: selecting one or more gate options from a plurality of gate options (see e.g., Fig. 4 and Para [101] – “Circuit transformer 440 performs a transformation operation on a quantum circuit to reconfigure the circuit into a different, but equivalent, quantum circuit. Application 314 can generate the transformation operation to be performed, or select the transformation operation from a transformation operation library.”); assigning a penalty term to the selected one or more gate options based on the one or more quantum circuit constraints (see Discussion above with respect to claim 1 - Fan Page 22 Section 3.2.2 – “gate reward, which equals to the number of quantum gates executed given the current action, the updated state and hardware constraints, ii)done reward, which is applied when all the quantum gates have been executed, iii)SWAP penalty when a SWAP gate is inserted, an div)non-execution penalty when there are no executable gates after the SWAP gate is inserted.”); and selecting one or more additional gate options from the plurality of gate options based on the penalty term (see Discussion above with respect to claim 1 - Fan Page 22 Section 3.2.2-3.2.4 and Algorithm 1 – after ab SWAP insertion, the simulator updates the state and returns reward/penalty. The policy network selects the next action from the updated state).
With respect to dependent claim 19, the modified Gambetta teaches determining, by the system, a performance metric representing a difference between the input quantum circuit representation and the transpiled quantum circuit representation; and retraining, by the system, the machine learning model based on maximizing the performance metric and the transpiled quantum circuit representation (see e.g., Fan section 3.2.2-3.2.4 – model is updated based on reward).
With respect to dependent claim 20, the modified Gambetta teaches the machine learning model comprises a reinforcement learning model (see e.g., Para [56] and Fan Section 3.2.3).
It is noted that any citation to specific pages, columns, lines, or figures in the prior art references and any interpretation of the references should not be considered to be limiting in any way. “The use of patents as references is not limited to what the patentees describe as their own inventions or to the problems with which they are concerned. They are part of the literature of the art, relevant for all they contain.” In re Heck, 699 F.2d 1331, 1332-33, 216 USPQ 1038, 1039 (Fed. Cir. 1983) (quoting In re Lemelson, 397 F.2d 1006, 1009, 158 USPQ 275, 277 (CCPA 1968)). Further, a reference may be relied upon for all that it would have reasonably suggested to one having ordinary skill the art, including nonpreferred embodiments. Merck & Co. v. Biocraft Laboratories, 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989). See also Upsher-Smith Labs. v. Pamlab, LLC, 412 F.3d 1319, 1323, 75 USPQ2d 1213, 1215 (Fed. Cir. 2005); Celeritas Technologies Ltd. v. Rockwell International Corp., 150 F.3d 1354, 1361, 47 USPQ2d 1516, 1522-23 (Fed. Cir. 1998).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PEIYONG WENG whose telephone number is (571)270-1660. The examiner can normally be reached on Mon.-Fri. 8 am to 5 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Matthew Ell, can be reached on (571) 270-3264. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PEI YONG WENG/Primary Examiner, Art Unit 2141
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