DETAILED ACTION
Claims 1 – 21 are currently pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 11/1/2024, 2/4/2025 and 2/16/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings are objected to because Figures 1 – 5 are grainy, pixelated images and the numbers within them cannot be easily read. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 – 3, 6 and 8 – 21 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Zhang et al (US 2023/0205719, hereinafter referred to as Zhang).
As per claim 1:
Zhang discloses modular interconnection system comprising a server fabric adapter (SFA) on a primary circuit board, the SFA configured to perform peripheral component interconnect express (PCIe) interconnection or compute express link (CXL) interconnection (Zhang: Paragraph [0043] and figure 2A, controller 212 equivalent to claimed server fabric adapter); a plurality of ports on one or more PCIe slots configured to connect the SFA to external resources (Zhang: Figure 2A, paragraphs [0043] – [0045]); and a PCIe slot adaptation device configured to adapt a first lane count slot of the one or more PCIe slots to support a second lane count device (Zhang: Paragraph [0043] – [0045], PCIe switch 216 adapts to connect via mux 218 to support network interfaces 206 via PCIe).
As per claim 2:
Zhang discloses the external resources comprise one or more of non- volatile memory express (NVMe) drives, network interface cards (NICs), or graphics processing units (GPUs) (Zhang: Paragraph [0043], and figure 2a, network interfaces 206).
As per claim 3:
Zhang discloses the first lane count is lower than the second lane count, and the PCIe slot adaptation device is further configured to add lanes of bandwidth to meet requirement of the second lane count device (Zhang: Paragraph [0043] – [0045]).
As per claim 6:
Zhang discloses the PCIe slot adaptation device is a PCIe slot adaptor configured to adapt the low first lane count drive slot for use as a second drive type (Zhang: Paragraph [0043] – [0045] and figure 2a).
As per claim 8:
Zhang discloses the PCIe slot adaptor comprises a base board, the base board comprises a daughter board, the base board is configured to plug into a first connector of a slot pair, the daughter board is configured to plug into a second connector of the slot pair, and the base board has access to all lanes associated with both the first and second connectors (Zhang: Paragraph [0043] and [0045], root complex is equivalent to the claimed daughterboard).
As per claim 9:
Zhang discloses the base board is used to perform a PCIe function of being a connector to provide connectivity to a separate physical computer chassis via PCIe, and the separate chassis is connected with all the PCIe lanes associated with both the first and second connectors (Zhang: Paragraph [0043] and figure 2a).
As per claim 10:
Zhang discloses the PCIe slot adaptation device is a multiplexer/demultiplexer (mux/demux), the mux/demux is configured to plug into a first connector of a slot pair as additional lanes or plug into a second connector of the slot pair as an additional port (Zhang: Paragraph [0043], [0045] Mux 218).
As per claim 11:
Zhang discloses a software function is used to control a state of the mux/demux (Zhang: Paragraph [0002], software components used to control systems).
As per claim 12:
Zhang discloses the SFA is further configured to connect to a local host via a mux/demux, wherein the local host resides on a separate circuit board (Zhang: Paragraph [0044]).
As per claim 13:
Zhang discloses a second SFA residing on a second circuit board, the second SFA configured to connect to the local host (Zhang: Paragraph [0042]).
As per claim 14:
Zhang discloses one or more SFAs residing on the primary circuit board, wherein a portion of the plurality of ports associated with each SFA is on the primary circuit board and the rest of the ports associated with the SFA are on a second circuit board (Zhang: Paragraph [0043] – [0045] and figure 2a).
As per claim 15:
Zhang discloses the second circuit board is one of storage based mezzanine cards (Zhang: Paragraph [0037], mezzanine cards).
As per claim 16:
Zhang discloses each of the storage based mezzanine cards include one or more enterprise and datacenter standard form factor (EDSFF) drives and/or one or more CD form factor pluggable (CDFP) module (Zhang: Paragraph [0022], server form factor equivalent to claimed data center standard form factor).
As per claim 17:
Zhang discloses a peripheral component interconnect express (PCIe) slot adaption method comprising inserting a PCIe slot adaptor into a PCIe component bay, the PCIe slot adaptor comprising a base board, and the base board comprising a daughter board; mechanically and electrically coupling the base board to a first connector of a slot pair; mechanically and electrically coupling the base board to a second connector of the slot pair; and connecting a server fabric adapter (SFA) to an external resource using the PCIe slot adaptor that extends lanes of a PCIe slot (Zhang: Paragraph [0043] and [0045] and figure 2a, management controller and PCIe switch 216).
As per claim 18:
Zhang discloses the base board has access to all lanes associated with both the first and second connectors (Zhang: Paragraph [0043] and [0045]).
As per claim 19:
Zhang discloses a peripheral component interconnect express (PCIe) slot adaption method comprising directing one or more PCIe lanes from a PCIe port of a server fabric adapter (SFA) to a multiplexer/demultiplexer (mux/demux); and electrically coupling one or more lanes from the mux/demux to a first connector of a slot pair as additional lanes to connect the SFA to an external resource (Zhang: Paragraph [0043] – [0045] and figure 2a).
As per claim 20:
Zhang discloses electrically coupling one or more lanes from the mux/demux to a second connector of the slot pair as an additional port to connect the SFA to an external resource (Zhang: Paragraph [0043] and [0045]).
As per claim 21:
Zhang discloses a method for connecting a local host to a server fabric adapter (SFA), the method comprising directing one or more peripheral component interconnect express (PCIe) lanes from a PCIe port of a server fabric adapter (SFA) to a multiplexer/demultiplexer (mux/demux); and electrically coupling one or more lanes from the mux/demux to the local host (Zhang: Paragraph [0043] – [0045] and figure 2a).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4-5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang.
As per claim 4:
Zhang discloses a lane count device being a 16 lane device (Zhang: Figure 2a).
Zhang does not specifically disclose a lane count slot being a four lane or eight lane slot, however it would have been obvious to one of ordinary skill in the art at the time of filing that many PCIe devices utilize four and eight lane slots.
As per claim 5:
Zhang discloses that a second lane count device is a NIC (Zhang: Figure 2a) and that there are storage devices within the information handling system (Zhang: Paragraph [0020]).
While Zhang does not specifically disclose that the first lane count slot is a storage specific slot, it would have been obvious to one of ordinary skill in the art at the time of filing to implement a slot for storage, and that storage slots require less bandwidth and could use a smaller land count slot.
As per claim 7:
Zhang does not specifically disclose the first lane count slot is an E3 short (E3.S) slot, and the PCIe slot adaptor is a 2T form factor device. However, these types of slots and form factors are well known within the art regarding PCIe connections and would have been obvious to one of ordinary skill in the art to try any number of different slots and interfaces.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Berke et al (US 8,484,399) teaches using two PCIe slots together to create a double bandwidth link slot. Jacobson et al (US 2015/0324312) generally describes PCIe layouts, including Mux units between controllers and PCIe slots. Purcell et al (US 2007/0038794) discloses connecting a plurality of devices by dividing busses between multiple devices into segments by way of an adapter.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZACHARY K HUSON whose telephone number is (571)270-3430. The examiner can normally be reached Monday - Friday 7:00 - 3:30 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Idriss Alrobaye can be reached at (571) 270-1023. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ZACHARY K HUSON/Primary Examiner, Art Unit 2181