Prosecution Insights
Last updated: April 19, 2026
Application No. 18/527,439

MULTILAYER CERAMIC CAPACITOR

Final Rejection §103
Filed
Dec 04, 2023
Examiner
MCFADDEN, MICHAEL P
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co. Ltd.
OA Round
2 (Final)
86%
Grant Probability
Favorable
3-4
OA Rounds
2y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
701 granted / 815 resolved
+18.0% vs TC avg
Strong +20% interview lift
Without
With
+20.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
25 currently pending
Career history
840
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
54.9%
+14.9% vs TC avg
§102
33.2%
-6.8% vs TC avg
§112
6.7%
-33.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 815 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-7, 10-12, 14, and 16 is /are rejected under 35 U.S.C. 103 as being unpatentable over HIRAO et al (US 2016/0093443) in view of LEE et al (US 2022/0208470). Regarding claim 1, HIRAO discloses a multilayer ceramic capacitor (Fig. 1-12) comprising: a plurality of dielectric layers (Fig. 1, 10g) and a plurality of inner electrode layers (Fig. 1, 11/12) being stacked and each made of a ceramic material (ceramic materials are at the openings [0050]); wherein each of the plurality of inner electrode layers includes a plurality of through holes (Fig. 3-4, 21-22); and that the plurality of through holes appear to be round (Fig. 3-4, the holes are circles). However, HIRAO fails to fully teach that an average circularity of the plurality of through holes is equal to or greater than about 0.6; and a circularity of each of the plurality of through holes is defined by the following formula: circularity = {4 x π x (area)}/{(peripheral length)2}. LEE teaches that an average circularity of the plurality of through holes is equal to or greater than about 0.6; and a circularity of each of the plurality of through holes is defined by the following formula: circularity = {4 x π x (area)}/{(peripheral length)2} (Fig. 3, 123b; the holes in the internal electrode are a circular shape [0062] circularity of 0.6-0.8 is considered an oval like shape and above 0.8 is considered a circular shape and therefore these circular shapes would be considered to have a circularity above 0.8 which teaches the claim limitations). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of LEE to the invention of HIRAO, in order to keep the breakdown voltage from decreasing as holes with a lower circularity may cause breakdown voltage to decrease (LEE [0062]). Regarding claim 2, HIRAO, in view of LEE, further teaches that, in the plurality of through holes, a percentage of through holes with circularity equal to or greater than about 0.6 is equal to or greater than about 60% (all are circles Fig. 3-4). Regarding claim 3, HIRAO, in view of LEE, further teaches that, in the plurality of through holes, a percentage of through holes with circularity equal to or greater than about 0.6 is equal to or greater than about 70% (all are circles Fig. 3-4). Regarding claim 4, HIRAO, in view of LEE, further teaches that the plurality of dielectric layer and the plurality of inner electrode layer define a multilayer body (Fig. 1); the multilayer body includes an inner layer portion (Fig. 1, from top 11 to bottom 12) and first and second outer layer portions (Fig. 1, above top 11, below bottom 12) respectively provided on opposite sides of the inner layer portion (Fig. 1); and each of the first and second outer layer portions includes a portion of the plurality of dielectric layers (Fig. 1). Regarding claim 5, HIRAO, in view of LEE, further teaches that each of the first and second outer layer portions defines and functions as a protective layer of the inner layer portion (Fig. 1). Regarding claim 6, HIRAO, in view of LEE, further teaches that each of the plurality of dielectric layers includes BaTiO3 ([0039]), CaTiO3, SrTiO3, or CaZrO3 as a primary component. Regarding claim 7, HIRAO, in view of LEE, further teaches that each of the plurality of dielectric layers includes a Mn chemical compound ([0039]), a Fe chemical compound, a Cr chemical compound, a Co chemical compound, a Ni chemical compound as a secondary component . Regarding claim 10, HIRAO, in view of LEE, further teaches that a number of the plurality of dielectric layers is equal to or greater than 15 and less than or equal to 700 (Fig. 2, 15 layers). Regarding claim 11, HIRAO, in view of LEE, further teaches that each of the plurality of inner electrode layers includes Ni as a primary component ([0047]). Regarding claim 12, HIRAO, in view of LEE, further teaches that each of the plurality of inner electrode layers includes at least one of Cu, Ag, Pd, or Au, or alloys including a Ag-Pd alloy ([0047]). Regarding claim 14, HIRAO, in view of LEE, further teaches that a thickness of each of the plurality of inner electrode layers is equal to or greater than about 0.2 µm and less than or equal to about 2.0 µm ([0048]). Regarding claim 16, HIRAO, in view of LEE, further teaches that the multilayer body has a dimension a length direction equal to or greater than about 0.1 mm and less than or equal to about 32 mm ([0038]), a dimension in a width direction equal to or greater than about 0.05 mm and less than or equal to about 25 mm ([0038]), and a dimension in a stacking direction equal to or greater than about 0.05 mm and less than or equal to about 32 mm ([0038]). Claim(s) 8-9, 13, and 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over HIRAO et al (US 2016/0093443) in view of LEE et al (US 2022/0208470) in further view of CHA et al (US 2020/0066454). Regarding claim 8, HIRAO fails to teach the claim limitations. CHA teaches that a thickness of each of the plurality of dielectric layers is about 0.2 µm and less than or equal to about 1.0 µm ([0031]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of CHA to the invention of HIRAO, in order to increase the reliability of the capacitor (CHA [0011]). Regarding claim 9, HIRAO fails to teach the claim limitations. CHA teaches that a thickness of each of the plurality of dielectric layers is about 0.3 µm and less than or equal to about 0.5 µm ([0031]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of CHA to the invention of HIRAO, in order to increase the reliability of the capacitor (CHA [0011]). Regarding claim 13, HIRAO fails to teach the claim limitations. CHA teaches that Sn is mixed as a solid in a portion of each of the plurality of inner electrode layers ([0033]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of CHA to the invention of HIRAO, in order to increase the reliability of the capacitor (CHA [0011]). Regarding claim 17, HIRAO fails to teach the claim limitations. CHA teaches that the multilayer body has a dimension a length direction equal to or greater than about 0.1 mm and less than or equal to about 1.2 mm ([0067]), a dimension in a width direction equal to or greater than about 0.1 mm and less than or equal to about 0.7 mm ([0067]), and a dimension in a stacking direction equal to or greater than about 0.1 mm and less than or equal to about 0.7 mm ([0067]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of CHA to the invention of HIRAO, in order to increase the reliability of the capacitor (CHA [0011]). Regarding claim 18, HIRAO fails to teach the claim limitations. CHA teaches that the multilayer body has a dimension a length direction equal to or greater than about 0.2 mm and less than or equal to about 0.5 mm ([0067]), a dimension in a width direction equal to or greater than about 0.1 mm and less than or equal to about 0.3 mm ([0067]), and a dimension in a stacking direction equal to or greater than about 0.1 mm and less than or equal to about 0.3 mm ([0067]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of CHA to the invention of HIRAO, in order to increase the reliability of the capacitor (CHA [0011]). Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over HIRAO et al (US 2016/0093443) in view of LEE et al (US 2022/0208470) in further view of PARK et al (US 2014/0104748). Regarding claim 8, HIRAO fails to teach the claim limitations. PARK teaches that a number of the plurality of inner electrode layers is equal to or greater than 15 and less than or equal to 700 ([0073]). It would have been obvious to one having ordinary skill in the art at the effective filing date of the invention to combine the teachings of PARK to the invention of HIRAO, in order to construct the devices using known specifications and number of layers in the art to meet user needs based on known design possibilities. Additional Relevant Prior Art: KAWAKAMI et al (US 2017/0125167) teaches that a ceramic material can be included in the internal electrode ([0066-0068]. Gustafson (US 2019/0214195) teaches relevant art in Fig. 1-13. SAKURAI et al (US 2020/0135400) teaches relevant art in Fig. 3. Hofstatter et al (US 2021/0210257) teaches relevant art in Fig. 4. Response to Arguments Applicant’s arguments with respect to claim(s) 1-18 have been considered but are moot because the new ground of rejection does not rely on only the reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL P MCFADDEN whose telephone number is (571)270-5649. The examiner can normally be reached M-Thur 8am-9pm PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHAEL P MCFADDEN/ Primary Examiner, Art Unit 2848
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Prosecution Timeline

Dec 04, 2023
Application Filed
Aug 27, 2025
Non-Final Rejection — §103
Nov 24, 2025
Response Filed
Jan 29, 2026
Final Rejection — §103
Mar 14, 2026
Interview Requested
Mar 20, 2026
Applicant Interview (Telephonic)
Mar 20, 2026
Examiner Interview Summary

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12592346
MONOLITHIC MULTILAYERED CERAMIC CAPACITOR
2y 5m to grant Granted Mar 31, 2026
Patent 12590195
POLYPROPYLENE FILM, POLYPROPYLENE FILM INTEGRATED WITH METAL LAYER, AND FILM CAPACITOR
2y 5m to grant Granted Mar 31, 2026
Patent 12592339
MULTILAYER CERAMIC CAPACITOR
2y 5m to grant Granted Mar 31, 2026
Patent 12586727
MULTILAYERED CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12586718
MULTILAYER CERAMIC ELECTRONIC COMPONENT
2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+20.4%)
2y 4m
Median Time to Grant
Moderate
PTA Risk
Based on 815 resolved cases by this examiner. Grant probability derived from career allow rate.

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