Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 12/04/2023 is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG.
Regarding claim 1, HASUMI teaches a scanning electron microscope (SEM) image distortion correction method comprising (Fig. 1 and Fig. 2. Paragraph [0029]-HASUMI discloses Fig. 2. is a flowchart showing a circular pattern distortion measurement process.):
obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure (Fig. 3. [0029]-HASUMI discloses a configuration example of a semiconductor pattern evaluating apparatus according to the present embodiment will be described with reference to FIG. 1. A length measurement scanning electron microscope (SEM) 101 of the semiconductor pattern evaluating apparatus according to the present embodiment includes an irradiation optical system 103 that controls an electron beam 102, and a detection system that detects a secondary electron 104 emitted from a sample. The microscope includes a stage 105 that transports a measurement wafer 100 which is the sample and a load-lock chamber 106.), the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region (Fig. 3, illustrates an SEM image with a central hole surrounded by a plurality of peripheral holes. Paragraph [0036]-HASUMI discloses in FIG. 3, a center is used as the reference pattern 302. Subsequently, in distance-between-reference-pattern-and-surrounding-pattern measurement 203, distances between the reference pattern 302 and the surrounding patterns 303 are measured. In distance classification 204, distances 304 and distances 305 are respectively grouped (classified) as Group 1 and Group 2 (wherein the surrounding patterns consist of peripheral holes.).);
Although, HASUMI teaches each of the plurality of peripheral holes in a minor axis direction a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1 (Fig. 6. Paragraph [0038]-HASUMI discloses roundness may be acquired based on a disjunction between the division result of Group 1 and Group 2 and an ideal value of the division result of Group 1 and Group 2 acquired from previously stored design data (a ratio or a difference between both the result and the ideal value), and the roundness may be used as an index value. In this case, it can be said that in a case where a matching degree to the ideal value is high (the difference between both the result and the ideal value is 0 or the ratio is 1), the roundness is the highest.),
HASUMI fails to explicitly teach expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1; expanding each of the plurality of peripheral holes in multiple directions in the at least one SEM image such that a diameter of the at least one central hole and a diameter of at least one of the plurality of peripheral holes are substantially equal to each other.
However, YANG explicitly However, YANG explicitly teaches expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1; (Fig. 3B-3C. Paragraph [0029]-YANG discloses referring to FIG. 3C, a wafer 330 may be patterned by using a first improper photomask to form a first improper pattern 331 including a plurality of first expanded contacts 3310 when the first improper photomask includes a plurality of expanded circular holes. In at least one implementation, the first expanded contacts 3310 may be in contact with each other.)
expanding each of the plurality of peripheral holes in multiple directions in the at least one SEM image such that a diameter of the at least one central hole and a diameter of at least one of the plurality of peripheral holes are substantially equal to each other (Fig. 2A-2B and 3B-3C, illustrate holes with substantially equal diameters. Paragraph [0025]-YANG discloses the first mask pattern is adjusted to expand the hole sizes of the mask holes along a horizontal direction and to rotate the mask holes for conceiving a second mask pattern of the photomask. Further in Paragraph [0027]-YANG discloses the rotated holes 3110 may be a plurality of elliptical holes, and each of the rotated holes 3110 may have an original length 3111 and an expanded length 3112.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of YANG of expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1; expanding each of the plurality of peripheral holes in multiple directions in the at least one SEM image such that a diameter of the at least one central hole and a diameter of at least one of the plurality of peripheral holes are substantially equal to each other.
Wherein having HASUMI’s system for SEM image distortion correction expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1; expanding each of the plurality of peripheral holes in multiple directions in the at least one SEM image such that a diameter of the at least one central hole and a diameter of at least one of the plurality of peripheral holes are substantially equal to each other.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and YANG relate to imaging wafer patterns with an SEM, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while YANG the overlay between two adjacent patterns needs to be precisely controlled to reduce the overlay errors. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and YANG et al. (US 20200218144 A1), Paragraph [0004].
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of LEE et al. (US 11830176 B2), herein after referenced as LEE.
Regarding claim 2, HASUMI in view of YANG explicitly teaches the method of claim 1,
HASUMI further teaches wherein the obtaining of the at least one SEM image comprises (Fig. 3. [0029]-HASUMI discloses a configuration example of a semiconductor pattern evaluating apparatus according to the present embodiment will be described with reference to FIG. 1. A length measurement scanning electron microscope (SEM) 101 of the semiconductor pattern evaluating apparatus according to the present embodiment includes an irradiation optical system 103 that controls an electron beam 102, and a detection system that detects a secondary electron 104 emitted from a sample. The microscope includes a stage 105 that transports a measurement wafer 100 which is the sample and a load-lock chamber 106.):
----HASUMI in view of YANG is silent on obtaining a plurality of SEM images, and synthesizing the plurality of SEM images to obtain a representative SEM image.
However, LEE explicitly teaches obtaining a plurality of SEM images (Fig. 3. Col. 3. Lines [32-34]- LEE discloses obtained SEM images are analyzed for further purposes including, for example, yield improvement.), and
synthesizing the plurality of SEM images to obtain a representative SEM image (Fig. 3. Col. 4. Lines [8-12]-LEE discloses in operation 240, the image 330 as a mixed image is generated based on the images 310 and 320 according to identifying structures in the image 330. In some embodiments, the images 310 and 320 are combined after being adjusted. Further in Col. 4. Lines [29-32]-LEE discloses after the images 310 and 320 are modified, the generating the image 330 includes operations of merging the image 310 with the image 320 or adding the image 310 to the image 320.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of ----HASUMI in view of YANG of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region, wherein the obtaining of the at least one SEM image comprises: with the teachings of LEE of obtaining a plurality of SEM images, and synthesizing the plurality of SEM images to obtain a representative SEM image.
Wherein having HASUMI’s system for SEM image distortion correction obtaining a plurality of SEM images, and synthesizing the plurality of SEM images to obtain a representative SEM image.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and LEE relate to imaging wafer patterns with an SEM, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and LEE et al. (US 11830176 B2), Col. 1. Lines [8-15].
Regarding claim 3, HASUMI in view of YANG and further in view of LEE explicitly teaches the method of claim 2,
HASUMI fails to explicitly teach wherein the expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding of each of the plurality of peripheral holes in the multiple directions are performed for each of the plurality of SEM images based on the representative SEM image.
However, YANG explicitly teaches wherein the expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding of each of the plurality of peripheral holes in the multiple directions are performed for each of the plurality of SEM images based on the representative SEM image (Fig. 2A-2B and 3B-3C, illustrate holes with substantially equal diameters. Paragraph [0025]-YANG discloses the first mask pattern is adjusted to expand the hole sizes of the mask holes along a horizontal direction and to rotate the mask holes for conceiving a second mask pattern of the photomask. Further in Paragraph [0027]-YANG discloses the rotated holes 3110 may be a plurality of elliptical holes, and each of the rotated holes 3110 may have an original length 3111 and an expanded length 3112. Therefore, it would have been obvious to one of ordinary skill of the art at the time the invention was made to perform expansion for each of the plurality of SEM images based on the representative SEM image since YANG clearly discloses expanding the peripheral holes in the photomask. Thus, in order to have a more efficient image distortion correction system.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region, with the teachings of YANG of wherein the expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding of each of the plurality of peripheral holes in the multiple directions are performed for each of the plurality of SEM images based on the representative SEM image.
Wherein having HASUMI’s system for SEM image distortion correction wherein the expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding of each of the plurality of peripheral holes in the multiple directions are performed for each of the plurality of SEM images based on the representative SEM image.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and YANG relate to imaging wafer patterns with an SEM, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while YANG the overlay between two adjacent patterns needs to be precisely controlled to reduce the overlay errors. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and YANG et al. (US 20200218144 A1), Paragraph [0004].
Claims 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of LEE et al. (US 11830176 B2), herein after referenced as LEE, and further in view of PATHANGI et al. (US 20200161081 A1), herein after referenced as PATHANGI.
Regarding claim 4, HASUMI in view of YANG explicitly teaches the method of claim 1,
HASUMI further teaches wherein the central region is defined as a rectangle (Fig. 3-5 and 8, illustrate a central region defined by a rectangle. Paragraph [0036]-HASUMI discloses in FIG. 3, a center is used as the reference pattern 302.).
wherein the plurality of central holes are in the rectangle (Fig. 3-5 and 8, illustrate a central region defined by a rectangle with a plurality of central holes. Paragraph [0036]-HASUMI discloses in FIG. 3, a center is used as the reference pattern 302. Please see annotated Fig. 3 below.)., and
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Annotated diagram of HASUMI’s Fig. 3 illustrating central holes in a rectangle.
HASUMI fails to explicitly teach wherein the at least one central hole comprises a plurality of central hole.
However, LEE explicitly teaches wherein the at least one central hole comprises a plurality of central holes (Fig. 5, illustrates central holes with additional holes located in the central hole. Col. 5. Lines [20-28]-LEE discloses a center CP1 is identified as the position of the contact hole 121 at a first position P1 with respect to the center CF of the contact hole 111 which overlaps the three contact holes 121 in the region 140. A center CP2 is identified as the position of the contact hole 121 at a second position P2 with respect to the center CF of the contact hole 111. A center CP3 is identified as the position of the contact hole 121 at a third position P3 with respect to the center CF of the contact hole 111.)
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region, wherein the central region is defined as a rectangle, wherein the at least one central hole comprises a plurality of central hole with the teachings of LEE of wherein the at least one central hole comprises a plurality of central holes.
Wherein having HASUMI’s system for SEM image distortion correction wherein the at least one central hole comprises a plurality of central holes.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and LEE relate to imaging wafer patterns with an SEM, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and LEE et al. (US 11830176 B2), Col. 1. Lines [8-15].
HASUMI in view of YANG and further in view of LEE fail to explicitly teach wherein a diameter of the plurality of central holes is calculated by averaging diameters of the plurality of central holes in the rectangle.
However, PATHANGI explicitly discloses wherein a diameter of the plurality of central holes is calculated by averaging diameters of the plurality of central holes in the rectangle (Paragraph [0067]-PATHANGI discloses In an SEM images of the three dies in the thick black border in the heat map of FIG. 4 (mean diameters of 16.7, 17.2, and 17.2), all the individual contact holes that are smaller than 10% of the mean critical dimension of the 100 contact holes from the corresponding image were used to train the deep learning model to be identified as defective. Further in Paragraph [0068]-PATHANGI discloses the top left image in FIGS. 5-8 shows a percent deviation of diameter for individual contact hole from the average diameter of the 1×1 μm SEM field of view.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG and further in view of LEE of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region, wherein the central region is defined as a rectangle, wherein the at least one central hole comprises a plurality of central holes, 25 wherein the plurality of central holes are in the rectangle, and with the teachings of PATHANGI of wherein a diameter of the plurality of central holes is calculated by averaging diameters of the plurality of central holes in the rectangle.
Wherein having HASUMI’s system for SEM image distortion correction wherein a diameter of the plurality of central holes is calculated by averaging diameters of the plurality of central holes in the rectangle.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and PATHANGI relate to imaging semiconductor devices, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while PATHANGI improved techniques and systems for defect detection and classification are needed. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and PATHANGI et al. (US 20200161081 A1), Paragraph [0010].
Regarding claim 5, HASUMI in view of YANG and further in view of LEE and further in view of PATHANGIA explicitly teach the method of claim 4,
HASUMI further teaches wherein the holes on the wafer are arranged in the two-dimensional array structure in a first direction and a second direction perpendicular to the first direction (Fig. 3-5, illustrates a wafer with an array structure in which two directions are perpendicular to each other. Paragraph [0013]-HASUMI discloses FIG. 4 is a diagram showing an example in which distances between a reference pattern and surrounding patterns adjacent to the reference pattern in up, down, left and right directions are measured. Please see annotated fig. 4 below).
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Annotated diagram of HASMU’s Fig. 3 illustrating the directions of the hole arrangement.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of KOOIMAN (US 20200173940 A1), herein after referenced as KOOIMAN.
Regarding claim 6, HASUMI in view of YANG explicitly teaches the method of claim 1, HASUMI in view of YANG fail to explicitly teach further comprising correcting positions of the plurality of peripheral holes.
However, KOOIMAN explicitly teaches further comprising correcting positions of the plurality of peripheral holes (Fig. 3. Paragraph [0051]-KOOIMAN discloses to determine the difference between SEM images and target patterns, in certain embodiments, the disclosed processes may include or begin with performing an image alignment between the SEM image and the target pattern. This alignment can include, for example, performing any combination of translations in X and Y (or Z for 3D images), symmetric and asymmetric rotations, and symmetric and asymmetric magnification. Such a procedure can be referred to as a six-parameter linear distortion correction and can be performed either on the SEM image or the target pattern.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of KOOIMAN of further comprising correcting positions of the plurality of peripheral holes.
Wherein having HASUMI’s system for SEM image distortion correction further comprising correcting positions of the plurality of peripheral holes.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and KOOIMAN relate to imaging wafer patterns with an SEM, HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while KOOIMAN to improving measurements of a printed pattern. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and KOOIMAN (US 20200173940 A1), Paragraph [0002].
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of KOOIMAN (US 20200173940 A1), herein after referenced as KOOIMAN and further in view of SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), herein after referenced as SOJKA.
Regarding claim 7, HASUMI in view of YANG and further in view of KOOIMAN explicitly teach the method of claim 6, HASUMI in view of YANG and further in view of KOOIMAN fail to explicitly teach wherein the correcting of the positions of the plurality of peripheral holes comprises correcting the positions of the plurality of peripheral holes based on lattice constants of a plurality of central holes disposed in the central region.
However, SOJKA explicitly teaches wherein the correcting of the positions of the plurality of peripheral holes comprises correcting the positions of the plurality of peripheral holes based on lattice constants of a plurality of central holes disposed in the central region (Fig. 1. Col. 4. Lines [16-18]-Col 5. Line [1]-SOJKA discloses from such images it is possible to derive the angles and lengths of the lattice vectors directly, or to determine the lattice parameters by fitting a theoretical lattice to the spot positions.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG and further in view of KOOIMAN of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of SOJKA of wherein the correcting of the positions of the plurality of peripheral holes comprises correcting the positions of the plurality of peripheral holes based on lattice constants of a plurality of central holes disposed in the central region.
Wherein having HASUMI’s system for SEM image distortion correction wherein the correcting of the positions of the plurality of peripheral holes comprises correcting the positions of the plurality of peripheral holes based on lattice constants of a plurality of central holes disposed in the central region.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and SOJKA relate to distortion correction due to imaging with electrons, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while SOJKA can be straightforwardly applied to a broader range of diffraction methods yielding distortion-corrected and calibrated image. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), Col. 3. Lines [1-13].
Regarding claim 8, HASUMI in view of YANG and further in view of KOOIMAN and further in view of SOJKA explicitly teach the method of claim 7,
HASUMI further teaches wherein the central region is defined as a rectangle (Fig. 3-5 and 8, illustrate a central region defined by a rectangle. Paragraph [0036]-HASUMI discloses in FIG. 3, a center is used as the reference pattern 302.), and
HASUMI in view of YANG fail to explicitly teach wherein the correcting of the positions of the plurality of peripheral holes comprises.
However, KOOIMAN explicitly teaches wherein the correcting of the positions of the plurality of peripheral holes comprises (Fig. 3. Paragraph [0051]-KOOIMAN discloses to determine the difference between SEM images and target patterns, in certain embodiments, the disclosed processes may include or begin with performing an image alignment between the SEM image and the target pattern. This alignment can include, for example, performing any combination of translations in X and Y (or Z for 3D images), symmetric and asymmetric rotations, and symmetric and asymmetric magnification. Such a procedure can be referred to as a six-parameter linear distortion correction and can be performed either on the SEM image or the target pattern.):
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings HASUMI in view of YANG of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of KOOIMAN of wherein the correcting of the positions of the plurality of peripheral holes comprises.
Wherein having HASUMI’s system for SEM image distortion correction wherein the correcting of the positions of the plurality of peripheral holes comprises.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and KOOIMAN relate to imaging wafer patterns with an SEM, HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while KOOIMAN to improving measurements of a printed pattern. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and KOOIMAN (US 20200173940 A1), Paragraph [0002].
HASUMI in view of YANG and further in view of KOOIMAN fail to explicitly teach determining lattice constants for the at least one central holes within the rectangle; and moving the positions of the plurality of peripheral holes based on the determined lattice constant.
However, SOJKA explicitly teaches determining lattice constants for the at least one central holes within the rectangle (Fig. 1. Col. 4. Lines [16-18]-Col 5. Line [1]-SOJKA discloses from such images it is possible to derive the angles and lengths of the lattice vectors directly, or to determine the lattice parameters by fitting a theoretical lattice to the spot positions. Please see annotated figure 1 below.); and
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Annotated diagram of SOJKA’s Fig. 1 illustrating holes in the middle of a rectangle.
moving the positions of the plurality of peripheral holes based on the determined lattice constant (Fig. 1. Col. 4. Lines [16-18]-Col 5. Line [1]-SOJKA discloses from such images it is possible to derive the angles and lengths of the lattice vectors directly, or to determine the lattice parameters by fitting a theoretical lattice to the spot positions (wherein the spot positions are the positions of the peripheral holes).).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG and further in view of KOOIMAN of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of SOJKA of determining lattice constants for the at least one central holes within the rectangle; and moving the positions of the plurality of peripheral holes based on the determined lattice constant.
Wherein having HASUMI’s system for SEM image distortion correction determining lattice constants for the at least one central holes within the rectangle; and moving the positions of the plurality of peripheral holes based on the determined lattice constant.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and SOJKA relate to distortion correction due to imaging with electrons, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while SOJKA can be straightforwardly applied to a broader range of diffraction methods yielding distortion-corrected and calibrated image. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), Col. 3. Lines [1-13].
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of KOOIMAN (US 20200173940 A1), herein after referenced as KOOIMAN and further in view of RHINOW (US 20210110996 A1), herein after referenced as RHINOW.
Regarding claim 9, HASUMI in view of YANG and further in view of KOOIMAN explicitly teach the method of claim 6,
HASUMI further teaches wherein the wafer comprises an after develop inspection (ADI) sample (Fig. 1. Paragraph [0029]-HASUMI discloses a length measurement scanning electron microscope (SEM) 101 of the semiconductor pattern evaluating apparatus according to the present embodiment includes an irradiation optical system 103 that controls an electron beam 102, and a detection system that detects a secondary electron 104 emitted from a sample. (wherein the sample is an ADI sample); and
HASUMI in view of YANG fail to explicitly teach wherein the method further comprises, after the correcting of the positions of the plurality of peripheral holes
However, KOOIMAN explicitly teaches wherein the method further comprises, after the correcting of the positions of the plurality of peripheral holes (Fig. 3. Paragraph [0051]-KOOIMAN discloses to determine the difference between SEM images and target patterns, in certain embodiments, the disclosed processes may include or begin with performing an image alignment between the SEM image and the target pattern. This alignment can include, for example, performing any combination of translations in X and Y (or Z for 3D images), symmetric and asymmetric rotations, and symmetric and asymmetric magnification. Such a procedure can be referred to as a six-parameter linear distortion correction and can be performed either on the SEM image or the target pattern.):
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings HASUMI in view of YANG of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of KOOIMAN of wherein the method further comprises, after the correcting of the positions of the plurality of peripheral holes.
Wherein having HASUMI’s system for SEM image distortion correction wherein the method further comprises, after the correcting of the positions of the plurality of peripheral holes.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and KOOIMAN relate to imaging wafer patterns with an SEM, HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while KOOIMAN to improving measurements of a printed pattern. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and KOOIMAN (US 20200173940 A1), Paragraph [0002].
HASUMI in view of YANG and further in view of KOOIMAN fail to explicitly teach extracting a distortion component corresponding to charging of the ADI sample.
However, RHINOW explicitly discloses extracting a distortion component corresponding to charging of the ADI sample (Fig. 6, illustrates the inspected wafer (ADI). Paragraph [0113]-RHINOW discloses such imaging disturbances may be caused by local charging or surface charging of the SEM, and these have a negative influence on the ability to focus the electron beam 120. Further in [0013]-RHINOW discloses if deposits are recorded in the far field of the focus (e.g., at z>5-times the depth of field), such beam form distortions can easily be identified and can be remedied in a targeted manner where necessary. By way of example, the location of the imaging disturbance responsible for the beam form distortion, e.g., the location of a surface charge, can be deduced from the defocus dependence of the beam form distortion (wherein deducing is extracting).).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG and further in view of KOOIMAN of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of RHINOW of extracting a distortion component corresponding to charging of the ADI sample.
Wherein having HASUMI’s system for SEM image distortion correction extracting a distortion component corresponding to charging of the ADI sample.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and RHINOW relate to imaging distortions due to imaging with a scanning electron microscope, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while RHINOW improve the resolution capability of the system. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and RHINOW et al. (US 20210110996 A1), Paragraph [0011].
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of KOOIMAN (US 20200173940 A1), herein after referenced as KOOIMAN and further in view of RHINOW (US 20210110996 A1), herein after referenced as RHINOW, and further in view of NAKASUJI et al. (US 20090212213 A1), herein after referenced as NAKASUJI.
Regarding claim 10, HASUMI in view of YANG and further in view of KOOIMAN and further in view of RHINOW the method of claim 9,
HASUMI in view of YANG and further in view of KOOIMAN fail to explicitly teach wherein the extracting of the distortion component comprises.
However, RHINOW explicitly teaches wherein the extracting of the distortion component comprises (Fig. 6. Paragraph [0113]-RHINOW discloses the location of the imaging disturbance responsible for the beam form distortion, e.g., the location of a surface charge, can be deduced from the defocus dependence of the beam form distortion (wherein deducing is extracting).):
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG and further in view of KOOIMAN of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of RHINOW of wherein the extracting of the distortion component comprises.
Wherein having HASUMI’s system for SEM image distortion correction wherein the extracting of the distortion component comprises.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and RHINOW relate to imaging distortions due to imaging with a scanning electron microscope, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while RHINOW improve the resolution capability of the system. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and RHINOW et al. (US 20210110996 A1), Paragraph [0011].
HASUMI in view of YANG and further in view of KOOIMAN and further in view of RHINOW fail to explicitly teach determining a distortion component caused by electromagnetic lens aberration of SEM equipment based on at least one after cleaning inspection (ACI) sample.
However, NAKASUJI explicitly teaches determining a distortion component caused by electromagnetic lens aberration of SEM equipment based on at least one after cleaning inspection (ACI) sample (Paragraph [0308]-NAKASUJI discloses clean air flows in a laminar state (as a down flow) from the gas supply unit 231 disposed in the housing body 84 of the mini-environment device 63, for preventing dust from sticking to the upper surface of the wafer during the transfer. Further in Paragraph [0521]-NAKASUJI discloses when an electromagnetic lens is employed for the magnification lens, distortion aberration is larger than when an electrostatic lens is employed. However, since the lens 327 is required to have the NA aperture disposed on the main surface, an electromagnetic lens should be employed therefor. Since this lens produces a small image, the value of distortion can be negligible (equal to or less than one tenth of the pixel) though the distortion aberration coefficient is large (wherein the distortion aberration coefficient is a distortion component).).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG and further in view of KOOIMAN and further in view of RHINOW of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes provided on a wafer in a two-dimensional array structure, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings wherein the extracting of the distortion component comprises with the teachings of NAKASUJI of determining a distortion component caused by electromagnetic lens aberration of SEM equipment based on at least one after cleaning inspection (ACI) sample.
Wherein having HASUMI’s system for SEM image distortion correction determining a distortion component caused by electromagnetic lens aberration of SEM equipment based on at least one after cleaning inspection (ACI) sample.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and NAKASUJI relate to imaging semiconductor devices with an SEM, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while NAKASUJI to increase the inspection speed without degrading the resolution. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and NAKASUJI et al. (US 20090212213 A1), Paragraph [0065].
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), herein after referenced as SOJKA.
Regarding claim 12, HASUMI teaches a scanning electron microscope (SEM) image distortion correction method comprising (Fig. 1 and Fig. 2. Paragraph [0029]-HASUMI discloses Fig. 2. is a flowchart showing a circular pattern distortion measurement process.):
obtaining at least one SEM image of holes arranged in a two-dimensional array structure on a wafer (Fig. 3. [0029]-HASUMI discloses a configuration example of a semiconductor pattern evaluating apparatus according to the present embodiment will be described with reference to FIG. 1. A length measurement scanning electron microscope (SEM) 101 of the semiconductor pattern evaluating apparatus according to the present embodiment includes an irradiation optical system 103 that controls an electron beam 102, and a detection system that detects a secondary electron 104 emitted from a sample. The microscope includes a stage 105 that transports a measurement wafer 100 which is the sample and a load-lock chamber 106.), the wafer being an after develop inspection (ADI) sample, the holes comprising at least one central hole within a central region of the at least one SEM image (Fig. 2 and Fig. 9. HASUMI discloses a length measurement SEM image is acquired such that all of a pattern as a reference captured by the length measurement SEM 101 and patterns adjacent thereto are present in an image range) and a plurality of peripheral holes outside the central region (Fig. 3, illustrates an SEM image with a central hole surrounded by a plurality of peripheral holes. Paragraph [0036]-HASUMI discloses in FIG. 3, a center is used as the reference pattern 302. Subsequently, in distance-between-reference-pattern-and-surrounding-pattern measurement 203, distances between the reference pattern 302 and the surrounding patterns 303 are measured. In distance classification 204, distances 304 and distances 305 are respectively grouped (classified) as Group 1 and Group 2.);
Although, HASUMI teaches each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1; (Fig. 6. Paragraph [0038]-HASUMI discloses roundness may be acquired based on a disjunction between the division result of Group 1 and Group 2 and an ideal value of the division result of Group 1 and Group 2 acquired from previously stored design data (a ratio or a difference between both the result and the ideal value), and the roundness may be used as an index value. In this case, it can be said that in a case where a matching degree to the ideal value is high (the difference between both the result and the ideal value is 0 or the ratio is 1), the roundness is the highest.).
HASUMI fails to explicitly teach expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1; expanding each of the plurality of peripheral holes in multiple directions such that a diameter of a central hole and a diameter of at least one of the plurality of peripheral holes are substantially the same in the at least one SEM image; and.
However, YANG explicitly teaches expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1 (Fig. 2A-2B and 3B-3C, illustrate holes with substantially equal diameters. Paragraph [0025]-YANG discloses the first mask pattern is adjusted to expand the hole sizes of the mask holes along a horizontal direction and to rotate the mask holes for conceiving a second mask pattern of the photomask. Further in Paragraph [0027]-YANG discloses the rotated holes 3110 may be a plurality of elliptical holes, and each of the rotated holes 3110 may have an original length 3111 and an expanded length 3112.).
expanding each of the plurality of peripheral holes in multiple directions such that a diameter of a central hole (Fig. 2A-2B and 3B-3C, illustrates central holes surrounded by peripheral holes. #2111 called a mask radius and #2110 called a mask hole. Paragraph [0024]-YANG discloses the first patterned contacts may be a plurality of circular contacts that each has a contact radius (e.g., when the mask holes are circular holes.).) and a diameter of at least one of the plurality of peripheral holes are substantially the same in the at least one SEM image (Fig. 2A-2B and 3B-3C, illustrate holes with substantially equal diameters. Paragraph [0025]-YANG discloses the first mask pattern is adjusted to expand the hole sizes of the mask holes along a horizontal direction and to rotate the mask holes for conceiving a second mask pattern of the photomask. Further in Paragraph [0027]-YANG discloses the rotated holes 3110 may be a plurality of elliptical holes, and each of the rotated holes 3110 may have an original length 3111 and an expanded length 3112.); and
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes arranged in a two-dimensional array structure on a wafer, the wafer being an after develop inspection (ADI) sample, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region, with the teachings of YANG of expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1; expanding each of the plurality of peripheral holes in multiple directions such that a diameter of a central hole and a diameter of at least one of the plurality of peripheral holes are substantially the same in the at least one SEM image; and.
Wherein having HASUMI’s pattern distortion measurement system expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of each of the plurality of peripheral holes is about 1:1; expanding each of the plurality of peripheral holes in multiple directions such that a diameter of a central hole and a diameter of at least one of the plurality of peripheral holes are substantially the same in the at least one SEM image; and.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and YANG relate to imaging wafer patterns with an SEM, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while YANG the overlay between two adjacent patterns needs to be precisely controlled to reduce the overlay errors. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and YANG et al. (US 20200218144 A1), Paragraph [0004].
HASUMI in view of YANG fail to explicitly teach correcting positions of the plurality of peripheral holes based on lattice constants of the at least one central hole.
However, SOJKA explicitly teaches correcting positions of the plurality of peripheral holes based on lattice constants of the at least one central hole (Fig. 1. Col. 4. Lines [16-18]-Col 5. Line [1]-SOJKA discloses from such images it is possible to derive the angles and lengths of the lattice vectors directly, or to determine the lattice parameters by fitting a theoretical lattice to the spot positions.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes arranged in a two-dimensional array structure on a wafer, the wafer being an after develop inspection (ADI) sample, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region, with the teachings of SOJKA of correcting positions of the plurality of peripheral holes based on lattice constants of the at least one central hole.
Wherein having HASUMI’s pattern distortion measurement system correcting positions of the plurality of peripheral holes based on lattice constants of the at least one central hole.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and SOJKA relate to distortion correction due to imaging with electrons, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while SOJKA can be straightforwardly applied to a broader range of diffraction methods yielding distortion-corrected and calibrated image. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), Col. 3. Lines [1-13].
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), herein after referenced as SOJKA, and further in view of LEE et al. (US 11830176 B2), herein after referenced as LEE.
Regarding claim 13, HASUMI in view of YANG and further in view of SOJKA explicitly teach the method of claim 12,
HASUMI further teaches wherein the obtaining of the at least one SEM image comprises (Fig. 3. [0029]-HASUMI discloses a configuration example of a semiconductor pattern evaluating apparatus according to the present embodiment will be described with reference to FIG. 1. A length measurement scanning electron microscope (SEM) 101 of the semiconductor pattern evaluating apparatus according to the present embodiment includes an irradiation optical system 103 that controls an electron beam 102, and a detection system that detects a secondary electron 104 emitted from a sample. The microscope includes a stage 105 that transports a measurement wafer 100 which is the sample and a load-lock chamber 106.):
HASUMI fails to explicitly teach wherein expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding of each of the plurality of peripheral holes in the multiple directions are performed for each of the plurality of SEM images based on the representative SEM image.
However, YANG explicitly teaches wherein expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding of each of the plurality of peripheral holes in the multiple directions are performed for each of the plurality of SEM images based on the representative SEM image (Fig. 2A-2B, illustrate holes with substantially equal diameters. Paragraph [0025]-YANG discloses the first mask pattern is adjusted to expand the hole sizes of the mask holes along a horizontal direction and to rotate the mask holes for conceiving a second mask pattern of the photomask. Further in Paragraph [0027]-YANG discloses the rotated holes 3110 may be a plurality of elliptical holes, and each of the rotated holes 3110 may have an original length 3111 and an expanded length 3112. Therefore, it would have been obvious to one of ordinary skill of the art at the time the invention was made to perform expansion for each of the plurality of SEM images based on the representative SEM image since YANG clearly discloses expanding the peripheral holes in the photomask. Thus, in order to have a more efficient image distortion correction system.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes arranged in a two-dimensional array structure on a wafer, the wafer being an after develop inspection (ADI) sample, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region, with the teachings of YANG of wherein expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding of each of the plurality of peripheral holes in the multiple directions are performed for each of the plurality of SEM images based on the representative SEM image.
Wherein having HASUMI’s pattern distortion measurement system wherein expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding of each of the plurality of peripheral holes in the multiple directions are performed for each of the plurality of SEM images based on the representative SEM image.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and YANG relate to imaging wafer patterns with an SEM, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while YANG the overlay between two adjacent patterns needs to be precisely controlled to reduce the overlay errors. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and YANG et al. (US 20200218144 A1), Paragraph [0004].
HASUMI in view of YANG and further in view of SOJKA fails to explicitly teach obtaining a plurality of SEM images; and obtaining a representative SEM image by synthesizing the plurality of SEM images.
However, LEE explicitly teaches obtaining a plurality of SEM images (Fig. 3. Col. 3. Lines [32-34]- LEE discloses obtained SEM images are analyzed for further purposes including, for example, yield improvement.); and
obtaining a representative SEM image by synthesizing the plurality of SEM images (Fig. 3. Col. 4. Lines [8-12]-LEE discloses in operation 240, the image 330 as a mixed image is generated based on the images 310 and 320 according to identifying structures in the image 330. In some embodiments, the images 310 and 320 are combined after being adjusted. Further in Col. 4. Lines [29-32]-LEE discloses after the images 310 and 320 are modified, the generating the image 330 includes operations of merging the image 310 with the image 320 or adding the image 310 to the image 320.), and
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG and further in view of SOJKA of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes arranged in a two-dimensional array structure on a wafer, the wafer being an after develop inspection (ADI) sample, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of LEE of obtaining a plurality of SEM images; and obtaining a representative SEM image by synthesizing the plurality of SEM images.
Wherein having HASUMI’s system for SEM image distortion correction obtaining a plurality of SEM images; and obtaining a representative SEM image by synthesizing the plurality of SEM images.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and LEE relate to imaging wafer patterns with an SEM, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and LEE et al. (US 11830176 B2), Col. 1. Lines [8-15].
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), herein after referenced as SOJKA, and further in view of KOOIMAN (US 20200173940 A1), herein after referenced as KOOIMAN.
Regarding claim 14, HASUMI in view of YANG and further in view of SOJKA explicitly teach the method of claim 12,
HASUMI further explicitly teaches wherein the central region is defined as a rectangle (Fig. 3-5 and 8, illustrate a central region defined by a rectangle. Paragraph [0036]-HASUMI discloses in FIG. 3, a center is used as the reference pattern 302.), and
HASUMI in view of YANG fail to explicitly teach determining lattice constants for of the at least one central hole pattern that is within the rectangle; and moving the positions of the plurality of peripheral holes based on the determined lattice constant.
However, SOJKA explicitly teaches determining lattice constants for of the at least one central hole pattern that is within the rectangle (Col. 4. Lines [16-18]-Col 5. Line [1]-SOJKA discloses from such images it is possible to derive the angles and lengths of the lattice vectors directly, or to determine the lattice parameters by fitting a theoretical lattice to the spot positions. Please see annotated figure 1 below.); and
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Annotated diagram of SOJKA’s Fig. 1 illustrating holes in the middle of a rectangle.
moving the positions of the plurality of peripheral holes based on the determined lattice constant (Fig. 1. Col. 4. Lines [16-18]-Col 5. Line [1]-SOJKA discloses from such images it is possible to derive the angles and lengths of the lattice vectors directly, or to determine the lattice parameters by fitting a theoretical lattice to the spot positions.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes arranged in a two-dimensional array structure on a wafer, the wafer being an after develop inspection (ADI) sample, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region, with the teachings of SOJKA of determining lattice constants for of the at least one central hole pattern that is within the rectangle; and moving the positions of the plurality of peripheral holes based on the determined lattice constant.
Wherein having HASUMI’s system for SEM image distortion correction determining lattice constants for of the at least one central hole pattern that is within the rectangle; and moving the positions of the plurality of peripheral holes based on the determined lattice constant.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and SOJKA relate to distortion correction due to imaging with electrons, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while SOJKA can be straightforwardly applied to a broader range of diffraction methods yielding distortion-corrected and calibrated image. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), Col. 3. Lines [1-13].
HASUMI in view of YANG and further in view of SOJKA fail to explicitly teach wherein the correcting of the positions of the plurality of peripheral holes comprises.
However, KOOIMAN explicitly teaches wherein the correcting of the positions of the plurality of peripheral holes comprises (Fig. 3. Paragraph [0051]-KOOIMAN discloses to determine the difference between SEM images and target patterns, in certain embodiments, the disclosed processes may include or begin with performing an image alignment between the SEM image and the target pattern. This alignment can include, for example, performing any combination of translations in X and Y (or Z for 3D images), symmetric and asymmetric rotations, and symmetric and asymmetric magnification. Such a procedure can be referred to as a six-parameter linear distortion correction and can be performed either on the SEM image or the target pattern.):
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG and further in view of SOJKA of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes arranged in a two-dimensional array structure on a wafer, the wafer being an after develop inspection (ADI) sample, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region, with the teachings of SOJKA of determining lattice constants for of the at least one central hole pattern that is within the rectangle; and moving the positions of the plurality of peripheral holes based on the determined lattice constant.
Wherein having HASUMI’s system for SEM image distortion correction determining lattice constants for of the at least one central hole pattern that is within the rectangle; and moving the positions of the plurality of peripheral holes based on the determined lattice constant.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and KOOIMAN relate to imaging wafer patterns with an SEM, HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while KOOIMAN to improving measurements of a printed pattern. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and KOOIMAN (US 20200173940 A1), Paragraph [0002].
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), herein after referenced as SOJKA, and further in view of RHINOW (US 20210110996 A1), herein after referenced as RHINOW.
Regarding claim 15, HASUMI in view of YANG and further in view of SOJKA explicitly teach the method of claim 12,
HASUMI in view of YANG and further in view of SOJKA fail to explicitly teach wherein a total distortion component of the at least one SEM image comprises a first distortion component caused by electromagnetic lens aberration of SEM equipment and a second distortion component caused by charging of the ADI sample, and wherein the method further comprises, after correcting the positions of the plurality of peripheral holes, extracting the second distortion component.
However, RHINOW discloses wherein a total distortion component of the at least one SEM image comprises a first distortion component caused by electromagnetic lens aberration of SEM equipment (Fig. 4. Paragraph [0107]-RHINOW discloses concentric ring structures are identified in the deposit at the positive defocus settings of +20 μm to +50 μm, which are not present in the corresponding negative defocus settings of −20 μm to −50 μm. From this, the presence of positive spherical aberrations in the electron beam can be deduced.) and a second distortion component caused by charging of the ADI sample (Fig. 6, illustrates the inspected wafer (ADI). Paragraph [0113]-RHINOW discloses such imaging disturbances may be caused by local charging or surface charging of the SEM, and these have a negative influence on the ability to focus the electron beam 120. Further in [0013]-RHINOW discloses if deposits are recorded in the far field of the focus (e.g., at z>5-times the depth of field), such beam form distortions can easily be identified and can be remedied in a targeted manner where necessary. By way of example, the location of the imaging disturbance responsible for the beam form distortion, e.g., the location of a surface charge, can be deduced from the defocus dependence of the beam form distortion (wherein deducing is extracting).), and
wherein the method further comprises, after correcting the positions of the plurality of peripheral holes, extracting the second distortion component (Fig. 6. Paragraph [0113]-RHINOW discloses the location of the imaging disturbance responsible for the beam form distortion, e.g., the location of a surface charge, can be deduced from the defocus dependence of the beam form distortion (wherein deducing is extracting).).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of HASUMI in view of YANG and further in view of SOJKA of a scanning electron microscope (SEM) image distortion correction method comprising: obtaining at least one SEM image of holes arranged in a two-dimensional array structure on a wafer, the wafer being an after develop inspection (ADI) sample, the holes comprising at least one central hole within a central region of the at least one SEM image and a plurality of peripheral holes outside the central region with the teachings of RHINOW of wherein a total distortion component of the at least one SEM image comprises a first distortion component caused by electromagnetic lens aberration of SEM equipment and a second distortion component caused by charging of the ADI sample, and wherein the method further comprises, after correcting the positions of the plurality of peripheral holes, extracting the second distortion component.
Wherein having HASUMI’s system for SEM image distortion correction wherein a total distortion component of the at least one SEM image comprises a first distortion component caused by electromagnetic lens aberration of SEM equipment and a second distortion component caused by charging of the ADI sample, and wherein the method further comprises, after correcting the positions of the plurality of peripheral holes, extracting the second distortion component.
The motivation behind the modification would have been to obtain an SEM image distortion correction system that repairs the distortion and more accurately assess the wafer pattern. Since both HASUMI and RHINOW relate to imaging distortions due to imaging with a scanning electron microscope, wherein HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect, while RHINOW improve the resolution capability of the system. Please see HASUMI et al. (US 20170030712 A1), Paragraph [0009], and RHINOW et al. (US 20210110996 A1), Paragraph [0011].
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over LEE et al. (US 11830176 B2), herein after referenced as LEE, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, and further in view of SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), herein after referenced as SOJKA.
Regarding claim 17, LEE explicitly teaches a semiconductor device manufacturing method comprising (Fig. 6. Col. 6. Lines [29-30]-LEE discloses FIG. 6 is a schematic diagram of a manufacturing system 60.]):
applying a result of correcting the distortion of the first SEM image to an SEM equipment (Fig. 2. Col. 4. Lines [12-22]-LEE discloses with reference to operations 230 and 240 together, the images 310 and 320 are adjusted according to an image contrast of the contact holes 121 in the image 330. For instance, when the image contrast of the contact holes 121 in the image 330 is not strong enough for identifying the position/center of each of the contact holes 121, at least one of properties of the image 310 and properties of the image 320 is adjusted to generate a modified image 330 for identification. In some embodiments, for example, the opacity of the image 310 is adjusted to 40% and the opacity of the image 310 is adjusted to 80%.);
obtaining a second SEM image of second holes in a two-dimensional array structure on a second wafer using the SEM equipment (Fig. 2. Col. 3. Lines [28-34]-LEE discloses the device gaps may be verified by an observation equipment to check whether there are two of the contact holes overlapping each other. In at least one implementation, the observation equipment may be a scanning electron microscope (SEM).);
determining whether critical dimensions (CDs) of the second holes on the second wafer are within a normal range (Fig. 2. Col. 5. Line [48-55]-LEE discloses a distance 501 is referred to as the sub-offset between the center CF of the contact hole 111 and the center CP1 of the contact hole 121 at the position P1, a distance 502 is referred to as the sub-offset between the center CF of the contact hole 111 and the center CP2 of the contact hole 121 at the position P2, and a distance 503 is referred to as the sub-offset between the center CF of the contact hole 111 and the center CP3 of the contact hole 121 at the position P3 (wherein the sub-offsets are critical dimensions). Further in Col. 6. Line [17-20]-LEE discloses a net offset corresponding to all unit structures in the region 130 is obtained by, for example, calculating an average of the offsets, calculating a sum of the offsets, or any other suitable calculation. Further in Col. 6. Lines [25-28]-LEE discloses when the net offset exceeds a threshold value, some properties of a manufacturing tool (as shown in FIG. 6) is modified to manufacture the semiconductor device 10 until the net offset is below the threshold value.); and
performing a subsequent semiconductor process on the second wafer based on determining the CDs are within the normal range (Fig. 6. Col. 6. Lines [25-28]-LEE discloses when the net offset exceeds a threshold value, some properties of a manufacturing tool (as shown in FIG. 6) is modified to manufacture the semiconductor device 10 until the net offset is below the threshold value. Col. 6. Lines [32-34]-LEE further discloses the manufacturing system 60 includes a computing system 61, a scanning electron microscope (SEM) 62, and fabrication tools 63. Further in Col. 7. Line [32-35]-LEE discloses the fabrication tools 63 include, for example, photolithography steppers, etch tools, deposition tools, polishing tools, rapid thermal anneal tools, ion implantation tools, and the like.),
obtaining the first SEM image of the first holes from the first wafer, the first holes comprising at least one central hole (Fig. 4A, #11 called a contact hole with CF designating the center of the contact hole. Col. 5. Lines [10-28].) within a central region of the first SEM image (Fig. 3. Col. 3. Lines [44-47]-LEE discloses FIG. 3 includes scanning electron microscope (SEM) images 310-330 corresponding to layers 110-120 in the semiconductor device 10 of FIG. 1,.) and a plurality of peripheral holes outside the central region of the first SEM image (Fig. 4A and Fig. 4B, illustrate SEM images with a central hole surrounded by peripheral holes outside of the central region. Col. 4. Lines [62-67] and Col. 5. Lines [1-4]-LEE discloses the method 20 identifies in a region 140 one contact hole 111 overlapping a group of three contact holes 121, and further in operation 250 identifies a position of the contact hole 111 in the region 140. In some embodiments, as the contact hole 111 is a circle, a center CF of the contact hole 111 is identified as the position of the contact hole 111, as shown in FIG. 4A. In some embodiments, elements within the region 140 are referred as a unit structure of the semiconductor device 10.);
LEE fails to explicitly teach correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample; expanding each of the plurality of peripheral holes in a minor axis direction; expanding each of the plurality of peripheral holes in multiple directions such that a diameter of the at least one central hole and a diameter of at least one of the plurality of peripheral holes are substantially the same in the first SEM image.
However, YANG explicitly teaches correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample (Fig. 1. Paragraph [0021]-YANG discloses FIG. 1 illustrates a flowchart of an example method for correcting a designed pattern of a photomask for fabricating a semiconductor device, according to an example implementation of the present application. Paragraph [0034]-YANG further discloses at block 14, a plurality of device gaps between the plurality of contact holes is verified. the device gaps may be verified by an observation equipment to check whether there are two of the contact holes overlapping each other. In at least one implementation, the observation equipment may be a scanning electron microscope (SEM).);
expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of the plurality of peripheral holes is about 1:1; (Fig. 2A-2B and 3B-3C. Paragraph [0025]-YANG discloses the first mask pattern is adjusted to expand the hole sizes of the mask holes along a horizontal direction and to rotate the mask holes for conceiving a second mask pattern of the photomask. Further in Paragraph [0026]-YANG discloses the rotated holes 3110 may be generated by performing an optical proximity correction (OPC) to expand the mask holes 2110 (shown in FIG. 2A) along a horizontal direction and to horizontally rotate the expanded mask holes (wherein the horizontal direction is the minor axis direction).);
expanding each of the plurality of peripheral holes in multiple directions such that a diameter of the at least one central hole and a diameter of at least one of the plurality of peripheral holes are substantially the same in the first SEM image (Fig. 2A-2B and 3B-3C, illustrate holes with substantially equal diameters. Paragraph [0025]-YANG discloses the first mask pattern is adjusted to expand the hole sizes of the mask holes along a horizontal direction and to rotate the mask holes for conceiving a second mask pattern of the photomask. Further in Paragraph [0027]-YANG discloses the rotated holes 3110 may be a plurality of elliptical holes, and each of the rotated holes 3110 may have an original length 3111 and an expanded length 3112.); and
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of LEE of a semiconductor device manufacturing method comprising: applying a result of correcting the distortion of the first SEM image to an SEM equipment; obtaining a second SEM image of second holes in a two-dimensional array structure on a second wafer using the SEM equipment; determining whether critical dimensions (CDs) of the second holes on the second wafer are within a normal range; with the teachings of YANG of correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample; expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of the plurality of peripheral holes is about 1:1; expanding each of the plurality of peripheral holes in multiple directions such that a diameter of the at least one central hole and a diameter of at least one of the plurality of peripheral holes are substantially the same in the first SEM image.
Wherein having LEE’s method of measuring manufacturing semiconductor devices correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample; expanding each of the plurality of peripheral holes in a minor axis direction such that a ratio of a minor axis to a major axis of the plurality of peripheral holes is about 1:1; expanding each of the plurality of peripheral holes in multiple directions such that a diameter of the at least one central hole and a diameter of at least one of the plurality of peripheral holes are substantially the same in the first SEM image.
The motivation behind the modification would have been to obtain a method of manufacturing semiconductor devices that enhances the efficiency and precision during the manufacturing process. Since both LEE and YANG relate to imaging semiconductor devices with an SEM, wherein LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device, while YANG overlay between two adjacent patterns needs to be precisely controlled to reduce the overlay errors. Please see LEE et al. (US 11830176 B2), Col. 1. Lines [8-15], and YANG et al. (US 20200218144 A1), Paragraph [0004].
LEE in view of YANG fails to explicitly teach wherein the correcting of the distortion of the first SEM image comprises:
However, HASUMI explicitly teaches wherein the correcting of the distortion of the first SEM image comprises (Fig. 1 and Fig. 2. Paragraph [0029]-HASUMI discloses Fig. 2. is a flowchart showing a circular pattern distortion measurement process.):
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of LEE in view of YANG of A semiconductor device manufacturing method comprising: correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample; applying a result of correcting the distortion of the first SEM image to an SEM equipment; with the teachings of HASUMI of wherein the correcting of the distortion of the first SEM image comprises.
Wherein having LEE’s method of measuring manufacturing semiconductor devices wherein the correcting of the distortion of the first SEM image comprises.
The motivation behind the modification would have been to obtain a method of manufacturing semiconductor devices that enhances the efficiency and precision during the manufacturing process. Since both LEE and HASUMI relate to imaging wafer patterns with a scanning electron microscope, wherein LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device, while HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect. Please see LEE et al. (US 11830176 B2), Col. 1. Lines [8-15], and HASUMI et al. (US 20170030712 A1), Paragraph [0009].
LEE in view of YANG and further in view of HASUMI fails to explicitly teach correcting positions of the plurality of peripheral holes based on lattice constants of at least one central hole.
However, SOJKA explicitly teaches correcting positions of the plurality of peripheral holes based on lattice constants of at least one central hole (Fig. 1. Col. 4. Lines [16-18]-Col 5. Line [1]-SOJKA discloses from such images it is possible to derive the angles and lengths of the lattice vectors directly, or to determine the lattice parameters by fitting a theoretical lattice to the spot positions.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of LEE in view of YANG and further in view of HASUMI of a semiconductor device manufacturing method comprising: correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample; applying a result of correcting the distortion of the first SEM image to an SEM equipment; with the teachings of SOJKA of and correcting positions of the plurality of peripheral holes based on lattice constants of at least one central hole.
Wherein having LEE’s method of measuring manufacturing semiconductor devices correcting positions of the plurality of peripheral holes based on lattice constants of at least one central hole.
The motivation behind the modification would have been to obtain a method of manufacturing semiconductor devices that enhances the efficiency and precision during the manufacturing process. Since both LEE and SOJKA relate to distortion correction due to imaging with electrons, wherein LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device, while SOJKA can be straightforwardly applied to a broader range of diffraction methods yielding distortion-corrected and calibrated image. Please see LEE et al. (US 11830176 B2), Col. 1. Lines [8-15], and SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), Col. 3. Lines [1-13].
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over LEE et al. (US 11830176 B2), herein after referenced as LEE, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, and further in view of SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), herein after referenced as SOJKA, and further in view of KOOIMAN (US 20200173940 A1), herein after referenced as KOOIMAN.
Regarding claim 18, LEE in view of YANG and further in view of HASUMI and further in view of SOJKA explicitly teach the method of claim 17,
LEE in view of YANG and further in view of SOJKA fail to explicitly teach wherein the correcting of the distortion of the first SEM image comprises correcting atypical distortion occurring in an outer portion of the first SEM image; wherein the central region of the first SEM image is defined as a rectangle.
However, HASUMI explicitly teaches wherein the correcting of the distortion of the first SEM image comprises correcting atypical distortion occurring in an outer portion of the first SEM image (Paragraph [0042]-HASUMI discloses a change of the pattern due to the micro loading effect is highly likely to occur in a pattern edge portion (for example, a portion 901) facing a portion where the patterns are coarse, and the change thereof is less likely to occur in a pattern edge portion (for example, a portion 902) facing a portion where the patterns are dense. Accordingly, as long as the degree of deformation of the portion facing the portion where the patterns are dense and the degree of deformation of the portion facing the portion where the patterns are coarse can be quantified, the pattern deformation caused due to the micro loading effect can be represented as an index value (wherein the edge is the outer portion).),
wherein the central region of the first SEM image is defined as a rectangle (Fig. 3-5 and 8, illustrate a central region defined by a rectangle. Paragraph [0036]-HASUMI discloses in FIG. 3, a center is used as the reference pattern 302.), and
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of LEE in view of YANG of a semiconductor device manufacturing method comprising: correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample; applying a result of correcting the distortion of the first SEM image to an SEM equipment with the teachings of HASUMI of wherein the correcting of the distortion of the first SEM image comprises correcting atypical distortion occurring in an outer portion of the first SEM image; wherein the central region of the first SEM image is defined as a rectangle.
Wherein having LEE’s method of measuring and manufacturing a semiconductor device wherein the correcting of the distortion of the first SEM image comprises correcting atypical distortion occurring in an outer portion of the first SEM image; wherein the central region of the first SEM image is defined as a rectangle.
The motivation behind the modification would have been to obtain a semiconductor image distortion correction system and a semiconductor manufacturing method that repairs the distortion and more accurately assess the wafer pattern and more efficiently and accurately produces semiconductor devices. Since both LEE and HASUMI relate to imaging wafer patterns with an SEM, wherein while LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device, while HASUMI it is possible to appropriately evaluate pattern deformation occurring due to a micro loading effect. Please see LEE et al. (US 11830176 B2), Col. 1. Lines [8-15], and HASUMI et al. (US 20170030712 A1), Paragraph [0009].
LEE in view of YANG and further in view of HASUMI fail to explicitly teach determining the lattice constants for the at least one central hole within the rectangle; and moving the positions of the plurality of peripheral holes based on determined the lattice constants.
However, SOJKA explicitly teaches determining the lattice constants for the at least one central hole within the rectangle (Fig. 1. Col. 4. Lines [16-18]-Col 5. Line [1]-SOJKA discloses from such images it is possible to derive the angles and lengths of the lattice vectors directly, or to determine the lattice parameters by fitting a theoretical lattice to the spot positions.); and
moving the positions of the plurality of peripheral holes based on determined the lattice constants (Fig. 1. Col. 4. Lines [16-18]-Col 5. Line [1]-SOJKA discloses from such images it is possible to derive the angles and lengths of the lattice vectors directly, or to determine the lattice parameters by fitting a theoretical lattice to the spot positions.).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of LEE in view of YANG and further in view of HASUMI of a semiconductor device manufacturing method comprising: correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample; applying a result of correcting the distortion of the first SEM image to an SEM equipment with the teachings of SOJKA of determining the lattice constants for the at least one central hole within the rectangle; and moving the positions of the plurality of peripheral holes based on determined the lattice constants.
Wherein having LEE’s method of measuring and manufacturing a semiconductor device determining the lattice constants for the at least one central hole within the rectangle; and moving the positions of the plurality of peripheral holes based on determined the lattice constants.
The motivation behind the modification would have been to obtain a semiconductor image distortion correction system and a semiconductor manufacturing method that repairs the distortion and more accurately assess the wafer pattern and more efficiently and accurately produces semiconductor devices. Since both LEE and SOJKA relate to distortion correction due to imaging with electrons, wherein while LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device, while SOJKA can be straightforwardly applied to a broader range of diffraction methods yielding distortion-corrected and calibrated image. Please see LEE et al. (US 11830176 B2), Col. 1. Lines [8-15], and SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), Col. 3. Lines [1-13].
LEE in view of YANG and further in view of HASUMI and further in view of SOJKA fail to explicitly teach wherein the correcting of the positions of the plurality of peripheral holes comprises.
However, KOOIMAN explicitly teaches wherein the correcting of the positions of the plurality of peripheral holes comprises (Fig. 3. Paragraph [0051]-KOOIMAN discloses to determine the difference between SEM images and target patterns, in certain embodiments, the disclosed processes may include or begin with performing an image alignment between the SEM image and the target pattern. This alignment can include, for example, performing any combination of translations in X and Y (or Z for 3D images), symmetric and asymmetric rotations, and symmetric and asymmetric magnification. Such a procedure can be referred to as a six-parameter linear distortion correction and can be performed either on the SEM image or the target pattern.):
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of LEE in view of YANG and further in view of HASUMI and further in view of SOJKA of a semiconductor device manufacturing method comprising: correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample; applying a result of correcting the distortion of the first SEM image to an SEM equipment with the teachings of KOOIMAN of wherein the correcting of the positions of the plurality of peripheral holes comprises.
Wherein having LEE’s method of measuring and manufacturing a semiconductor device wherein the correcting of the positions of the plurality of peripheral holes comprises.
The motivation behind the modification would have been to obtain a semiconductor image distortion correction system and a semiconductor manufacturing method that repairs the distortion and more accurately assess the wafer pattern and more efficiently and accurately produces semiconductor devices. Since both LEE and KOOIMAN relate to imaging wafer patterns with an SEM, wherein while LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device, while KOOIMAN to improving measurements of a printed pattern. Please see LEE et al. (US 11830176 B2), Col. 1. Lines [8-15], and KOOIMAN (US 20200173940 A1), Paragraph [0002].
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over LEE et al. (US 11830176 B2), herein after referenced as LEE, in view of YANG et al. (US 20200218144 A1), herein after referenced as YANG, and further in view of HASUMI et al. (US 20170030712 A1), herein after referenced as HASUMI, and further in view of SOJKA et al. (DOI: https://doi.org/10.1063/1.4774110), herein after referenced as SOJKA, and further in view of RHINOW (US 20210110996 A1), herein after referenced as RHINOW.
Regarding claim 19, LEE in view of YANG and further in view of HASUMI and further in view of SOJKA explicitly teach the method of claim 17,
LEE in view of YANG and further in view of HASUMI and further in view of SOJKA fail to explicitly teach wherein a total distortion component of the first SEM image comprises a first distortion component caused by electromagnetic lens aberration of the SEM equipment and a second distortion component caused by charging of the ADI sample, and wherein the correcting of the distortion of the first SEM image further comprises, after the correcting of the positions of the plurality of peripheral holes, extracting the second distortion component.
However, RHINOW explicitly teaches wherein a total distortion component of the first SEM image comprises a first distortion component caused by electromagnetic lens aberration of the SEM equipment (Fig. 4. Paragraph [0107]-RHINOW discloses concentric ring structures are identified in the deposit at the positive defocus settings of +20 μm to +50 μm, which are not present in the corresponding negative defocus settings of −20 μm to −50 μm. From this, the presence of positive spherical aberrations in the electron beam can be deduced.) and a second distortion component caused by charging of the ADI sample (Fig. 6, illustrates the inspected wafer (ADI). Paragraph [0113]-RHINOW discloses such imaging disturbances may be caused by local charging or surface charging of the SEM, and these have a negative influence on the ability to focus the electron beam 120. Further in [0013]-RHINOW discloses if deposits are recorded in the far field of the focus (e.g., at z>5-times the depth of field), such beam form distortions can easily be identified and can be remedied in a targeted manner where necessary. By way of example, the location of the imaging disturbance responsible for the beam form distortion, e.g., the location of a surface charge, can be deduced from the defocus dependence of the beam form distortion (wherein deducing is extracting).), and
wherein the correcting of the distortion of the first SEM image further comprises, after the correcting of the positions of the plurality of peripheral holes, extracting the second distortion component (Fig. 6. Paragraph [0113]-RHINOW discloses the location of the imaging disturbance responsible for the beam form distortion, e.g., the location of a surface charge, can be deduced from the defocus dependence of the beam form distortion (wherein deducing is extracting).).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention was made to combine the teachings of LEE in view of YANG and further in view of HASUMI and further in view of SOJKA of a semiconductor device manufacturing method comprising: correcting distortion of a first scanning electron microscope (SEM) image of first holes in a two-dimensional array structure on a first wafer, the first wafer being an after develop inspection (ADI) sample; applying a result of correcting the distortion of the first SEM image to an SEM equipment with the teachings of RHINOW of wherein a total distortion component of the first SEM image comprises a first distortion component caused by electromagnetic lens aberration of the SEM equipment and a second distortion component caused by charging of the ADI sample, and wherein the correcting of the distortion of the first SEM image further comprises, after the correcting of the positions of the plurality of peripheral holes, extracting the second distortion component.
Wherein having LEE’s method of measuring and manufacturing a semiconductor device wherein a total distortion component of the first SEM image comprises a first distortion component caused by electromagnetic lens aberration of the SEM equipment and a second distortion component caused by charging of the ADI sample, and wherein the correcting of the distortion of the first SEM image further comprises, after the correcting of the positions of the plurality of peripheral holes, extracting the second distortion component.
The motivation behind the modification would have been to obtain a semiconductor image distortion correction system and a semiconductor manufacturing method that repairs the distortion and more accurately assess the wafer pattern and more efficiently and accurately produces semiconductor devices. Since both LEE and RHINOW relate to distortion correction due to imaging with an SEM, wherein while LEE the image of some surfaces lower than the front surface of the semiconductor device should appear focused or for further analysis of properties of the semiconductor device, while RHINOW improve the resolution capability of the system. Please see LEE et al. (US 11830176 B2), Col. 1. Lines [8-15], and RHINOW et al. (US 20210110996 A1), Paragraph [0011].
Allowable Subject Matter
Claims 11, 16, and 20, along with their dependent claims, are therefrom objected to as being dependent upon rejected base claims, claim 1, claim 12, and claim 17, respectively, but would be allowable if rewritten in independent form including all of the limitations of the base claims and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 11, the method of claim 10, wherein a total distortion component of the at least one SEM image comprises a shape distortion component and a position distortion component, and wherein the extracting of the distortion component further comprises: determining a first distortion component due to charging of the ADI sample by subtracting a second distortion component caused by the electromagnetic lens aberration from the total distortion component, as claimed in claim 11.
Regarding claim 16, the method of claim 15, wherein the extracting of the second distortion component comprises: obtaining the total distortion component of the at least one SEM image; determining the first distortion component based on at least one after cleaning inspection (ACI) sample; and determining the second distortion component by subtracting the first distortion component from the total distortion component, wherein the obtaining of the total distortion component of the at least one SEM image comprises summing a shape distortion component for each hole corrected in the expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding each of the plurality of peripheral holes in multiple directions, and a position distortion component for each hole corrected in the correcting the positions of the plurality of peripheral holes, as claimed in claim 16.
Regarding claim 20, the method of claim 19, wherein the total distortion component comprises a shape distortion component for each hole corrected in the expanding of each of the plurality of peripheral holes in the minor axis direction and the expanding each of the plurality of peripheral holes in multiple directions, and a position distortion component for each hole corrected in the correcting the positions of the plurality of peripheral holes, and wherein the extracting of the second distortion component comprises: determining the first distortion component based on at least one after cleaning inspection (ACI) sample; and determining the second distortion component by subtracting the first distortion component from the total distortion component, as claimed in claim 20.
Conclusion
Listed below are the prior arts made of record and not relied upon but are considered pertinent to applicant’s disclosure.
FANG et al. (US 20200126242 A1) - A method for aligning a wafer image with a reference image, comprising: searching for a targeted reference position on the wafer image for aligning the wafer image with the reference image; and in response to a determination that the targeted reference position does not exist: defining a current lock position and an area that encloses the current lock position on the wafer image; computing an alignment score of the current lock position; comparing the alignment score of the current lock position with stored alignment scores of positions previously selected in relation to aligning the wafer image with the reference image; and aligning the wafer image with the reference image based on the comparison.
MIYAMOTO et al. (US 20080159609 A1) - This invention relates to a SEM system constructed to create imaging recipes or/and measuring recipes automatically and at high speed, and improve inspection efficiency and an automation ratio, and to a method using the SEM system; a method for creation of imaging recipes and measuring recipes in the SEM system is adapted to include, in a recipe arithmetic unit, the steps of evaluating a tolerance for an imaging position error level at an evaluation point, evaluating a value predicted of the imaging position error level at the evaluation point when any region on circuit pattern design data is defined as an addressing point, and determining an imaging recipe and a measuring recipe on the basis of a relationship between the tolerance for the imaging position error level at the evaluation point and the predicted value of the imaging position error level at the evaluation point.
TOYODA et al. (US 20070098248 A1) - Solving means is configured of a signal input interface, a data calculation unit, and a signal output interface. The signal input interface allows image data which is obtained by photographing hole patterns, and CAD data which corresponds to hole patterns included in the image data, to be inputted. The data calculation unit includes: CAD hole-pattern central-position detection means which detects central positions respectively of hole patterns included in the CAD data from the CAD data, and which generates data which represents, with an image, the central positions of the respective hole patterns; pattern extraction means which extracts pattern data from the image data; image hole-pattern central-position detection means which detects central positions of the respective hole patterns in the image data from the pattern data, and which generates data which represents, with an image, the central positions of these hole patterns detected from the image data; and collation process means which detects positional data in the image data corresponding to that in the CAD data through a process of collating the CAD hole-pattern central-position data with the image hole-pattern central-position data. The signal output interface outputs the positional data outputted from the data calculation unit.
YAMAGUCHI et al. (US 10672119 B2) - In order to provide an inspection device capable of quantitatively evaluating a pattern related to a state of a manufacturing process or performance of an element, it is assumed that an inspection device includes an image analyzing unit that analyzes a top-down image of a sample in which columnar patterns are formed at a regular interval, in which an image analyzing unit 240 includes a calculation unit 243 that obtains a major axis, a minor axis, an eccentricity, and an angle formed by a major axis direction with an image horizontal axis direction of the approximated ellipse as a first index and a Cr calculation unit 248 that obtains a circumferential length of an outline of a columnar pattern on the sample and a value obtained by dividing a square of the circumferential length by a value obtained by multiplying an area surrounded by the outline and 4π as a second index.
JUNG et al. (US 20160189369 A1) - A defect detecting method includes generating an actual image of a pattern on a sample based on irradiation of an electron beam onto the sample, performing a contrast conversion of the actual image to generate a conversion image representing a normal pattern, matching the conversion image and a design image for the pattern, and detecting a defective pattern in the actual image based on matching of the conversion image and the design image. The contrast conversion may be performed for gray levels of pixels in the actual image.
KOOIMAN et al. (US 20220342316 A1) - Described herein is a method of training a model configured to predict whether a feature associated with an imaged substrate will be defective after etching of the imaged substrate and determining etch conditions based on the trained model. The method includes obtaining, via a metrology tool, (i) an after development image of the imaged substrate at a given location, the after development image including a plurality of features, and (ii) an after etch image of the imaged substrate at the given location; and training, using the after development image and the after etch image, the model configured to determine defectiveness of a given feature of the plurality of features in the after development image. In an embodiment, the determining of defectiveness is based on comparing the given feature in the after development image with a corresponding etch feature in the after etch image.
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/ETHAN N WOLFSON/Examiner, Art Unit 2673
/CHINEYERE WILLS-BURNS/Supervisory Patent Examiner, Art Unit 2673