Prosecution Insights
Last updated: October 02, 2026
Application No. 18/528,810

AMPLIFIER CIRCUIT AND RADIO FREQUENCY CIRCUIT

Final Rejection §102§103
Filed
Dec 05, 2023
Priority
Jun 10, 2021 — JP 2021-097434 +1 more
Examiner
RAHMAN, HAFIZUR
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., Ltd.
OA Round
2 (Final)
93%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allowance Rate
700 granted / 750 resolved
+25.3% vs TC avg
Moderate +9% lift
Without
With
+8.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
36 currently pending
Career history
775
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
45.8%
+5.8% vs TC avg
§102
35.1%
-4.9% vs TC avg
§112
13.1%
-26.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 750 resolved cases

Office Action

§102 §103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Response to Arguments Applicant's arguments filed on 6 July 2026 have been fully considered but they are not persuasive. Applicant argues that the rejection of Claim 1 is inconsistent with the structural recitations of the claim and that the mapping of "a second amplifier" onto two distinct physical amplifiers in Kuriyama et al. ("Kuriyama") is improper. Applicant further argues that the move to a 3-transformer architecture is not a routine scaling of the teachings in Kuriyama. These arguments are unpersuasive. Applicant contends that mapping a single "second amplifier" element to two physically distinct amplifiers (1 and 3) in Kuriyama’s Figure 5 is improper. This argument is rejected. In the context of radio frequency (RF) amplifier design, an "amplifier" element often refers to a functional stage. Kuriyama’s Figure 5 explicitly teaches amplifiers 1 and 3 performing a collective peak-amplification function, which serves as the functional equivalent of the "second amplifier" in the claimed topology. The structural mapping used in the Detailed Action correctly identifies these components as a single functional block. Furthermore, the point at which the transmission line connects in the reference satisfies the claimed requirement, regardless of whether that node is joined before or after the individual transistor output stages. Applicant further asserts that the move to a 3-transformer architecture is not a routine scaling of the disclosed topology. This is unpersuasive. Obviousness does not require the prior art to explicitly disclose the exact 3-transformer embodiment; it requires that the transition be obvious to a Person Having Ordinary Skill in the Art (PHOSITA) based on the teachings of the reference. Kuriyama provides a clear roadmap for scaling amplifier/transformer pairs to achieve higher performance (compare Fig. 5 to Fig. 6). Adapting this topology for three amplifiers is a predictable design choice that follows the scaling principles established in the reference. Claim Rejections - 35 USC 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section: A person shall be entitled to a patent unless -- (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 3, 4, 5, 6, 7, and 8 are rejected under 35 U.S.C. 102(a)(1) as anticipated by JP 2013-85179 (Kuriyama et al., 'the reference'). PNG media_image1.png 245 275 media_image1.png Greyscale Fig. 5 of Kuriyama reproduced for ease of reference. Regarding Claim 1, the reference teaches (Fig. 5, circuit 200) an amplifier circuit comprising: a first output terminal (101) and a second output terminal (102): Tout1 (first output terminal) and Tout2 (second output terminal) as shown in Fig. 5. a first amplifier (11), a second amplifier (12), and a third amplifier (13): Amplifier 2 (first amplifier), the collective combination of Amplifiers 1 and 3 (second amplifier), and Amplifier 4 (third amplifier), all integrated within die boundary D1 as shown in Fig. 5. a first transformer (21) including a first input-side coil and a first output-side coil: Transformer T1 of Fig. 5, comprising primary coil T1a (first input-side coil) and secondary coil T1b (first output-side coil). a second transformer (22) including a second input-side coil and a second output-side coil: Transformer T2 of Fig. 5, comprising primary coil T2a (second input-side coil) and secondary coil T2b (second output-side coil). a transmission line (31) connected to an output terminal of the second amplifier (12): The L1-L2-C1-C2 network of Fig. 5 is connected to the combined output of Amplifiers 1 and 3 (second amplifier) and functions as the transmission line. a first end of the first input-side coil (T1a) connected to an output terminal of the first amplifier (Amplifier 2): As shown in Fig. 5, one end of T1a is connected to the output of Amplifier 2 via phase shifter section PS1b1. a second end of the first input-side coil (T1a) connected to the output terminal of the second amplifier via the transmission line: As shown in Fig. 5, the other end of T1a is connected to the combined output of Amplifiers 1 and 3 (second amplifier) via the L1-C1 section of the L1-L2-C1-C2 transmission line network. a first end of the second input-side coil (T2a) connected to an output terminal of the third amplifier (Amplifier 4): As shown in Fig. 5, one end of T2a is connected to the output of Amplifier 4 (third amplifier) via phase shifter section PS1b2. a second end of the second input-side coil (T2a) connected to the output terminal of the second amplifier via the transmission line: As shown in Fig. 5, the other end of T2a is connected to the combined output of Amplifiers 1 and 3 (second amplifier) via the L2-C2 section of the L1-L2-C1-C2 transmission line network. Accordingly, both transformer input-side coils share the same second amplifier connection point via the transmission line, as claimed. a first end of the first output-side coil (T1b) connected to the first output terminal (Tout1): As shown in Fig. 5, one end of T1b is connected to Tout1. a second end of the first output-side coil (T1b) connected to ground: As shown in Fig. 5, the other end of T1b is connected to ground. a first end of the second output-side coil (T2b) connected to the second output terminal (Tout2): As shown in Fig. 5, one end of T2b is connected to Tout2. a second end of the second output-side coil (T2b) connected to ground: As shown in Fig. 5, the other end of T2b is connected to ground. In regards to the amendment to Claim 1, which adds the limitation that "the transmission line is connected to a path between the second end of the first input-side coil and the second end of the second input-side coil," Kuriyama shows in Figure 5, the transmission line network (L1-L2-C1-C2) provides a signal path that connects to the inputs of both transformers T1 and T2, exactly as recited in the amendment. Regarding Claim 2, the reference further teaches (Fig. 5) that each of the first amplifier (Amplifier 2) and third amplifier (Amplifier 4) is a carrier amplifier, and the second amplifier (Amplifiers 1 and 3 collectively) is a peak amplifier. The reference discloses a Doherty-type power amplification architecture wherein the outer amplifiers (Amplifiers 2 and 4) operate as carrier amplifiers biased for continuous conduction, while the inner amplifiers (Amplifiers 1 and 3, collectively forming the second amplifier) operate as peak amplifiers that provide additional power at high input signal levels. This Doherty carrier/peak configuration is inherent to and expressly disclosed in the reference's circuit 200 of Fig. 5. Regarding Claim 3, the reference teaches (Fig. 5, circuit 200) that the first amplifier (Amplifier 2, receiving signal at Tin2) is configured to amplify a signal in a first band; the third amplifier (Amplifier 4, receiving signal at Tin4) is configured to amplify a signal in a second band; and the second amplifier (Amplifiers 1 and 3 collectively, receiving signals at Tin1 and Tin3) is configured to amplify a signal in the first band and a signal in the second band simultaneously. The reference discloses that circuit 200 is a dual-band amplifier circuit wherein the central peak amplifiers (1 and 3) handle both frequency bands while carrier amplifiers 2 and 4 are each dedicated to one respective band. Regarding Claim 4, the reference teaches (Fig. 5) that signals in the first band amplified by the first amplifier (Amplifier 2) and the second amplifier (Amplifiers 1 and 3) are output via the first output terminal (Tout1) through transformer T1; and the signals in the second band amplified by the second amplifier (Amplifiers 1 and 3) and the third amplifier (Amplifier 4) are output via the second output terminal (Tout2) through transformer T2. The reference shows Tout1 as the dedicated first-band output and Tout2 as the dedicated second-band output, consistent with the dual-band Doherty architecture of circuit 200. Regarding Claim 5, the reference teaches (Fig. 5) that the transmission line (L1-L2-C1-C2) includes inductors (L1 and L2) and capacitors (C1 and C2), thereby satisfying the limitation that the transmission line includes at least one of an inductor and a capacitor. The transmission line network of Fig. 5 explicitly comprises both inductive and capacitive elements as shown. Regarding Claim 6, the reference teaches (Fig. 5) that the transmission line comprises: a first transmission line connected between the output terminal of the second amplifier (Amplifiers 1 and 3) and the second end of the first input-side coil (T1a): the L1-C1 portion of the transmission line network of Fig. 5, which connects from the output of Amplifiers 1 and 3 to the corresponding end of T1a; and a second transmission line connected between the output terminal of the second amplifier (Amplifiers 1 and 3) and the second end of the second input-side coil (T2a): the L2-C2 portion of the transmission line network of Fig. 5, which connects from the output of Amplifiers 1 and 3 to the corresponding end of T2a. Regarding Claim 7, the reference teaches (Fig. 5, boundary D1) that the first amplifier (Amplifier 2), the second amplifier (Amplifiers 1 and 3), and the third amplifier (Amplifier 4) are all included in one integrated circuit (die boundary D1 is explicitly shown enclosing all amplifiers in Fig. 5). Furthermore, in the plan view of the integrated circuit as shown in Fig. 5, the second amplifier (Amplifiers 1 and 3, positioned centrally in the layout) is disposed between the first amplifier (Amplifier 2, positioned at the top) and the third amplifier (Amplifier 4, positioned at the bottom). Amplifiers 1 and 3 occupy the central layout positions between Amplifiers 2 and 4 as shown. Regarding Claim 8, the reference teaches the amplifier circuit of Claim 7 as shown in Fig. 5. The reference further discloses (Fig. 1, system 1000) a wireless communication device incorporating a power amplifier circuit connected to an antenna, wherein bandpass filtering elements are provided at the output of the power amplifier to pass the desired frequency band and reject out-of-band signals. The first filter connected to the first output terminal (Tout1) with a pass band including the first band, and the second filter connected to the second output terminal (Tout2) with a pass band including the second band, are taught by the reference's disclosure of the dual-band RF system architecture including filtering at each band-specific output. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 9-20 are rejected under 35 U.S.C. 103 as unpatentable over JP 2013-85179 (Kuriyama et al., 'the reference'). Background for Claim 9 Obviousness Analysis: The reference teaches circuit 200 (Fig. 5) comprising three functional amplifier groups (Amplifier 2, Amplifiers 1+3 collectively, and Amplifier 4), two transformers (T1 and T2), and a shared transmission line (L1-L2-C1-C2), as set forth in the Claim 1-8 rejections above. The reference additionally teaches circuit 300 (Fig. 6) as an extended version employing four transformers (T1-T4) and eight amplifiers to achieve wider bandwidth and higher output power. The progression from the basic 2-transformer circuit 100 (Fig. 2) to the 2-transformer/4-amplifier circuit 200 (Fig. 5) to the 4-transformer/8-amplifier circuit 300 (Fig. 6) demonstrates that the reference expressly teaches scalable combining architectures. A person of ordinary skill in the art would have recognized from the teachings of the reference that a 3-transformer architecture with three individual amplifiers and three separate transmission lines represents an intermediate, routine scaling step between the 2-transformer (Fig. 5) and 4-transformer (Fig. 6) embodiments. Regarding Claim 9, the reference renders all limitations obvious. The reference teaches (Fig. 5) the combination of three amplifiers, two transformers, a shared transmission line, and two output terminals. Claims 9 departs from the Fig. 5 topology in three respects: (i) it requires three transformers instead of two; (ii) it requires each amplifier to have its own dedicated transmission line rather than a shared one; and (iii) it requires the second ends of the input-side coils to connect to ground rather than to the shared transmission line, with the output-side coils connected in series between the two output terminals rather than each independently connected to ground. It would have been obvious to a person of ordinary skill in the art to modify the circuit 200 of Fig. 5 to provide each amplifier with its own dedicated transformer and transmission line, in light of the following teachings of the reference: (a) Fig. 2 (circuit 100) of the reference shows a single transformer secondary winding spanning directly between a first output terminal and a second output terminal (not grounded), which is the foundational topology upon which the series-connected output coil configuration of Claim 9 is based; (b) Fig. 6 (circuit 300) of the reference shows that the same design principle scales to four separate transformer units; and (c) the description of the reference teaches that individual transmission line elements per amplifier provide independent impedance matching for each amplifier, which is a well-known and desirable design objective. Providing three transformers, one per amplifier, with the output-side coils series-connected between the two output terminals, is an obvious design choice that follows directly from the architecture of circuit 100 (Fig. 2) scaled to three amplifiers as taught by circuit 300 (Fig. 6). Specifically, the reference teaches: a first output terminal and a second output terminal: Tout1 and Tout2, as in Fig. 5. a first amplifier, a second amplifier, and a third amplifier: Amplifier 2 (first), Amplifiers 1+3 collectively (second), and Amplifier 4 (third), as in Fig. 5. a first, second, and third transformer: The reference teaches T1 and T2 in Fig. 5, and T1-T4 in Fig. 6. Modifying Fig. 5 to include a third dedicated transformer T3 for the third amplifier follows directly from the scaling principle taught by Fig. 6. a first, second, and third transmission line connected to respective amplifier outputs: The reference teaches L1-C1 and L2-C2 as dedicated transmission line segments in Fig. 5. Providing a third dedicated transmission line for the third amplifier follows from the same design principle. second ends of each input-side coil connected to ground: The reference teaches (Fig. 2) a primary winding with one end at a power supply and the other end at the amplifier output. In the Fig. 5 topology, grounding the second end of each individual input-side coil in a 3-transformer configuration is the natural design choice for isolated single-ended transformer coupling, as recognized by persons of ordinary skill in the art. output-side coils connected in series between the two output terminals: The reference teaches (Fig. 2, secondary winding) that the output coil spans between the first signal output terminal and the second signal output terminal. Extending this to three series-connected output coils spanning from the first output terminal to the second output terminal, as done in circuit 300 (Fig. 6), is explicitly taught or strongly suggested by the reference. Accordingly, it would have been obvious to one of ordinary skill in the art to arrive at the amplifier circuit of Claim 9. Regarding Claim 10, the reference teaches (Fig. 5) that the first amplifier (Amplifier 2) and third amplifier (Amplifier 4) are carrier amplifiers and the second amplifier (Amplifiers 1 and 3 collectively) is a peak amplifier, for the same reasons as set forth regarding Claim 2. The same mapping applies to the 3-transformer variant of Claim 9. Claim 10 would have been obvious for the same reasons as Claim 9, with the additional Doherty carrier/peak characterization taught as discussed for Claim 2. Regarding Claim 11, the reference teaches (Fig. 5, circuit 200) the dual-band amplification arrangement wherein the first amplifier amplifies a signal in a first band, the third amplifier amplifies a signal in a second band, and the second amplifier amplifies signals in both the first and second bands, for the same reasons as set forth regarding Claim 3. This same band-assignment teaching applies equally to the 3-transformer topology of Claim 9. Claim 11 would have been obvious for the same reasons as Claim 9. Regarding Claim 12, the reference teaches (Fig. 5) that signals in the first band amplified by the first amplifier (Amplifier 2) and the second amplifier (Amplifiers 1+3) are routed via the first output terminal (Tout1), and signals in the second band amplified by the second amplifier and the third amplifier (Amplifier 4) are routed via the second output terminal (Tout2), for the same reasons as set forth regarding Claim 4. This output routing applies equally to the 3-transformer topology of Claim 9. Claim 12 would have been obvious for the same reasons as Claim 9. Regarding Claim 13, the reference teaches (Fig. 5) that the transmission line includes inductors (L1) and capacitors (C1), satisfying the requirement that the first transmission line includes at least one of an inductor and a capacitor, for the same reasons as set forth regarding Claim 5. In the 3-transmission-line topology of Claim 9, each dedicated transmission line would likewise include at least one inductor or capacitor following the same design principle. Claim 13 would have been obvious for the same reasons as Claim 9. Regarding Claim 14, the reference teaches (Fig. 5) that the transmission line network includes inductors and capacitors (L2, C2) for the second transmission line section, satisfying the requirement that the second transmission line includes at least one of an inductor and a capacitor. In the 3-transmission-line topology of Claim 9, the second dedicated transmission line would likewise include at least one inductor or capacitor. Claim 14 would have been obvious for the same reasons as Claim 9. Regarding Claim 15, the reference teaches (Fig. 5) the use of inductors and capacitors in the transmission line network. In extending to a third dedicated transmission line for the third amplifier in the 3-transformer topology of Claim 9, it would have been obvious to include at least one inductor and/or capacitor in the third transmission line consistent with the design of the first and second transmission lines, for impedance matching purposes as taught throughout the reference. Claim 15 would have been obvious for the same reasons as Claim 9. Regarding Claim 16, the reference teaches (Fig. 5) capacitors C1 and C2 disposed in the transmission line network between amplifier output nodes and transformer input coil ends. A person of ordinary skill in the art would have recognized that a capacitor connected between the second end of the first output-side coil and the first end of the second output-side coil (i.e., a shunt capacitor at the junction between serially-connected output coils) provides impedance tuning and bandwidth improvement to the output combining network. Such shunt capacitors at output coil junctions are a routine circuit design technique well known to persons of ordinary skill in the art, and are rendered obvious by the reference's teaching of using capacitive elements (C1, C2) throughout the combining network. Claim 16 would have been obvious. Regarding Claim 17, the reference teaches (Fig. 5) the use of capacitors at multiple nodes in the combining network. A capacitor connected between the second end of the second output-side coil and the first end of the third output-side coil provides the same impedance tuning function as the capacitor of Claim 16 applied to the next junction in the series-connected output coil chain. Adding such a capacitor at each junction between serially-connected output coils is the obvious symmetric extension of the capacitor configuration taught for the first junction by Claim 16. Claim 17 would have been obvious. Regarding Claim 18, the reference teaches (Fig. 5) capacitors disposed throughout the amplifier combining network. A capacitor connected directly across the second output-side coil (one end at the first end of T2b and the other at the second end of T2b) constitutes a shunt capacitor placed in parallel with the output-side coil for resonance tuning and bandwidth enhancement. Such parallel resonant capacitor placement is a standard RF circuit technique rendered obvious by the reference's teaching of capacitors C1, C2 in the network, and by the general knowledge of persons of ordinary skill in the art regarding transformer resonance tuning. Claim 18 would have been obvious. Regarding Claim 19, the reference teaches (Fig. 5, boundary D1) that all three amplifiers are included in one integrated circuit and that, in plan view of the integrated circuit, the second amplifier (Amplifiers 1 and 3, centrally disposed) is positioned between the first amplifier (Amplifier 2) and the third amplifier (Amplifier 4), for the same reasons as set forth regarding Claim 7. This IC integration and layout applies equally to the 3-transformer topology of Claims 9-18. Claim 19 would have been obvious for the same reasons as Claim 9. Regarding Claim 20, the reference teaches (Fig. 1, system 1000) a radio frequency circuit incorporating the power amplification circuit connected through a duplexer/filter to an antenna for wireless communication. The addition of a first filter connected to the first output terminal with a pass band including the first band, and a second filter connected to the second output terminal with a pass band including the second band, is taught by the reference's multi-band RF system architecture and is further obvious to a person of ordinary skill in the art as standard practice in dual-band RF front-end design. The amplifier circuit of Claim 9 is taught as discussed above, and the addition of output bandpass filters at each output terminal is an obvious design choice. Claim 20 would have been obvious.[AltContent: textbox (12)] Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAFIZUR RAHMAN whose telephone number is (571)270-0659. The examiner can normally be reached M-F: 10-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached on (571) 272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HAFIZUR RAHMAN/Primary Examiner, Art Unit 2843.
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Prosecution Timeline

Dec 05, 2023
Application Filed
Apr 07, 2026
Non-Final Rejection mailed — §102, §103
Jul 06, 2026
Response Filed
Jul 21, 2026
Final Rejection mailed — §102, §103
Sep 15, 2026
Interview Requested
Sep 23, 2026
Applicant Interview (Telephonic)
Sep 23, 2026
Examiner Interview Summary

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Prosecution Projections

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Expected OA Rounds
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Grant Probability
99%
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2y 1m (~0m remaining)
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