DETAILED ACTION
Claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgement is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d) to Korean Patent Application No. 10-2022-0182233, filed on 12/22/2022.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
With regard to claim 1, this claim recites ‘selecting a control factor from among multiple process factors of the selected process’ that is not clear. It is not clear that the ‘multiple process factors’ comprise ‘a control factor’ that may then be selected. In addition, there is no antecedent basis for ‘the selected process’.
With regard to claim 2, this claim recites ‘infer process factors, from among all the process factors belonging to the plurality of processes, that affect quality more than other control factors of the all control factors’ that is not clear. In addition, there is no antecedent basis for ‘the all control factors’.
With regard to claim 4, this claim recites ‘to be respective vectors of the plurality of embedding vectors having a preset size’ and ‘provided an output vector of the transformer encoder that is provided the plurality of embedding vectors’ neither of which is clear.
With regard to claim 11, this claim recites ‘select a control factor from among multiple process factors of the selected process’ that is not clear. It is not clear that the ‘multiple process factors’ comprise ‘a control factor’ that may be selected. In addition, there is no antecedent basis for ‘the selected process’.
With regard to claim 12, this claim recites ‘infer process factors, from among all the process factors belonging to the plurality of processes, that affect quality more than other control factors of the all control factors’ that is not clear. In addition, there is no antecedent basis for ‘the all control factors’.
With regard to claim 14, this claim recites ‘to be respective vectors of the plurality of embedding vectors having a preset size’ and ‘provided an output vector of the transformer encoder that is provided the plurality of embedding vectors’ neither of which is clear.
With regard to claim 20, this claim recites ‘for each of wafers’ that is unclear.
The dependent claims are also rejected under 35 U.S.C. § 112 as they inherit all of the characteristics of the claim from which they depend and none of the dependent claims provide a cure for the indefiniteness of the parent claims.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim(s) 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a non-statutory subject matter. The claims do not fall within at least one of the four categories of patent eligible subject matter because the claimed invention is directed to the abstract idea (mental process) of selecting a control process and control factor based on data.
Claim 1 recites a processor-implemented method, i.e. a process, which is a statutory category of invention. The claim recites:
generating sequence data based on measured values of respective one or more process factors of each of a plurality of processes…;
generating a temporary quality index of the wafer using a second neural network connected to a first neural network that is provided the sequence data;
selecting a control process from among the plurality of processes…;
selecting a control factor from among multiple process factors of the selected process that may be performed in the human mind, or by a human using a pen and paper. Thus the claim recites an abstract idea (mental processes), see MPEP 2106.04(a).
This judicial exception is not integrated into a practical application because the additional elements, i.e. a processor-implemented method (applying the exception with generic computer technology, see MPEP 2106.04(a)(2) III C), a semiconductor fabrication process for a wafer within the semiconductor fabrication process (generally linking the use of the judicial exception to a particular technological environment or field of use, see MPEP 2106.05(h)), and training the first neural network and the second neural network based on a loss between the temporary quality index and a set actual quality index of the wafer and using at least one of the trained first neural network and/or the trained second neural network (applying the exception with generic computer technology with a well-known algorithm, see MPEP 2106.04(a)(2) III C) do not impose any meaningful limits on practicing the abstract idea. The claim is therefore directed to an abstract idea.
Note that semiconductor fabrication processes for a wafer are well-understood, routine and conventional, see for example Kagalwala et al. U.S. Patent Publication No. 20200409345 [0036] and neural networks, including transformer encoders, multi-layer perceptrons and self-attention, are well-understood, routine and conventional, see for example Gross et al. U.S. Patent Publication No. 20210256389 [0020], Redmond et al. U.S. Patent Publication No. 20210342730 [0131] and Ren et al. U.S. Patent Publication No. 20210158127 [0050].
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, a processor-implemented method (applying the exception with generic computer technology, see MPEP 2106.04(a)(2) III C), a semiconductor fabrication process for a wafer within the semiconductor fabrication process (generally linking the use of the judicial exception to a particular technological environment or field of use, see MPEP 2106.05(h)), and training the first neural network and the second neural network based on a loss between the temporary quality index and a set actual quality index of the wafer and using at least one of the trained first neural network and/or the trained second neural network (applying the exception with generic computer technology with a well-known algorithm, see MPEP 2106.04(a)(2) III C) are not considered significantly more. Considering the additionally elements individually and in combination and the claim as a whole, the additional elements do not provide significantly more than the abstract idea. Thus the claim is not patent eligible.
Claim 2 recites ‘the first neural network is trained to infer process factors, from among all the process factors belonging to the plurality of processes, that affect quality more than other control factors of the all control factors’ (mental process applied using known computer technology). Thus this claim recites an abstract idea.
Claim 3 recites ‘transformer encoder; and a multi-layer perceptron (MLP)’ applying the exception with generic computer technology, see MPEP 2106.04(a)(2) III C). Thus this claim recites an abstract idea.
Claim 4 recites ‘correcting the generated sequence data in response to inputting the sequence data to the first neural network; generating, by the second neural network, a plurality of embedding vectors by performing linear projection on each of the corrected sequence data to be respective vectors of the plurality of embedding vectors having a preset size; and generating, by the second neural network, the temporary quality index of the wafer using the MLP provided an output vector of the transformer encoder that is provided the plurality of embedding vectors’ (mental process applied using generic computer technology, see MPEP 2106.04(a)(2) III C). Thus this claim recites an abstract idea.
Claim 5 recites ‘positional encoding on each of the plurality of embedding vectors; and provides embedding vectors obtained through the positional encoding to the transformer encoder’ (mental process applied using generic computer technology, see MPEP 2106.04(a)(2) III C). Thus this claim recites an abstract idea.
Claim 6 recites ‘the transformer encoder comprises: a plurality of encoders, each encoder comprising a multi-head attention layer configured to perform self-attention at least once, the plurality of encoders being connected in series’ (applying the exception with generic computer technology, see MPEP 2106.04(a)(2) III C). Thus this claim recites an abstract idea.
Claim 7 recites ‘performing the training of the first neural network and the second neural network together; and retraining the second neural network using the trained first neural network’ (applying the exception with generic computer technology, see MPEP 2106.04(a)(2) III C). Thus this claim recites an abstract idea.
Claim 8 recites ‘selecting a preset number of processes as the control process from among the plurality of processes, in a descending order from a corresponding process that has a greatest number of respective process factors selected by the trained first neural network’ (mental process). Thus this claim recites an abstract idea.
Claim 9 recites ‘calculating a respective score indicating an interaction between a corresponding process and other processes for each of plural wafers using a transformer encoder of the trained second neural network; calculating an average of the respective scores as a respective final score of the corresponding process; and selecting a preset number of select processes as the control process from among the plurality of processes, in a descending order from a process having a highest respective final score’ (mental and/or mathematical process). Thus this claim recites an abstract idea.
Claim 10 recites ‘for each of some process factors selected by the trained first neural network from among all the process factors of the plurality of processes: calculating a Shapley value of a corresponding process factor for each of plural wafers using a transformer encoder of the trained second neural network; calculating an average of absolute values of the Shapley values calculated for plural wafers as a respective final score of the corresponding process factor; and selecting a preset number of select process factors as the control factor from among the some process factors in a descending order according to the respective final score of the select process factors from a process factor having a highest respective final score’ (mental and/or mathematical process). Thus this claim recites an abstract idea.
Claim 11 recites an electronic device, i.e. a machine, which is a statutory category of invention. However, the process performed by the electronic device is similar to that recited in claim 1 and is rejected under the same rationale. Note that processors are considered merely applying the exception with generic computer technology – see MPEP 2106.04(a)(2) III C.
Claims 12-20 recite similar limitations to claims 2-10 and are rejected under the same respective rationales.
Citation of Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Houge et al. U.S. Patent Publication No. 20030062339 discloses a semiconductor processing system using multiple neural networks that generates a quality value.
Baseman et al. U.S. Patent Publication No. 20240047279 discloses a computer-implemented method for using sequence mining to predict quality and yield for a semiconductor process.
Helterhoff et al. U.S. Patent Publication No. 20240144043 discloses a method for training a machine-learning module of a computer-implemented prediction model for predicting product quality parameter values for one or more quality parameters of a product produced by a production plant.
Note that any citations to specific, pages, columns, lines, or figures in the prior art references and any interpretation of the reference should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. See MPEP 2123.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BERNARD G. LINDSAY whose telephone number is (571)270-0665. The examiner can normally be reached Monday through Friday from 8:30 AM to 5:30 PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mohammad Ali can be reached on (571)272-4105. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BERNARD G LINDSAY/
Primary Examiner, Art Unit 2119