DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
1. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
2. Claims 1-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Gupta Hyde et al. (Pub. No. US20190051642)
As per claim 1, Gupta Hyde discloses a processing system (fig.8, processor platform 800), comprising:
a plurality of hardware components (fig.4, multiple compute circuits 402); and
an operational parameter tuning circuit (fig.1, AI architecture circuitry 138) configured to:
perform, during a first time interval (paragraph 35, line 21-22, selective communication at periodic intervals, scheduled intervals, aperiodic intervals, and/or one-time events), a first adjustment action that adjusts one or more operational parameters of at least one hardware component of the plurality of hardware components based on a current state of the at least one hardware component (paragraph 25, lines 6-10, adjust operational parameters associated with the CPU dies, the memory dies, and/or the first additional die based on current circumstances under which the system is operating) and a policy that maps adjustment actions to a plurality of different states for the at least one hardware component (paragraph 26, lines 8-10, the operational parameters may define one of a plurality of different power states that include intermediate states between fully on and fully off (e.g., C0, C1, C2, etc. corresponding to the Advanced Configuration Power Interface (ACPI) standard)).
As per claim 8, Gupta Hyde discloses a method, comprising:
selecting, by an operational parameter tuning circuit during a first time interval (paragraph 35, line 21-22, selective communication at periodic intervals, scheduled intervals, aperiodic intervals, and/or one-time events) and based on a current state of at least one hardware component of a processing system, a first adjustment action from a policy that maps adjustment actions to a plurality of different states for the at least one hardware component(paragraph 25, lines 6-10, adjust operational parameters associated with the CPU dies, the memory dies, and/or the first additional die based on current circumstances under which the system is operating); and
performing, by the operational parameter tuning circuit during the first time interval, the first adjustment action to adjust one or more operational parameters of the at least one hardware component(paragraph 26, lines 13-17, the operational parameters may define the power gating and/or shutting off of modem components (e.g., RX/TX chains) of communications circuitry (e.g., associated with a 5G chip, a 4G chip, etc.) based on the amount of information being exchanged over a network as determined by a current usage of the system and corresponding workload).
As per claims 2,9, Gupta Hyde discloses wherein the operational parameter tuning circuit is further configured to: perform, during a second time interval, a second adjustment action that adjusts the one or more operational parameters based on a new current state of the at least one hardware component and the policy (paragraph 26, lines 13-17, the operational parameters may define the power gating and/or shutting off of modem components (e.g., RX/TX chains) of communications circuitry (e.g., associated with a 5G chip, a 4G chip, etc.) based on the amount of information being exchanged over a network as determined by a current usage of the system and corresponding workload.)
As per claims 3, 10, Gupta Hyde discloses wherein the operational parameter tuning circuit is further configured to: update the policy in response to a change in execution behavior of the at least one hardware component resulting from the first adjustment action (paragraph 37, line 6, update the assigned values as workload conditions change)
As per claims 4, 11, Gupta Hyde discloses wherein the operational parameter tuning circuit is configured to update the policy by: receiving a reward signal indicating a positive execution behavior or a negative execution behavior of the at least one hardware component resulting from the first adjustment action. (paragraph 13, lines 28-30, some or all of the AI architecture circuitry is selectively triggered in response to detecting a change in workload for the system and/or a change)
As per claims 5,12, Gupta Hyde discloses wherein the operational parameter tuning circuit is further configured to update the policy by: adjusting a value in the policy representing an expected future cumulative reward associated with the first adjustment action based on the reward signal (paragraph 38, lines 10-12, control units 604 may communicate information to the central power management control unit 602 indicative of whether a larger power budget is needed or if the associated component 606 can perform its designated function with less power.)
As per claims 6, 13, Gupta Hyde discloses wherein the operational parameter tuning circuit is further configured to update the policy by:
computing a gradient of an objective function based on the reward signal and parameters of the policy that determine a likelihood of specific adjustment actions in the policy to be selected (paragraph 13, lines 28-30, some or all of the AI architecture circuitry is selectively triggered in response to detecting a change in workload for the system and/or a change); and
updating the parameters of the policy based on the computed gradient to increase an expected reward from future selections of adjustment actions in the policy (paragraph 38, lines 10-12, control units 604 may communicate information to the central power management control unit 602 indicative of whether a larger power budget is needed or if the associated component 606 can perform its designated function with less power.)
As per claim 7, Gupta Hyde discloses wherein the operational parameter tuning circuit is further configured to: select the first adjustment action from the policy using one or more neural networks (paragraph 47, line 3, a self-learning machine (e.g., a neural network))
As per claim 14, Gupta Hyde discloses wherein selecting the first adjustment action comprises: inputting, by the operational parameter tuning circuit, the current state of at least one hardware component into at least one neural network(paragraph 47, line 3, a self-learning machine (e.g., a neural network)); and outputting, by the neural network, the first adjustment action based on the current state(paragraph 26, lines 13-17, the operational parameters may define the power gating and/or shutting off of modem components (e.g., RX/TX chains) of communications circuitry (e.g., associated with a 5G chip, a 4G chip, etc.) based on the amount of information being exchanged over a network as determined by a current usage of the system and corresponding workload.)
As per claim 15, Gupta Hyde discloses a method, comprising: selecting, by an operational parameter tuning circuit during a first time interval (paragraph 35, line 21-22, selective communication at periodic intervals, scheduled intervals, aperiodic intervals, and/or one-time events) and based on a current state of a memory controller (fig.8, the processor 812) of a processing system (fig.8, processor platform 800), a first adjustment action from a policy that maps adjustment actions to a plurality of different states for memory controller(paragraph 25, lines 6-10, adjust operational parameters associated with the CPU dies, the memory dies, and/or the first additional die based on current circumstances under which the system is operating); and performing, by the operational parameter tuning circuit during the first time interval, the first adjustment action to adjust one or more thresholds for enabling or disabling an opportunistic write-through feature of the memory controller(paragraph 26, lines 13-17, the operational parameters may define the power gating and/or shutting off of modem components (e.g., RX/TX chains) of communications circuitry (e.g., associated with a 5G chip, a 4G chip, etc.) based on the amount of information being exchanged over a network as determined by a current usage of the system and corresponding workload.)
As per claim 16, Gupta Hyde discloses the method further comprising: performing, by the operational parameter tuning circuit during a second time interval, a second adjustment action, that adjusts the one or more thresholds based on a new current state of the memory controller(paragraph 13, lines 28-30, some or all of the AI architecture circuitry is selectively triggered in response to detecting a change in workload for the system and/or a change).
As per claim 17, Gupta Hyde discloses the method further comprising: update, by the operational parameter tuning circuit, the policy in response to a change in execution behavior of the memory controller resulting from the first adjustment action (paragraph 13, lines 28-30, some or all of the AI architecture circuitry is selectively triggered in response to detecting a change in workload for the system and/or a change).
As per claim 18, Gupta Hyde discloses wherein updating the policy comprises: receiving, by the operational parameter tuning circuit, a reward signal indicating a positive execution behavior or a negative execution behavior of the memory controller resulting from the first adjustment action(paragraph 13, lines 28-30, some or all of the AI architecture circuitry is selectively triggered in response to detecting a change in workload for the system and/or a change).
As per claim 19, Gupta Hyde discloses wherein updating the policy comprises: adjusting, by the operational parameter tuning circuit, a value in the policy representing an expected future cumulative reward associated with the first adjustment action based on the reward signal (paragraph 13, lines 28-30, some or all of the AI architecture circuitry is selectively triggered in response to detecting a change in workload for the system and/or a change).
As per claim 20, Gupta Hyde discloses wherein updating the policy comprises: computing, by the operational parameter tuning circuit, a gradient of an objective function based on the reward signal and parameters of the policy that determine a likelihood of specific adjustment actions in the policy to be selected(paragraph 13, lines 28-30, some or all of the AI architecture circuitry is selectively triggered in response to detecting a change in workload for the system and/or a change); and updating, by the operational parameter tuning circuit, the parameters of the policy based on the computed gradient to increase an expected reward from future selections of adjustment actions in the policy (paragraph 34, lines 10-14, updates a power management learning model based on what is learned from previous adjustments to the power budgets and/or operational parameters and the resulting impact on the workload of the components and their associated operational states.)
3. The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Morris et al. [US Patent No. 11,619,933] discloses parameter settings and operational data are received from machines for a current predefined time interval.
Conclusion
4. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIM T HUYNH whose telephone number is (571)272-3635 or via e-mail addressed to [kim.huynh3@uspto.gov]. The examiner can normally be reached on M-F 7.00AM- 4:00PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Tsai Henry can be reached at (571)272-4176 or via e-mail addressed to [Henry.Tsai@USPTO.GOV].
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/K. T. H./
Examiner, Art Unit 2184
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
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