DETAILED ACTION
This correspondence is responsive to the Application filed on December 6, 2023. Claims 1-20 are pending in the case with claims 1, 9 and 17 in independent form.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Summary of Detailed Action
I. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite.
II. Claims 2, 10 and 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite.
III. Claims 5 and 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite.
IV. Claims 5 and 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite.
V. Claims 5 and 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite.
VI. Claims 8 and 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Claims 1, 8-9 and 16-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Scheidegger et al.
Claims 7 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Scheidegger et al., and further in view of Wen et al.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
I. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The term “relatively highest degree of adherence” in independent claims 1, 9, and 17 is a relative term which renders the claim indefinite. The term “relatively highest degree of adherence” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Applicant may cancel claims 1, 9 and 17 or amend claims 1, 9, and 17 to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 2-8, 9-16 and 18-20 depend from claims 1, 9 and 17 respectively and are rejected for the same reasons discussed above with respect to claims 1, 9 and 17.
II. Claims 2, 10 and 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Dependent claims 2, 10 and 18 recite populating a predetermined neural network architecture search (NAS) “framework” with search space parameters as a predetermined kernel level for a search space that includes a predetermined baseline model architecture. It is not clear what a predetermined neural network architecture search (NAS) “framework” is or is not. For example, is a predetermined neural network architecture search (NAS) “framework” a query? Or is a predetermined neural network architecture search (NAS) “framework” an interface? Or a predetermined neural network architecture search (NAS) “framework” an application? Or is a predetermined neural network architecture search (NAS) “framework” a system? Or is a predetermined neural network architecture search (NAS) “framework” something else entirely?
Applicant may cancel claims 2, 10 and 18 or amend claims 2, 10 and 18 to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
III. Claims 5 and 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites the limitation “the memory constraints of model tasks of the initial edge devices.” There is insufficient antecedent basis for this limitation in the claim. The Examiner notes that, while claims 1 and 3 from which claim 5 depends, include the “memory constraints of the initial devices,” neither claims 1 or 3 recite “model tasks” or “memory constraints of model tasks of the initial edge devices.”
Claim 13 also recites the limitation “the memory constraints of model tasks of the initial edge devices.” There is insufficient antecedent basis for this limitation in the claim. The Examiner notes that, while claims 9 and 11 from which claim 13 depends, include the “memory constraints of the initial devices,” neither claims 9 or 11 recite “model tasks” or “memory constraints of model tasks of the initial edge devices.”
Applicant may cancel claims 5 and 13 or amend claims 5 and 13 to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
IV. Claims 5 and 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Dependent claims 5 and 13 recite “evenly selecting” a plurality of memory constraint bins “across a memory spectrum” of “the memory constraints of model tasks” of the initial edge devices. It is not clear what “evenly selecting” means or includes or does not include. For example, does evenly selecting mean selecting an equal number, or selecting an average number, or selecting within a certain number range, or selecting a certain percentage of memory constraint bins for each of the memory constraints? Or does evenly selecting mean something else entirely? It is further unclear what “across a memory spectrum of the memory constraints” means or includes or does not include. For example, does evenly selecting across a memory spectrum of the memory constraints mean selecting across a memory spectrum in uniform intervals, distributions, or proportions across the memory spectrum of memory constraints? Or does evenly selecting across a memory spectrum of memory constraints mean something else entirely? Applicant may cancel claims 5 and 13 or amend claims 5 and 13 to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
V. Claims 5 and 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Dependent claims 5 and 13 recite wherein each of the identified possible Al model architectures is identified by the NAS framework to have “a potential” for outperforming the other possible Al model architectures within the same memory constraint bin. It is not clear to “have a potential for outperforming” the other possible AI model architectures means or includes or does not include. For example, does have a potential for outperforming mean having a potential architecture for outperforming? Or does have a potential for outperforming mean having a potential under certain conditions for outperforming? Or does have a potential for outperforming mean having a potential under any conditions at all for outperforming? Or does have a potential for outperforming mean having a potential in certain model tasks for outperforming? Or does have a potential for outperforming mean having a potential in any model tasks for outperforming? Or does have a potential for outperforming mean having a potential regarding a certain metric or any metric at all for outperforming? Thus, the boundaries of the claims are unclear and claims are indefinite. Applicant may cancel claims 5 and 13 or amend claims 5 and 13 to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
VI. Claims 8 and 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Dependent claims 8 and 16 recite causing “a predetermined AI-latency-interference-framework” to derive a latency requirement to use for determining the one of the possible AI model architectures with the relatively highest degree of adherence to constraints of the first edge device. It is not clear what a predetermined AI-latency-interference-framework is or includes or does not include. For example, is a predetermined AI-latency-interference-framework a computer software process or program or a system or an interface or a search or a calculation or a simulation or all of the above or any of the above? Or is a predetermined AI-latency-interference-framework something else entirely that is able to derive a latency requirement to use for determining the one of the possible AI model architectures with the relatively highest degree of adherence to constraints of the first edge device. It is further unclear how a predetermined AI-latency-interference-framework derives a latency requirement to use for determining the one of the possible AI model architectures with the relatively highest degree of adherence to constraints of the first edge device. Applicant may cancel claims 8 and 16 or amend claims 8 and 16 to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim(s) recite(s) subject matter a general, high-level of a method comprising determining, based on capacity profiling information and descriptions associated with a plurality of initial edge devices, a plurality of possible AI model architectures that fulfill memory constraints of the initial edge devices; generating a pareto-optimal configuration curve based on a sub-set of the possible AI model architectures; using the pareto-optimal configuration curve to determine one of the possible AI model architectures with a relatively highest degree of adherence to constraints of the first edge device, which are mental processes or concepts that can be performed in the human mind, including observation, evaluation, judgment or opinion, or by a human using pen and paper (MPEP 210604(a)(2)(III) and mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations. This judicial exception is not integrated into a practical application and the claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception
Claims 1-20 recite one of the four statutory categories of patent able subject matter and belong to the statutory class(es) of a process (method claims 1-8), a machine (system/apparatus claims 17-20), and an article of manufacture (non-transitory computer readable media claims 9-16).
Claim 1 recites a method, thus a process and one of the four statutory categories of patentable subject matter. However, claim 1 further recites comprising determining, based on capacity profiling information and descriptions associated with a plurality of initial edge devices, a plurality of possible AI model architectures that fulfill memory constraints of the initial edge devices (mental processes); generating a pareto-optimal configuration curve based on a sub-set of the possible AI model architectures (mathematical concepts); using the pareto-optimal configuration curve to determine one of the possible AI model architectures with a relatively highest degree of adherence to constraints of the first edge device (mental processes, mathematical concepts), which are mental processes or concepts that can be performed in the human mind, including observation, evaluation, judgment or opinion, or by a human using pen and paper (MPEP 210604(a)(2)(III)) and mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations (MPEP 210604(a)(2)(I)).
The claim does not include any additional elements which integrate the abstract idea into a practical application since the additional elements consist of:
computer-implemented (an additional element merely recites the words “apply it” (or an equivalent) with the judicial exception, or merely includes instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. See also, MPEP 2106.05(f), MPEP 2106.04(d), 2019 Guidance, 84 FR 50 at 55, footnote 30.).
in response to receiving a request for determining an AI model architecture for a first edge device (An additional element of extra-solution activity that courts have identified is well understood, routine and conventional activity for receiving or transmitting data over a network, e.g., using the internet to gather data. See also, MPEP 2106.05(d)(II), MPEP 2106.05(g), 2019 Guidance, 84 FR 50 at 55, 2019 Guidance, 84 FR 50, footnote 31.)
causing the determined AI model architecture to be deployed to the first edge device (This additional element amounts to merely the words to “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. MPEP 2106.05(f).) Also, this additional element amounts to no more than generally linking the use of the judicial exception to a particular technologic environment or field of use - The application or use of the judicial exception in this manner does not meaningfully limit the claim by going beyond generally linking the use of the judicial exception to a particular technological environment. MPEP 2106.05(h)).
Thus, the claim is directed to the abstract idea.
Further, the additional elements, alone or in combination, do not provide significantly more than the abstract idea itself, because implementation on a computer (MPEP 2106.05(f)) cannot provide significantly more, and transmitting data over a network is well-understood, routine and conventional (MPEP 2106.05(d), and generally linking the use of the judicial exception to a particular technological field of use does not meaningfully limit the claims (MPEP 2106.04(d)) and the combination of additional elements does not provide an inventive concept. Thus, the claim is ineligible.
Claim 2, dependent on claim 1, recites only additional abstract ideas for wherein determining the possible AI model architectures includes: populating a predetermined neural architecture search (NAS) framework with search space parameters at a predetermined kernel level for a search space that includes a predetermined baseline model architecture (mathematical concepts); specifying memory as a primary constraint of the plurality of initial edge devices (mental processes, mathematical concepts); providing the predetermined NAS framework with a first list of the memory constraints of the initial edge devices (mental processes, mathematical concepts); instructing the predetermined NAS framework to search the search space for potential architectural modifications optimized as a multi-objective function (mental processes, mathematical concepts); generating a second list of all models uncovered during the search of the search space (mental processes, mathematical concepts), wherein the models uncovered during the search of the search space are the possible Al model architectures, wherein each of the possible Al model architectures fulfill each of the memory constraints (mathematical concepts); and mapping, in a structured dictionary, the possible Al model architectures of the second list to memory constraint bins (mental processes, mathematical concepts), which are mental processes or concepts that can be performed in the human mind, including observation, evaluation, judgment or opinion, or by a human using pen and paper (MPEP 210604(a)(2)(III)) and mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations (MPEP 210604(a)(2)(I)).
Claim 3, dependent on claim 1, recites additional abstract ideas comprising selecting the sub-set of the possible Al model architectures (mental processes); wherein generating the pareto-optimal configuration curve includes plotting a plurality of points each associated with a different one of the possible Al model architectures (mathematical concepts), which are mental processes or concepts that can be performed in the human mind, including observation, evaluation, judgment or opinion, or by a human using pen and paper (MPEP 210604(a)(2)(III)) and mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations (MPEP 210604(a)(2)(I)).
The claim does not include any additional elements which integrate the abstract idea into a practical application since the additional elements consist of:
training the sub-set of the possible Al model architectures until convergence (This additional element amounts to merely the words to “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. MPEP 2106.05(f).) Also, this additional element amounts to no more than generally linking the use of the judicial exception to a particular technologic environment or field of use - The application or use of the judicial exception in this manner does not meaningfully limit the claim by going beyond generally linking the use of the judicial exception to a particular technological environment. MPEP 2106.05(h)).
storing the trained possible Al model architectures in a predetermined model bank (An additional element of extra-solution activity that courts have identified is well understood, routine and conventional activity for receiving or transmitting data over a network, e.g., using the internet to gather data. See also, MPEP 2106.05(d)(II), MPEP 2106.05(g), 2019 Guidance, 84 FR 50 at 55, 2019 Guidance, 84 FR 50, footnote 31.).
Claim 4, dependent on claim 3, recites only additional abstract ideas for wherein the points are plotted with respect to a first axis that is based on model latency, wherein the points are plotted with respect to a second axis that is based on model task performance, which are mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations (MPEP 210604(a)(2)(I)).
Claim 5, dependent on claim 3, recites additional abstract ideas for wherein selecting the sub-set of the possible Al model architectures includes: evenly selecting a plurality of memory constraint bins across a memory spectrum of the memory constraints of model tasks of the initial edge devices, sorting the possible Al model architectures into the memory constraint bins according to the memory constraints of the possible Al model architectures, and identify, from each of the memory constraint bins, one of the possible Al model architectures for including in the sub-set of the possible Al model architectures, wherein each of the identified possible Al model architectures is identified to have a potential for outperforming the other possible Al model architectures within the same memory constraint bin, which are mental processes or concepts that can be performed in the human mind, including observation, evaluation, judgment or opinion, or by a human using pen and paper (MPEP 210604(a)(2)(III)). Additionally the recitation of wherein each of the identified possible Al model architectures is identified to have a potential for outperforming the other possible Al model architectures within the same memory constraint bin is also mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations (MPEP 210604(a)(2)(I)).
The claim does not include any additional elements which integrate the abstract idea into a practical application since the additional elements consist of:
causing a neural architecture search (NAS) framework to (This additional element amounts to merely the words to “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. MPEP 2106.05(f).) Also, this additional element amounts to no more than generally linking the use of the judicial exception to a particular technologic environment or field of use - The application or use of the judicial exception in this manner does not meaningfully limit the claim by going beyond generally linking the use of the judicial exception to a particular technological environment. MPEP 2106.05(h)).
by the NAS framework (This additional element amounts to merely the words to “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. MPEP 2106.05(f).) Also, this additional element amounts to no more than generally linking the use of the judicial exception to a particular technologic environment or field of use - The application or use of the judicial exception in this manner does not meaningfully limit the claim by going beyond generally linking the use of the judicial exception to a particular technological environment. MPEP 2106.05(h)).
Claim 6, dependent on claim 3, recites additional abstract ideas comprising generate a pareto-optimal configuration curve (mathematical concepts); determine additional possible AI model architectures (mental processes); and incorporating the additional possible AI model architectures into the pareto-optimal configuration curve by adding points to the pareto-optimal configuration curve to represent the additional possible AI model architectures (mathematical concepts), which are mental processes or concepts that can be performed in the human mind, including observation, evaluation, judgment or opinion, or by a human using pen and paper (MPEP 210604(a)(2)(III)) and mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations (MPEP 210604(a)(2)(I)).
The claim does not include any additional elements which integrate the abstract idea into a practical application since the additional elements consist of:
training, using the points, a regression model to (This additional element amounts to merely the words to “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. MPEP 2106.05(f).) Also, this additional element amounts to no more than generally linking the use of the judicial exception to a particular technologic environment or field of use - The application or use of the judicial exception in this manner does not meaningfully limit the claim by going beyond generally linking the use of the judicial exception to a particular technological environment. MPEP 2106.05(h)).
using the trained regression model to (This additional element amounts to merely the words to “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. MPEP 2106.05(f).) Also, this additional element amounts to no more than generally linking the use of the judicial exception to a particular technologic environment or field of use - The application or use of the judicial exception in this manner does not meaningfully limit the claim by going beyond generally linking the use of the judicial exception to a particular technological environment. MPEP 2106.05(h)).
Claim 7, dependent on claim 1, does not include any additional elements which integrate the abstract idea into a practical application since the additional elements consist of:
obtaining, the capacity profiling information and descriptions, wherein the capacity profiling information includes memory constraint specifications of the initial edge devices, wherein the descriptions include tasks performed by the initial edge devices (An additional element of extra-solution activity that courts have identified is well understood, routine and conventional activity for receiving or transmitting data over a network, e.g., using the internet to gather data. See also, MPEP 2106.05(d)(II), MPEP 2106.05(g), 2019 Guidance, 84 FR 50 at 55, 2019 Guidance, 84 FR 50, footnote 31.)
Claim 8, dependent on claim 1, wherein using the pareto-optimal configuration curve to determine the possible AI model architecture with the relatively highest degree of adherence to constraints of the first edge device (mental processes, mathematical concepts) includes: derive a latency requirement to use for determining the one of the possible AI model architectures with the relatively highest degree of adherence to constraints of the first edge device (mental processes, mathematical concepts), which are mental processes or concepts that can be performed in the human mind, including observation, evaluation, judgment or opinion, or by a human using pen and paper (MPEP 210604(a)(2)(III)) and mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations (MPEP 210604(a)(2)(I)).
The claim does not include any additional elements which integrate the abstract idea into a practical application since the additional elements consist of:
obtaining capacity profiling information and descriptions associated with the first edge device (An additional element of extra-solution activity that courts have identified is well understood, routine and conventional activity for receiving or transmitting data over a network, e.g., using the internet to gather data. See also, MPEP 2106.05(d)(II), MPEP 2106.05(g), 2019 Guidance, 84 FR 50 at 55, 2019 Guidance, 84 FR 50, footnote 31.)
causing a predetermined AI-latency-interference-framework to (This additional element amounts to merely the words to “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. MPEP 2106.05(f).) Also, this additional element amounts to no more than generally linking the use of the judicial exception to a particular technologic environment or field of use - The application or use of the judicial exception in this manner does not meaningfully limit the claim by going beyond generally linking the use of the judicial exception to a particular technological environment. MPEP 2106.05(h)).
Claim 9 recites a computer program product, the computer program product comprising a computer readable storage medium, thus an article of manufacture and one of the four statutory categories of patentable subject matter. However, claim 9 further recites to determine, based on capacity profiling information and descriptions associated with a plurality of initial edge devices, a plurality of possible AI model architectures that fulfill memory constraints of the initial edge devices (mental processes); generate a pareto-optimal configuration curve based on a sub-set of the possible AI model architectures (mathematical concepts); use the pareto-optimal configuration curve to determine one of the possible AI model architectures with a relatively highest degree of adherence to constraints of the first edge device (mental processes, mathematical concepts), which are mental processes or concepts that can be performed in the human mind, including observation, evaluation, judgment or opinion, or by a human using pen and paper (MPEP 210604(a)(2)(III)) and mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations (MPEP 210604(a)(2)(I)).
The claim does not include any additional elements which integrate the abstract idea into a practical application since the additional elements consist of:
computer program product, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a processing circuit to cause the processing circuit to (an additional element merely recites the words “apply it” (or an equivalent) with the judicial exception, or merely includes instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. See also, MPEP 2106.05(f), MPEP 2106.04(d), 2019 Guidance, 84 FR 50 at 55, footnote 30.).
in response to receiving a request for determining an AI model architecture for a first edge device (An additional element of extra-solution activity that courts have identified is well understood, routine and conventional activity for receiving or transmitting data over a network, e.g., using the internet to gather data. See also, MPEP 2106.05(d)(II), MPEP 2106.05(g), 2019 Guidance, 84 FR 50 at 55, 2019 Guidance, 84 FR 50, footnote 31.)
cause the determined AI model architecture to be deployed to the first edge device (This additional element amounts to merely the words to “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. MPEP 2106.05(f).) Also, this additional element amounts to no more than generally linking the use of the judicial exception to a particular technologic environment or field of use - The application or use of the judicial exception in this manner does not meaningfully limit the claim by going beyond generally linking the use of the judicial exception to a particular technological environment. MPEP 2106.05(h)).
Thus, the claim is directed to the abstract idea.
Further, the additional elements, alone or in combination, do not provide significantly more than the abstract idea itself, because implementation on a computer (MPEP 2106.05(f)) cannot provide significantly more, and transmitting data over a network is well-understood, routine and conventional (MPEP 2106.05(d), and generally linking the use of the judicial exception to a particular technological field of use does not meaningfully limit the claims (MPEP 2106.04(d)) and the combination of additional elements does not provide an inventive concept. Thus, the claim is ineligible.
Claim 17 recites a system, thus a machine and one of the four statutory categories of patentable subject matter. However, claim 17 further recites to determine, based on capacity profiling information and descriptions associated with a plurality of initial edge devices, a plurality of possible AI model architectures that fulfill memory constraints of the initial edge devices (mental processes); generate a pareto-optimal configuration curve based on a sub-set of the possible AI model architectures (mathematical concepts); use the pareto-optimal configuration curve to determine one of the possible AI model architectures with a relatively highest degree of adherence to constraints of the first edge device (mental processes, mathematical concepts), which are mental processes or concepts that can be performed in the human mind, including observation, evaluation, judgment or opinion, or by a human using pen and paper (MPEP 210604(a)(2)(III)) and mathematical concepts including mathematical relationships, mathematical formulas or equations, and mathematical calculations (MPEP 210604(a)(2)(I)).
The claim does not include any additional elements which integrate the abstract idea into a practical application since the additional elements consist of:
A system, comprising: a processor; and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to (an additional element merely recites the words “apply it” (or an equivalent) with the judicial exception, or merely includes instructions to implement an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea. See also, MPEP 2106.05(f), MPEP 2106.04(d), 2019 Guidance, 84 FR 50 at 55, footnote 30.).
in response to receiving a request for determining an AI model architecture for a first edge device (An additional element of extra-solution activity that courts have identified is well understood, routine and conventional activity for receiving or transmitting data over a network, e.g., using the internet to gather data. See also, MPEP 2106.05(d)(II), MPEP 2106.05(g), 2019 Guidance, 84 FR 50 at 55, 2019 Guidance, 84 FR 50, footnote 31.)
and cause the determined AI model architecture to be deployed to the first edge device (This additional element amounts to merely the words to “apply it” (or an equivalent) or are mere instructions to implement an abstract idea or other exception on a computer. MPEP 2106.05(f).) Also, this additional element amounts to no more than generally linking the use of the judicial exception to a particular technologic environment or field of use - The application or use of the judicial exception in this manner does not meaningfully limit the claim by going beyond generally linking the use of the judicial exception to a particular technological environment. MPEP 2106.05(h)).
Thus, the claim is directed to the abstract idea.
Further, the additional elements, alone or in combination, do not provide significantly more than the abstract idea itself, because implementation on a computer (MPEP 2106.05(f)) cannot provide significantly more, and transmitting data over a network is well-understood, routine and conventional (MPEP 2106.05(d), and generally linking the use of the judicial exception to a particular technological field of use does not meaningfully limit the claims (MPEP 2106.04(d)) and the combination of additional elements does not provide an inventive concept. Thus, the claim is ineligible.
Dependent claims 10-16 and 18-20 are comparably rejected as set forth above with respect to dependent claims 2-8.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 8-9 and 16-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Scheidegger et al. (Pub. No. US 2020/0193266 A1, published June 18, 2020) hereinafter Scheidegger.
Regarding claim 1, Scheidegger teaches:
A computer-implemented method, comprising (i.e., The present application relates in general to computerized techniques for determining cognitive models to be deployed at computerized devices, e.g., in an edge computing and/or an Internet-of-Things environment. In particular, it is directed to methods taking into account hardware characteristics of such computerized devices, in order to tune the cognitive models to be deployed thereon. Scheidegger, para 1, 8.):
determining, based on capacity profiling information and descriptions associated with a plurality of initial edge devices, a plurality of possible AI model architectures that fulfill memory constraints of the initial edge devices;
(i.e., The present methods may be implemented in a network comprising said CCS and said auxiliary devices, where the network has an edge computing architecture and the auxiliary devices are configured as edge computing devices of the network, wherein each of said devices is capable to be set in data communication with the CCS. Scheidegger, Abstract, Figs 1-3, para 33, 37. The present methods in embodiments include maintaining (steps S10, S25, FIG. 3) relations 55 that map hardware characteristics of auxiliary devices 24 and example datasets to cognitive models. Such relations link, each, hardware characteristics (e.g., arithmetic compute capabilities of the auxiliary devices, memory capacity or availability) (determining, based on capacity profiling information and descriptions associated with a plurality of initial edge devices (initial edge devices, para 22, 21-23), a plurality of possible AI model architectures that fulfill memory constraints of the initial edge devices) and example datasets (images, tables, matrices, etc.) to cognitive models (or types of cognitive models), such as neural networks, linear regression models, random forests models, etc. Such relations may thus be regarded as a function that associates elements {x, y} from the sets X, Y formed by the various example datasets (X) and hardware characteristics (Y) to one or more elements (models, or model types) z of the set Z of cognitive models, as illustrated in FIG. 5A. Such sets X, Y, Z are not closed; they can be extended as needed to accommodate new types of data, hardware characteristics and ML models. These relations may simply be of a binary type, to affix given cognitive models (types, architectures, etc.) to given example datasets and hardware characteristics of devices (determining, based on capacity profiling information and descriptions associated with a plurality of initial edge devices (initial edge devices, para 22, 21-23), a plurality of possible AI model architectures (see also para 8-9, 13-15, determining plurality of possible candidate model types, architectures) that fulfill memory constraints (memory capacity constraints) of the initial edge devices)). The existence of such a relation for a given pair of elements {x, y} translates as a dot in the 3D plot of FIG. 5A. In more sophisticated variants, though, such relations further indicate a level of performance of each cognitive model retained, to allow a predictor to be trained on the fly, as discussed later in reference to some embodiments. Such relations may for example be maintained in a lifelong database, which maintains a history of data and performance characteristics of the auxiliary devices 24 and models run thereon. Scheidegger, Abstract, Figs 1-3, para 37, 21-24, 8-9, 13-15. The present approach makes it possible to automatically determine suitable cognitive models for deployment on auxiliary devices. The process may possibly be achieved without any user input, subject to possible user constraints, e.g., in terms of performance to be achieved. Maintaining relations as described above makes it possible to readily serve requests, e.g., on the fly, while optimizing for multiple objectives. As such relations take various possible hardware characteristics into account, suitable cognitive models can be determined for (and possibly optimized with respect to) various types of auxiliary devices. Interestingly, this approach is not limited by the types of cognitive models that may be taken into account or the types of auxiliary devices. Various (all) types of cognitive models may be concurrently considered, for various types of devices, for instance, based on the maintained relations and a suitably trained, core cognitive model. Scheidegger, Abstract, Figs 1-3, para 37, 21-24, 8-9, 81-84, 86, 88, 42.).
generating a pareto-optimal configuration curve based on a sub-set of the possible AI model architectures;
(i.e., The system involves computerized methods as described in sect. 1, which allow efficient deep neural architecture searches and enable the deployment of ML solutions on edge devices such as used in an IoT environment. The methods include hardware constraints for such devices into the optimization procedure, such as power consumption, computing performance and capability, volatile and nonvolatile memory availability, operating systems, other hardware constraints (e.g., deploying the model on field programmable gate arrays, limited in blocks and lookup tables), and supported software environments. Beyond the hardware constraints, the optimization algorithm is multi-objective aware and can optimize for additional user constraints. For example, a user might want to impose budgets in terms of time per inference, power or energy consumed per inference, or inference throughput and latency constraints. Scheidegger, Figs 1-3, para 82, 83, 81-84, 37, 56, 64-65, 67-68, 86. The multi-objective formulation allows full Pareto, optimal front of solutions to be generated (generating a pareto-optimal configuration curve (pareto-optimal configuration front curve) based on a sub-set of the possible AI model architectures (based on a subset of the possible candidate model architectures solutions, see also para 82, 64-65 architecture search, para 37, 56 model architecture)), for example to evaluate operation lifespan limited due to battery constraints against predictive accuracy during the operation lifetime of the device. Scheidegger, Figs 1-3, para 83, 80-84, 37, 56, 64-65, 67-68, 86, 95.).
in response to receiving a request for determining an AI model architecture for a first edge device, using the pareto-optimal configuration curve to determine one of the possible AI model architectures with a relatively highest degree of adherence to constraints of the first edge device; and
(i.e., Maintaining relations as described above makes it possible to readily serve requests, e.g., on the fly, while optimizing for multiple objectives (in response to receiving a request (serving requests, in response to receiving a request) for determining an AI model architecture for a first edge device (for determining AI model architecture for a first edge device see also para 13-15, 37, 22), using the pareto-optimal configuration curve to determine one of the possible AI model architectures with a relatively highest degree of adherence to constraints of the first edge device (using multiple objectives and generated pareto optimal front curve to determine one of the possible candidate AI model architectures solutions, see also para 83, 81-82, 88-95, with a relatively highest degree of adherence to constraints of the first edge device 37, 13-15, 8-9)). Scheidegger, Figs 1-3, para 9, 8, 39, 13-15, 8-9, 37, 81-83, 88-95.
This system is able to address real-world issues that occur when applying machine learning on edge devices. Multi-objective and constraint-aware tuning mechanisms as discussed in the previous section make it possible to find solutions to the following use cases: “What is the most accurate model I can execute on a device that has IEEE 754 floating point support, a low-end single central processing unit, and is limited to 300 MB of main memory?” (using the pareto-optimal configuration curve to determine one of the possible AI model architectures with a relatively highest degree of adherence to constraints of the first edge device), “What is the energy/accuracy tradeoff of all deep neural networks that I can fit on my device?”, “What is a the most accurate prediction I can get when trying to solve a problem in regular intervals of 5 minutes on a low-cost memory controller that is restricted to 16 bit integer arithmetic, 16 MHz operation frequency and has 10 KB of memory?”, “In the latter case, what is the power tradeoff? Can I switch models to guarantee a minimum operation lifetime when operating with a battery of limited capacity?”, “How long does one inference step of my model take on the edge device?”, “How much power/energy is used during that period?”, “How long will the battery of the supply last to perform that operation?”, etc. Scheidegger, Figs 1-3, para 81, 82, 83).
causing the determined AI model architecture to be deployed to the first edge device. (i.e., In embodiments, the method further comprises, at each of the auxiliary devices, deploying an auxiliary cognitive model determined for said each of the auxiliary devices, for it to locally perform computations based on the deployed model. Scheidegger, Fig 1-3, para 19, 21-23, 30.).
Regarding claim 8, which depends from claim 1 and recites:
wherein using the pareto-optimal configuration curve to determine the possible AI model architecture with the relatively highest degree of adherence to constraints of the first edge device includes:
obtaining capacity profiling information and descriptions associated with the first edge device; and
Scheidegger teaches the method of claim 1 from which claim 8 depends, including using the pareto-optimal configuration curve to determine the possible AI model architecture with the relatively highest degree of adherence to constraints of the first edge device. Scheidegger, Figs 1-3, para 9, 8, 39, 13-15, 8-9, 37, 81-83, 88-95. Scheidegger teaches that, The present methods may be implemented in a network comprising said CCS and said auxiliary devices, where the network has an edge computing architecture and the auxiliary devices are configured as edge computing devices of the network, wherein each of said devices is capable to be set in data communication with the CCS. Scheidegger, Figs 1-3, para 33, 37. The present methods in embodiments include maintaining (steps S10, S25, FIG. 3) relations 55 that map hardware characteristics of auxiliary devices 24 and example datasets to cognitive models. Such relations link, each, hardware characteristics (e.g., arithmetic compute capabilities of the auxiliary devices, memory capacity or availability) (obtaining (maintaining, obtaining) capacity profiling information and descriptions associated with the first edge device (hardware compute capabilities, capacity relations, profiling information and characteristics, descriptions associated with the hardware, initial edge devices, see also Fig. 1, para 22, 24, 28-30, 88)) and example datasets (images, tables, matrices, etc.) to cognitive models (or types of cognitive models), such as neural networks, linear regression models, random forests models, etc. Such relations may thus be regarded as a function that associates elements {x, y} from the sets X, Y formed by the various example datasets (X) and hardware characteristics (Y) to one or more elements (models, or model types) z of the set Z of cognitive models, as illustrated in FIG. 5A. Such sets X, Y, Z are not closed; they can be extended as needed to accommodate new types of data, hardware characteristics and ML models. These relations may simply be of a binary type, to affix given cognitive models (types, architectures, etc.) to given example datasets and hardware characteristics of devices. The existence of such a relation for a given pair of elements {x, y} translates as a dot in the 3D plot of FIG. 5A. In more sophisticated variants, though, such relations further indicate a level of performance of each cognitive model retained, to allow a predictor to be trained on the fly, as discussed later in reference to some embodiments. Such relations may for example be maintained in a lifelong database, which maintains a history of data and performance characteristics of the auxiliary devices 24 and models run thereon. Scheidegger, Figs 1-3, para 37, 21-24, 8-9, 13-15, 81-84, 86, 88, 42.
Thus, Scheidegger teaches wherein using the pareto-optimal configuration curve to determine the possible AI model architecture with the relatively highest degree of adherence to constraints of the first edge device includes: obtaining capacity profiling information and descriptions associated with the first edge device.
causing a predetermined AI-latency-interference-framework to derive a latency requirement to use for determining the one of the possible AI model architectures with the relatively highest degree of adherence to constraints of the first edge device.
As similarly discussed above with respect to claim 1, Scheidegger teaches using the pareto-optimal configuration curve to determine the possible AI model architecture with the relatively highest degree of adherence to constraints of the first edge device. Scheidegger, Figs 1-3, para 9, 8, 39, 13-15, 8-9, 37, 81-83, 88-95. Scheidegger teaches that, one understands that the present methods can possibly be made multi-objective aware and, in particular, may optimize for various constraints, e.g., to reduce power consumption or reduce time latency (causing a predetermined AI-latency-interference-framework to derive a latency requirement (latency objective requirement) to use for determining the one of the possible AI model architectures with the relatively highest degree of adherence to constraints of the first edge device, see also para 9, 8, 39, 13-15, 8-9, 37, 81-83, 88-95) when deploying the auxiliary models at the auxiliary devices. Scheidegger, Figs 1-3, 5, para 68, 82. The system involves computerized methods as described in sect. 1, which allow efficient deep neural architecture searches and enable the deployment of ML solutions on edge devices such as used in an IoT environment. The methods include hardware constraints for such devices into the optimization procedure, such as power consumption, computing performance and capability, volatile and nonvolatile memory availability, operating systems, other hardware constraints (e.g., deploying the model on field programmable gate arrays, limited in blocks and lookup tables), and supported software environments. Beyond the hardware constraints, the optimization algorithm is multi-objective aware and can optimize for additional user constraints. For example, a user might want to impose budgets in terms of time per inference, power or energy consumed per inference, or inference throughput and latency constraints (causing a predetermined AI-latency-interference-framework to derive a latency requirement (latency objective requirement) to use for determining the one of the possible AI model architectures with the relatively highest degree of adherence to constraints of the first edge device, see also para 9, 8, 39, 13-15, 8-9, 37, 81-83, 88-95). Scheidegger, Figs 1-3, 5, para 82, 68, 9, 8, 39, 13-15, 8-9, 37, 81-83, 88-95.
Claim 9 recites a computer program product that parallels the method of claim 1. Therefore, the analysis discussed above with respect to claim 1 also applies to claim 9. Accordingly, claim 9 is rejected based on substantially the same rationale as set forth above with respect to claim 9. More specifically regarding A computer program product, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a processing circuit to cause the processing circuit to (i.e., Scheidegger, para 25, 35, 78).
Claim 16 recites a computer program product that parallels the method of claim 8. Therefore, the analysis discussed above with respect to claim 8 also applies to claim 16. Accordingly, claim 16 is rejected based on substantially the same rationale as set forth above with respect to claim 8.
Claim 17 recites a system that parallels the method of claim 1. Therefore, the analysis discussed above with respect to claim 1 also applies to claim 17. Accordingly, claim 17 is rejected based on substantially the same rationale as set forth above with respect to claim 17. More specifically regarding A system, comprising: a processor; and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to (i.e., Scheidegger, 85-87, 99-100).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Scheidegger as applied to claims 1 and 9 above, and further in view of Wen et al. (Pub. No. US 2023/0409867 A1, filed June 15, 2022) hereinafter Wen.
Regarding claim 7, which depends from claim 1 and recites:
obtaining, the capacity profiling information and descriptions, wherein the capacity profiling information includes memory constraint specifications of the initial edge devices, wherein the descriptions include tasks performed by the initial edge devices.
Scheidegger teaches the method of claim 1 from which claim 7 depends. Scheidegger teaches that, The present methods may be implemented in a network comprising said CCS and said auxiliary devices, where the network has an edge computing architecture and the auxiliary devices are configured as edge computing devices of the network, wherein each of said devices is capable to be set in data communication with the CCS. Scheidegger, Figs 1-3, para 33, 37. The present methods in embodiments include maintaining (steps S10, S25, FIG. 3) relations 55 that map hardware characteristics of auxiliary devices 24 and example datasets to cognitive models. Such relations link, each, hardware characteristics (e.g., arithmetic compute capabilities of the auxiliary devices, memory capacity or availability) (obtaining (maintaining, obtaining), the capacity profiling and descriptions (hardware compute capabilities, capacity relations, profiling information and characteristics, descriptions), wherein the capacity profiling information includes memory constraint specifications of the initial edge devices (relations profiling information includes memory capacity or availability constraint specifications of the hardware, initial edge devices, see also Fig. 1, para 22, 24, 28-30, 88)) and example datasets (images, tables, matrices, etc.) to cognitive models (or types of cognitive models), such as neural networks, linear regression models, random forests models, etc. Such relations may thus be regarded as a function that associates elements {x, y} from the sets X, Y formed by the various example datasets (X) and hardware characteristics (Y) to one or more elements (models, or model types) z of the set Z of cognitive models, as illustrated in FIG. 5A. Such sets X, Y, Z are not closed; they can be extended as needed to accommodate new types of data, hardware characteristics and ML models. These relations may simply be of a binary type, to affix given cognitive models (types, architectures, etc.) to given example datasets and hardware characteristics of devices. The existence of such a relation for a given pair of elements {x, y} translates as a dot in the 3D plot of FIG. 5A. In more sophisticated variants, though, such relations further indicate a level of performance of each cognitive model retained, to allow a predictor to be trained on the fly, as discussed later in reference to some embodiments. Such relations may for example be maintained in a lifelong database, which maintains a history of data and performance characteristics of the auxiliary devices 24 and models run thereon. Scheidegger, Figs 1-3, para 37, 21-24, 8-9, 13-15, 81-84, 86, 88, 42.
Thus, Scheidegger teaches obtaining, the capacity profiling information and descriptions, wherein the capacity profiling information includes memory constraint specifications of the initial edge devices. Scheidegger does not specifically disclose include tasks performed by the initial edge devices.
However, Wen teaches in the field related to hardware-aware neural architecture search and edge computing systems. Wen, abstract, para 2-4. Wen, which is analogous to the claimed invention because Wen is directed to network architecture search for edge deployment, teaches that, a method implemented using one or more computing devices may include: obtaining a set of tasks to be performed using a resource-constrained edge computing system; based on a base multi-task dense-prediction (MT-DP) architecture template), the set of tasks (include tasks performed by the initial edge devices), and a plurality of hardware-based constraints of the edge computing system, and using a network architecture search (NAS), sampling one or more candidate MT-DP architectures from a search space of neural network architecture components, wherein each sampled candidate MT-DP architecture comprises a distinct assembly of sampled neural network architecture components applied to the base MT-DP architecture template; and processing image data using the one or more candidate MT-DP architectures to determine one or more performance metrics for each of the one or more candidate MT-DP architectures. Wen, Figs. 1, 3, 5, para 5, 22, 63, 39, 47, 53, 55.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to implement the determining of model deployment in edge computing and obtaining, the capacity profiling information and descriptions, wherein the capacity profiling information includes memory constraint specifications of the initial edge devices of Scheidegger to include tasks performed by the initial edge devices of Wen, with a reasonable expectation of success, in order to provide an improved approach to efficient predictions for edge computing devices. Wen, para 4, 1-5. This would have provided the advantages of improving the development, deployment, and performance of models performing tasks on edge computing devices.
Claim 15 recites a computer program product that parallels the method of claim 7. Therefore, the analysis discussed above with respect to claim 7 also applies to claim 15. Accordingly, claim 15 is rejected based on substantially the same rationale as set forth above with respect to claim 7.
Allowable Subject Matter
Claims 2-6, 10-14 and 18-20 would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims and if the rejections as being indefinite are overcome and if the rejections as being directed to an abstract idea are overcome.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US-20220036123-A1, US-20240144030-A1, US-20230316044-A1, US-20240152726-A1, US-20220035878-A1, US-20250037028-A1.
B. Lyu, H. Yuan, L. Lu and Y. Zhang, "Resource-Constrained Neural Architecture Search on Edge Devices," in IEEE Transactions on Network Science and Engineering, vol. 9, no. 1, pp. 134-142, 1 Jan.-Feb. 2022, doi: 10.1109/TNSE.2021.3054583.
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