DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to the election filed February 12, 2026.
Election/Restrictions
Applicant’s election without traverse of claims 1-10 in the reply filed on February 12, 2026 is acknowledged.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: SEMICONDUCTOR DEVICE AND CHIP INCLUDING DIE TEST STRUCTURE IN FIRST CUTTING LANE ONLY.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1 recites the limitation "the first cutting lane" in lines 4 and 9; and
Claim 1 recites the limitation "the second cutting lanes" in lines 6-7.
There is insufficient antecedent basis for this limitation in the claim.
Claims 2-9 are rejected as being dependent upon rejected claim 1.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
As best understood, claim(s) 1-3 and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hata (US 7,316,935 B1).
In regard to claim 1, Hata teaches a semiconductor device comprising: a plurality of cutting lanes 302/313/314, comprising: at least one first cutting lane 302; a plurality of second cutting lanes 313 disposed in parallel with the first cutting lane 302; and a third cutting lane 314 disposed intersecting the first cutting lane 302 and the second cutting lanes 313; a plurality of dies 301/310 defined by the intersection of the plurality of cutting lanes 302/313/314; and a die test structure 304/311 only located in the first cutting lane 302, wherein any one of the at least one first cutting lane 302 is disposed adjacent to at least one of the plurality of second cutting lanes 313 (Figure 3B, columns 5-6, lines 23-67 and 1-54, respectively).
In regard to claim 2, Hata teaches at least three of the plurality of second cutting lanes 313 arranged between adjacent two of at least one first cutting lane 302 (Figure 3B, columns 5-6, lines 23-67 and 1-54, respectively).
In regard to claim 3, Hata teaches a number of the plurality of the second cutting lanes 313 spaced between adjacent two of the at least one first cutting lane 302 being equal (Figure 3B, columns 5-6, lines 23-67 and 1-54, respectively).
In regard to claim 9, Hata teaches the plurality of cutting lanes 302/313/314 and the plurality of dies 301/310 form a repeating unit, the repeating unit comprises the at least one first cutting lane 302, and the semiconductor device comprises a plurality of the repeating units (Figure 3B, columns 5-6, lines 23-67 and 1-54, respectively).
Allowable Subject Matter
Claims 4 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 5-7 are objected to as being dependent upon objected claim 4.
Claim 10 is allowed.
The following is a statement of reasons for the indication of allowable subject matter:
In regard to claim 10, The prior art of record (Hata (US 7,316,935 B1)) does not disclose, make obvious, or otherwise suggest the structure of the applicant's claimed invention, such as the configuration of alternating conductive and dielectric layers, channel structures, cutting faces and their heights.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
The following patents are cited to further show the state of the art with respect to semiconductor devices:
Choi et al. (US 2022/0223485 A1) Fung et al. (US 2022/0229337 A1)
Han et al. (US 2020/0058543 A1) Kim et al. (US 10,163,741 B2)
Tsai et al. (US 2008/0073753 A1).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to IDA M SOWARD whose telephone number is (571)272-1845. The examiner can normally be reached Monday through Thursday, 7am to 5:30pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at 571-270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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IMS
March 16, 2026
/IDA M SOWARD/Primary Examiner, Art Unit 2898
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