FINAL OFFICE ACTION
This Final office action addresses U.S. Application No. 18/533,672, which is a reissue application of U.S. Application No. 16/931,933 (the “933 Application”), entitled “METHOD OF CONTROLLING ON-DIE TERMINATION AND MEMORY SYSTEM PERFORMING THE SAME”, which issued as U.S. Patent No. 11,302,384 (the “384 Patent") on April 12,2022.
AMENDMENT
Applicant filed an amendment on August 14, 2026 (the "August 2026 Amendment") in response to the non-final Office action mailed May 18, 2026 (the “May 2026 NF”).
STATUS OF CLAIMS
As of the date of this Office Action, the status of the claims are:
Patent claims 1, 6-14 and 16-19 were amended.
Patent claims 2-5 and 15 were original as in the 384 Patent.
New claim 20 was added.
Accordingly, claims 1-20 are subject to the examination of this instant reissue application. Of these, claims 1, 14 and 18 are independent claims.
PRIORITY
Examiners acknowledge that the present application is a reissue of the 384 Patent that was issued from 933 Application. Examiners further acknowledge the claim of foreign priority to KR 10-2019-0160408, filed December 5, 2019.
CLAIM INTERPRETATION
As noted in the May 2026 NF, during examination, claims are given the broadest reasonable interpretation consistent with the specification and limitations in the specification are not read into the claims. See MPEP §2111, MPEP §2111.01 and In re Yamamoto et al., 222 USPQ 934 (Fed. Cir. 1984). Under a broadest reasonable interpretation, words of the claim must be given their plain meaning, unless such meaning is inconsistent with the specification. See MPEP §2111.01(I). It is further noted it is improper to import claim limitations from the specification, i.e., a particular embodiment appearing in the written description may not be read into a claim when the claim language is broader than the embodiment. See MPEP §2111.01(II). Therefore, unless one of the exceptions applies below, Examiners will interpret the limitations of the pending and examined claims using the broadest reasonable interpretation.
A. Lexicographic Definitions
A first exception to the prohibition of reading limitations from the specification into the claims is when the Applicant for patent has provided a lexicographic definition for the term. See MPEP §2111.01(IV). Following an independent review of the claims in view of the specification herein, Examiners find that Patent Owner has not provided any lexicographic definitions related to claim terms with any reasonable clarity, deliberateness and precision.
B. Claim Interpretation Under 35 U.S.C. §112(f)
A second exception to the prohibition of reading limitations from the specification into the claims is when the claimed feature is written as a means-plus-function or a step-plus-function. See 35 U.S.C. §112(f) and MPEP §2181-2183.
As noted in Williamson v. Citrix Online, L.L.C., 115 USPQ2d 1105, 1112 (Fed. Cir. 2015), there is a presumption that claim terms with the word “means” invoke §112(f) and that claim terms without the word “means” do not. Williamson, 792 F.3d at 1348. This presumption is rebuttable if a challenger demonstrates that a claim term either fails to “recite sufficiently definite structure” (WIT1) or else recites “function without reciting sufficient structure for performing that function” (WIT2) Williamson, 792 F.3d at 1348. WIT1 and WIT2 are in the alternative and thus a challenger need only demonstrate one of WIT1 or WIT2 for the claims to invoke §112(f). The presumption against means-plus-function claiming is not “strong” and that a challenger need not show that the limitation is essentially devoid of anything that can be construed as structure; rather a challenger need only show that the structure is not sufficient for performing the claimed function. See Id. Sufficient structure exists when the claim language specifies the exact structure that performs the function in question without need to resort to other portions of the specification or extrinsic evidence for an adequate understanding of the structure. See TriMed, Inc. v. Stryker Corp. 4514 F.3d 1256, 1259 (Fed. Cir. 2008).
After a claimed phrase has been shown to invoke 35 U.S.C. §112(f), as found above, the next step is to determine the corresponding structure or material as described in the specification for performing the recited function. See MPEP §2181(II) and Williamson, 792 F.3d at 1351.
Examiners find herein that claims 14-19 include one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. §112(f) because the claim limitations use a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Each such limitation will be discussed in turn as follows.
B1. FL #1: “a memory controller…” (Claims 14-17)
A first means-plus-function phrase is recited in claims 14-17, which recites “a memory controller…” or hereinafter FL #1. Examiners determine herein that FL #1 meets the test of Williamson as discussed above and thus will be interpreted as a means-plus-function limitation under 35 U.S.C. §112(f).
The Examiners find that FL #1 in claim 14 recites:
“a memory controller configured to control the plurality of memory ranks, the memory controller configured to:
enable on die termination (ODT) circuits of the plurality of memory ranks into an initial state;
set a resistance value of a first ODT circuit of a non-target memory rank among the plurality of memory ranks to a first resistance value in response to a write operation on a target memory rank among the plurality of memory ranks; and
set a resistance value of the first ODT circuit of the non-target memory rank among the plurality of memory ranks to a second resistance value in response to a read operation on a target memory rank among the plurality of memory ranks, wherein the first resistance value is configured to be different from the second resistance value”.
(B1)(a) Claim Phrase FL #1 Functional
Examiners find that FL #1 is functional. Examines find this limitation recites combination of generic structures of a memory controller along with special functions. Examiners find FL #1 is functional on the basis of the special functions being performed by the memory controller.
Examiners further note that because nothing in the written description contradicts the plain language describing this function, the function within FL #1 will have its ordinary and accustomed meaning.
(B1)(b) Claim Phrase FL #1 Invokes
FL #1 invokes 35 U.S.C. §112(f) because "means ... for" type language is recited. While the FL #1 uses the term memory controller, Examiners find this term is being used as a generic structure, but a memory controller itself is not a sufficient structure for performing the special functions. Thus, while FL #1 does recite some structure, i.e., a memory controller, this structure alone are not sufficient structures for performing the entire function of FL #1.
Controller: "A device that other devices rely on for access to a computer subsystem." Microsoft Press Computer Dictionary, 2nd Edition, Microsoft Press, Redmond, WA, 1994.
In view of the forgoing findings, Examiners find that while memory controller implies some structure, i.e., a generic memory controller, Examiners find nothing in the specification, prosecution history or the prior art to construe “memory controller…” in FL #1 as the name of a sufficient structure for performing the functions recited in FL #1 so as to take the overall claim limitation out of the ambit of §112(f). See Williamson v. Citrix Online, L.L.C., 115 USPQ2d 1105, 1112 (Fed. Cir. 2015). Specifically, Examiners are relying on WIT2 as discussed above. Rather Examiners find that memory controller merely used in a generic sense as a nonce term equivalent to means as a generic base structure in association with special functions. Accordingly, Examiners do not find that the simple use of memory controller is a sufficient structure for performing the claimed special functions recited in FL #1 and thus conclude FL #1 invokes interpretation under §112(f).
(B1)(c) Corresponding Structure
After a claimed phrase has been shown to invoke 35 U.S.C. §112(f), as found above, the next step is to determine the corresponding structure or material as described in the specification for performing the recited function. See MPEP §2181(II).
Based on a review of the entirety of FL #1, the corresponding structure for FL#1 is both hardware structure and algorithm structure. The hardware structure is plurality of memory dies DRAM D11-D14 and the host die 730 (SoC, CPU, GPU). The Algorithm structure are shown in Figs. 5 and 15. Moreover, the corresponding algorithm structure for first and second resistance change is seen in col. 15, line 58 - col. 16, lines 10. See Figs. 5, 15 and 22 and the following paragraph from the specification:
“Referring to FIG. 22, a 2.5 D chip structure 700 may be a chip structure in which a high bandwidth memory (HBM) 740 and a host die 730 are connected using an interposer layer 720. The HBM 740 includes memory dies D11-D14 and the host die functions as a controller (e.g., a memory controller).” (col. 20, lines 60-65)
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Figs. 5, 15 and 22 of the 384 Patent.
As provided above, a limitation that invokes 35 U.S.C. §112(f) is limited to the corresponding structure for FL#1 is both hardware structure and algorithm structure as described in the specification. Thus, FL #1 will be limited to those structures disclosed above.
B2. FL #2: “a memory controller…” (Claims 18-19)
FL #2 recites “a memory controller” similar to FL #1, thus, FL #2 also invokes 35 U.S.C. §112(f) in the same manner as FL #1.
C. Conclusion of Claim Interpretation
FL #1 and FL #2 will be interpreted under 35 U.S.C. §112(f) as provided above. Because the remaining limitations in claims 14-19 do not invoke 35 U.S.C. §112(f) and are not lexicographically defined, they will be interpreted using the broadest reasonable interpretation.
REISSUE OATH/DECLARATION
37 C.F.R. §1.175 Reissue oath or declaration (in part).
(a) The inventor’s oath or declaration for a reissue application, in addition to complying with the requirements of § 1.63, § 1.64, or § 1.67, must also specifically identify at least one error pursuant to 35 U.S.C. 251 being relied upon as the basis for reissue and state that the applicant believes the original patent to be wholly or partly inoperative or invalid by reason of a defective specification or drawing, or by reason of the patentee claiming more or less than the patentee had the right to claim in the patent.
(b) If the reissue application seeks to enlarge the scope of the claims of the patent (a basis for the reissue is the patentee claiming less than the patentee had the right to claim in the patent), the inventor's oath or declaration for a reissue application must identify a claim that the application seeks to broaden. A claim is a broadened claim if the claim is broadened in any respect.
The reissue declaration filed December 8, 2023 ("2023 Reissue Declaration”) is acknowledged. However, Examiners remain object to the error statement on the basis that Examiners find that the 2023 Reissue Declaration fails to state a proper error in the claims on which to base this reissue.
A proper error statement must identify a single word, phrase, or expression in the specification or in an original claim in the underlying patent, i.e., the 384 Patent, and how it renders the original patent wholly or partly inoperative or invalid. See MPEP §1414(II).
Examiners find that the error statement merely states:
“The original patent (U.S. Patent No. ) 11,302,384 is believed to be wholly or partly inoperative or invalid, by reason of the patentee claiming less than he had the right to claim in the patent, such as amended claims 1, 6-14, 16-19; and added claim 20.”
Examiners do not find this error statement sufficient under the rules. Examiners find this statement does not specify any language in the original claims in error, which is being corrected by the presentation of the amended claims 1, 6-14, 16-19 and new added claim 20.
Therefore, in accordance with 35 U.S.C. §251 and 37 C.F.R. §1.175, Applicant is required to provide a new declaration with a statement of error with respect to 384 Patent identifying a claim Applicant seeks to broaden, and identifying “a single word, phrase, or expression” from the patent claims that is in error and stating how this error renders the 384 Patent partially or wholly inoperative or invalid.
As a matter of suggestion only and to aid Applicant understanding of the requirements, Examiners would accept the following error statement if filed in an otherwise proper reissue declaration:
U.S. Patent No. 11,302,384 claims less than the Patentee had the right to claim. For example, claim 1 recited “wherein the first and second resistance values are the same when a current mode of the memory system is a first mode, and the first and second resistance values are
different when the current mode is a second other mode.” which unduly narrows the intended scope of invention. Thus, Patentee seeks to broaden claim 1 in this reissue application. This error is corrected by amended claim 1 which removes the claim requirement of “the first and second resistance values are the same” and seeks to direct the invention to the manner of ”wherein the first resistance value is configured to be different from the second resistance value”.
Moreover, Applicant should complete Reissue Application Declaration by checking what boxes (in the bottom of page 1) that apply for error statement.
REJECTIONS UNDER 35 U.S.C. §251
The following is a quotation of 35 U.S.C. §251(a):
(a) IN GENERAL.—Whenever any patent is, through error, deemed wholly or partly inoperative or invalid, by reason of a defective specification or drawing, or by reason of the patentee claiming more or less than he had a right to claim in the patent, the Director shall, on the surrender of such patent and the payment of the fee required by law, reissue the patent for the invention disclosed in the original patent, and in accordance with a new and amended application, for the unexpired part of the term of the original patent. No new matter shall be introduced into the application for reissue.
Claims 1-20 and this reissue application as a whole remain rejected as being based upon a defective reissue declaration under 35 U.S.C. §251 as set forth above. See 37 C.F.R. §1.175. The nature of the defects in the 2023 Reissue Declaration is set forth in the discussion above.
RESPONSE TO AMENDMENT
The objection to specification because it does not provide cross-reference to related application has been withdrawn as necessitated by the August 2026 Amendment.
The rejection of claims 1-17 and 20 under 35 U.S.C. §251 as being an improper recapture has been withdrawn as necessitated by the August 2026 Amendment.
RESPONSE TO ARGUMENT
Applicant’s argument - “Applicant respectfully disagrees with the interpretation of "memory controller" in claims 14-19 under 35 U.S.C. §112(f). The claims do not use the term "means," and "memory controller" is a recognized structural term in the relevant art identifying a class of electronic
control circuits, rather than a generic placeholder for "means." Indeed, the Office Action's cited dictionary defines a controller as a "device," and paragraph [0038] of the specification expressly identifies memory controller 20 as a control circuit. Accordingly, one of ordinary skill in the art would understand "memory controller" to connote sufficiently definite structure, and Applicant respectfully submits that §112(f) does not apply.” (page 4 of the August 2026 Amendment)
Examiner’s response – It is noted that the determination of claim limitations invoking 35 U.S.C. § 112(f) is not for rejecting claims, but for correctly reading the claim limitations invoking 35 U.S.C. § 112(f) in light of the description supporting the claim limitations from an adequate disclosure in the specification. The issue regarding the claim interpretation is not whether the term connotes sufficient structure alone, but whether the term is the name of a sufficiently definite structure for performing the entire functions recited in the limitation.
Examiner agrees that “memory controller” is a term understood by one skilled in the art. However, there is no disclosure or suggestion from the prior art or the 384 Patent that any “memory controller" is a sufficient element structure to perform the entire functions recited in FL #1. Specifically, there is no suggestion that any known memory controller of a prior art device can perform all functions:
Sub-Function #1-1/ enable on die termination (ODT) circuits of the plurality of memory ranks into an initial state;
Sub-Function #1-2/ set a resistance value of a first ODT circuit of a non-target memory rank among the plurality of memory ranks to a first resistance value in response to a write operation on a target memory rank among the plurality of memory ranks;
Sub-Function #1-3/ set a resistance value of the first ODT circuit of the non-target memory rank among the plurality of memory ranks to a second resistance value in response to a read operation on a target memory rank among the plurality of memory ranks; and
Sub-Function #1-4/ wherein the first resistance value is configured to be different from the second resistance,
as recited in claim 14.
Or Sub-Function #2-1/ enable on die termination (ODT) circuits of the first DRAM chip and the second DRAM chip into an initial state;
Sub-Function #2-2/ set a resistance value of a first ODT circuit of the second DRAM chip corresponding to a write non-target to a first resistance value in response to a write operation on the first DRAM chip corresponding to a write target; and
Sub-Function #2-3/ set a resistance value of the first ODT circuit of the second DRAM chip corresponding to the write non-target to a second resistance value different from the first resistance value in response to a read operation on the first DRAM chip corresponding to the write target,
as recited in claim 18.
Examiner admits that an off-the-shelf “memory controller” is well known to one of ordinary skill in the art. However, in this case, the reissue applicant does not claim off-the-shelf “memory controller” because, unlike the recited term “memory controller” the off-the-shelf “memory controller” is not configured to perform the entire specifically claimed functions foregoing in claims 14 and 18 without programming a specialized algorithm for performing all the claimed functions recited above. According to EON Corp. IP Holdings LLC v. AT&T Mobility LLC, 785 F.3d 616, 623 (Fed. Cir. 2015): “A microprocessor or general purpose computer lends sufficient structure only to basic functions of a microprocessor. All other computer-implemented functions require disclosure of an algorithm.” (Emphasis added)
As noted in above, the test for determining if the claim language invokes 35 U.S.C. § 112(f) was set forth in Williamson v. Citrix Online, LLC, 792 F.3d 1339 (Fed. Cir. 2015).
Williamson held: When a claim term lacks the word “means,” the presumption can be overcome and 35 U.S.C. § 112(f) will apply if the challenger demonstrates that the claim term [1] fails to “recite sufficiently definite structure” or else [2] recites “function without reciting sufficient structure for performing that function.” Williamson, 792 F.3d at 1349, 115 USPQ2d at 111 (Fed. Cir. 2015) (en banc) (quoting Watts v. XL Systems, Inc., 232 F.3d 877, 880 (Fed. Cir. 2000) (emphasis added; bracketed numbering added)[1].
Because “or else” is an idiom used to express alternatives[2] and in light of the “or else” noted in the Williamson quotation above, Williamson essentially provides two distinct (i.e. alternative) tests (collectively the “Williamson Invocation Tests” or “WIT”) for overcoming the presumption that 35 U.S.C. § 112(f) is not invoked when a phrase does not use the word “means”.
In summary, and in accordance with the WIT, when a claim term lacks the word “means,” the presumption to not invoke 35 U.S.C. § 112(f) can be overcome and 35 U.S.C. § 112(f) will apply if:
Williamson Invocation Test (1) (or “WIT-1”): the claim term fails to recite sufficiently definite structure; or
Williamson Invocation Test (2) (or “WIT-2”): the claim term recites function without reciting sufficient structure for performing that function.
In light of the “or else,” Williamson recites two alternative tests joined by “or else,” either of which can be used to overcome the presumption that 35 U.S.C. § 112(f) is not invoked. To be clear, Examiner is relying on WIT-2, i.e., “or else recites function without reciting sufficient structure for performing that function.” Williamson, 792 F.3d at 1349 (citations and quotations omitted).
The test is not whether there is simply structure in the claim limitation, but rather whether the claim limitation recites a sufficiently definite structure for performing entire claimed functions. In assessing whether the claim limitation is in means-plus function format, Examiner does not merely consider the introductory phrase (for example: memory controller), but look to the entire passage including functions performed by the introductory phrase (for example: Sub-Function #1-1/enable on die termination (ODT) circuits of the plurality of memory ranks into an initial state; Sub-Function #1-2/ set a resistance value of a first ODT circuit of a non-target memory rank among the plurality of memory ranks to a first resistance value in response to a write operation on a target memory rank among the plurality of memory ranks; Sub-Function #1-3/ set a resistance value of the first ODT circuit of the non-target memory rank among the plurality of memory ranks to a second resistance value in response to a read operation on a target memory rank among the plurality of memory ranks; and Sub-Function #1-4/ wherein the first resistance value is configured to be different from the second resistance as recited in claim 14. Or Sub-Function #2-1/ enable on die termination (ODT) circuits of the first DRAM chip and the second DRAM chip into an initial state; Sub-Function #2-2/ set a resistance value of a first ODT circuit of the second DRAM chip corresponding to a write non-target to a first resistance value in response to a write operation on the first DRAM chip corresponding to a write target; and Sub-Function #2-3/ set a resistance value of the first ODT circuit of the second DRAM chip corresponding to the write non-target to a second resistance value different from the first resistance value in response to a read operation on the first DRAM chip corresponding to the write target as recited in claim 18. Even assuming that the claimed “memory controller” connotes some structure, the “memory controller” by itself impart insufficient structure for performing the entire claimed functions.
Insofar as understood, there is significant structural difference between an ordinary “memory controller” found in the prior art and the claimed “memory controller” and perform the claimed Sub-function #1-1 – Sub-function #1-4, or Sub-function #2-1 – Sub-function #2-3 listed above. That is, a generic, off-the-shelf “memory controller” cannot perform the entire Function of FL #1 or FL #2. Rather, Examiner finds that more structures than the generic memory controller would be required, i.e., appropriate programming, or circuit reconfiguration.
Therefore, the reissue applicant’s arguments on the interpretation under 35 U.S.C. §112(f) points are not persuasive.
ALLOWABLE SUBJECT MATTER
While claims 1-20 are rejected under 35 U.S.C. §251 as provided above, Examiners find the claims are nevertheless allowable over the prior art of record in this reissue application.
Regarding claim 1: The prior art of record does not explicitly disclose: “wherein the first resistance value is configured to be different from the second resistance value” method step in combination with the remaining method steps cited in claim 1.
Regarding claim 14: The prior art of record does not teach the algorithm structures for FL #1, i.e., “the first resistance value is configured to be different from the second resistance”.
Regarding claim 18: The prior art of record does not teach the algorithm structures for FL #2, i.e., “set a resistance value of the first ODT circuit of the second DRAM chip corresponding to the write non-target to a second resistance value different from the first resistance value in response to a read operation on the first DRAM chip corresponding to the write target”.
Dependent claims 2-13, 15-17 and 19-20 are allowable at least by virtue of their dependency from independent claims 1, 14 and 18.
PRIOR OR CONCURRENT PROCEEDINGS
Applicant is reminded of the obligation to apprise the Office of any prior or concurrent proceedings in which the 384 Patent is or was involved, such as interferences or trials before the Patent Trial and Appeal Board, reissues, reexaminations, or litigations and the results of such proceedings.
INFORMATION MATERIAL TO PATENTABILITY
Applicant(s) are reminded that they “have a continuing duty under 37 CFR §1.56 to timely apprise the Office of any information which is material to the patentability of the claims under consideration in the reissue application. See MPEP §1418.” - MPEP § 1406.
CONCLUSION
Claims 1-20 are rejected.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the Examiner should be directed MY TRANG TON whose telephone number is (571) 272-1754. The Examiner can normally be reached on 7:00am - 6:00pm, Monday - Thursday.
If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s supervisor, Andrew J. Fischer, SPE Art Unit 3992, can be reached at (571) 272-6779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-9900.
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Signed:
/MY TRANG TON/ Primary Examiner, Art Unit 3992
Conferees:
/KENNETH WHITTINGTON/ Primary Examiner, Art Unit 3992
/ANDREW J. FISCHER/ Supervisory Patent Examiner, Art Unit 3992
[1] See MPEP § 2181 I. Determining whether a claim limitation invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112(6).
[2] “’or’ 1 — used as a function word to indicate an alternative < coffee or tea>” Merriam-Webster’s Collegiate Dictionary, 10th Edition, Merriam-Webster Inc., Springfield, M.A., 1997; “’or else’ —used to say what another possibility is. He either thinks he can't do it or else he just isn't interested.” Merriam Webster’s Dictionary at Merriam-Webster.com, Merriam-Webster, www.merriam-webster.com/dictionary/or else. Accessed 1 Feb. 2019.
Prosecution Insights