DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 03 September 2025 have been fully considered but they are not persuasive.
Regarding Applicant’s argument that the Zheng reference fails to teach the newly added limitations since “Zheng discloses that even when the first key is verified to be legal, the chip may still send instruction for serial number reading again to perform a second identify verification. Therefore, while performing second identity verification, Zheng does not prevent first key verification from being output”, please note that each identity verification and output is done one at a time, and since the second identity verification is done after the first identity verification, then said first identity verification is not being output (i.e. is prevented from being output) during that time interval, meeting the claim as written. Same applies to Applicant’s argument that Zheng fails to teach the limitations of claims 2 and 3 as amended.
Election/Restrictions
Newly submitted claim 20 is directed to an invention that is independent or distinct from the invention originally claimed for the following reasons: The claim is drawn to a different embodiment [shown in fig. 9] than that previously examined. If the claim had been included in the original set of claims, the Examiner would have filed a Restriction requirement due to it containing subject matter that is not shared by the other species [shown in figs. 1-8], creating a separate embodiment and requiring a separate search.
Since applicant has received an action on the merits for the originally presented invention, this invention has been constructively elected by original presentation for prosecution on the merits. Accordingly, claim 20 is withdrawn from consideration as being directed to a non-elected invention. See 37 CFR 1.142(b) and MPEP § 821.03.
To preserve a right to petition, the reply to this action must distinctly and specifically point out supposed errors in the restriction requirement. Otherwise, the election shall be treated as a final election without traverse. Traversal must be timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are subsequently added, applicant must indicate which of the subsequently added claims are readable upon the elected invention.
Should applicant traverse on the ground that the inventions are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing the inventions to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the inventions unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other invention.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-19 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Zheng (US 2021/0056235.)
Regarding claim 1,
Zheng discloses a consumable chip [20 in fig. 5], comprising:
a storage module, configured to store verification data, wherein the verification data at least includes first verification data [i.e. first serial number] and second verification data [i.e. second serial number; Abstract; paragraphs 0040-0044]; and
a communication module, configured to output the first verification data and prevent the second verification data to be output within a first time interval, and output the second verification data and prevent the first verification data from being output within a second time interval [Abstract; paragraphs 0061-0063 and 0068; as seen in figs. 1-4; please note that each identity verification and output is done one at a time, one after the other, and since the second identity verification is done after the first identity verification, then said first identity verification is not being output (i.e. is prevented from being output) during that time interval, meeting the claim as written; also note that the claimed limitation is broad and open to multiple interpretations.]
Regarding claim 2,
Zheng further discloses the consumable chip further including:
a control module [not shown but mentioned in paragraph 0060], configured to set the first verification data being accessible and set the second verification data being non-accessible during the first time interval, and conduct a switch at onset of the second time interval when the second verification data is switched from being non-accessible to being accessible and the first verification data is switched from being accessible to being non-accessible, wherein only one set of accessible verification data is available at a same time point [paragraphs 0040-0043 and 0061-0063; as seen in figs. 1-3; the second verification data happens after the first verification data (i.e. the second verification data is not-accessible during the time period that the first verification data is output), and the first verification data is not accessible during the second verification since it’s already been output; only one verification/authorization is done at a time.]
Regarding claim 3,
Zheng further discloses the consumable chip further including:
a timing module, configured to identify the onset of the second time interval and notify the control module to conduct the switch upon identification of the onset of the second time interval [paragraphs 0043; it is implicit and well-known that a timing module is needed to determine when a predetermined amount of time has passed; also, see rejection/explanation regarding claims 1 and 2.]
Regarding claim 4,
Zheng further discloses wherein:
a printing apparatus [not shown but mentioned in paragraph 0002] is configured to supply power to the timing module [when the apparatus powers on]; or
the consumable chip further includes a power supply module configured to supply power to the timing module [only one option necessary for the limitation to be met.]
Regarding claim 5,
Zheng further discloses wherein:
the control module is also configured to determine whether the first verification data is recognized by the printing apparatus [paragraph 0041]; and
the timing module is also configured to stop timing if the first verification data is recognized by the printing apparatus [please note that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art; if the prior art structure is capable of performing the intended use, then it meets the claim.]
Regarding claim 6,
Zheng discloses a consumable chip cartridge, comprising:
a consumable chip [20 in fig. 5], comprising:
a storage module, configured to store verification data, wherein the verification data at least includes first verification data [i.e. first serial number] and second verification data [i.e. second serial number; Abstract; paragraphs 0040-0044]; and
a communication module, configured to output the first verification data and prevent the second verification data from being output within a first time interval, and output the second verification data and prevent the first verification data from being output within a second time interval [Abstract; paragraphs 0061-0063 and 0068; as seen in figs. 1-4; please note that each identity verification and output is done one at a time, one after the other, and since the second identity verification is done after the first identity verification, then said first identity verification is not being output (i.e. is prevented from being output) during that time interval, meeting the claim as written; also note that the claimed limitation is broad and open to multiple interpretations.]
Regarding claim 7,
Zheng further discloses wherein:
the consumable chip further includes a control module [not shown but mentioned in paragraph 0060], configured to set the first verification data being accessible verification data at a starting time point of the first time interval, and set the second verification data as a second set of accessible verification data at a starting time point of the second time interval, wherein only one set of accessible verification data is available at a same time point [paragraphs 0040-0043 and 0061-0063; as seen in figs. 1-3; the second verification data happens after the first verification data (i.e. the second verification data is not-accessible during the time period that the first verification data is output), and the first verification data is not accessible during the second verification since it’s already been output; only one verification/authorization is done at a time.]
Regarding claim 8,
Zheng further discloses wherein:
the consumable chip further includes a timing module configured to identify the onset of the second time interval and notify the control module to conduct the switch upon identification of the onset of the second time interval [paragraphs 0043; it is implicit and well-known that a timing module is needed to determine when a predetermined amount of time has passed; also, see rejection/explanation regarding claims 1 and 2.]
Regarding claim 9,
Zheng further discloses wherein:
a printing apparatus [not shown but mentioned in paragraph 0002] is configured to supply power to the timing module [when the apparatus powers on]; or
the consumable chip further includes a power supply module configured to supply power to the timing module [only one option necessary for the limitation to be met.]
Regarding claim 10,
Zheng further discloses wherein:
the control module is also configured to determine whether the first verification data is recognized by the printing apparatus [paragraph 0041]; and
the timing module is also configured to stop timing if the first verification data is recognized by the printing apparatus [please note that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art; if the prior art structure is capable of performing the intended use, then it meets the claim.]
Regarding claims 11-14,
The steps of these method claims are deemed to be inherent in view of the functions of the apparatus disclosed above, since it would be necessary to perform the claimed method steps in order for the apparatus to perform its intended functions. [See Rejection above.]
Regarding claim 15,
Zheng further discloses a method of using the consumable chip according to claim 1 [see Rejection above], comprising:
installing the consumable chip in a printing apparatus [paragraphs 0002 and 0053];
determining whether the consumable chip is recognized by the printing apparatus [paragraphs 0041 and 0053];
removing the consumable chip from the printing apparatus if the consumable chip is not recognized by the printing apparatus [implicit in view of the disclosure]; and
placing the consumable chip for a preset waiting time [paragraph 0043, 0062-0063, 0068 and 0074; as seen in fig. 3; please note that it is not clear where the consumable chip is placed and open to multiple interpretations.]
Regarding claim 16,
Zheng discloses a consumable chip [20 in fig. 5], wherein:
the consumable chip stores verification data at least including first verification data [i.e. first serial number] and second verification data [i.e. second serial number], wherein the first verification data is different from the second verification data [Abstract; paragraphs 0040-0044], wherein:
the consumable chip is configured to only output the first verification data and prevent the second verification data from being output when an access instruction for verification data is received before a first preset time; and configured to only output the second verification data and prevent the first verification data from being output when the access instruction for verification data is received after the first preset time, wherein the first preset time is determined by the consumable chip itself [Abstract; paragraphs 0061-0063 and 0068; as seen in figs. 1-4; please note that each identity verification and output is done one at a time, one after the other, and since the second identity verification is done after the first identity verification, then said first identity verification is not being output (i.e. is prevented from being output) during that time interval, meeting the claim as written; also note that the claimed limitation is broad and open to multiple interpretations.]
Regarding claim 17,
Zheng further discloses wherein:
the first preset time is determined by a timing module of the consumable chip [paragraphs 0043; it is implicit and well-known that a timing module is needed to determine when a predetermined amount of time has passed.]
Regarding claim 18,
Zheng further discloses wherein:
the first preset time is determined by a battery power of a power supply module connected to the consumable chip [paragraphs 0062-0063 and 0098.]
Regarding claim 19,
Zheng further discloses wherein the communication module is further configured to output the verification data according to a mapping relationship, wherein the mapping relationship correlates verification data with time [the first verification data is output only during the first time interval and the second verification data is output only during the second time interval.]
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Communication with the USPTO
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JANNELLE M LEBRON whose telephone number is (571)272-2729. The examiner can normally be reached Monday-Friday: 9:00am - 5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Douglas X Rodriguez can be reached at (571) 431-0716. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JANNELLE M LEBRON/Primary Examiner, Art Unit 2853
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