DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed on 04/28/2026 have been fully considered but they are not persuasive.
It is argued by the applicant that Tsai's purported "parasitic patch antenna" (element 410) is explicitly and physically connected to the active circuitry through a supply line via (element 409) that penetrates the insulating substrate (100A). Tsai expressly states that "a supply line via 409 electrically connects to the parasitic patch antenna 410" (Tsai, [0068]). This physical, conductive through-via constitutes precisely the "physical electrical connection structure" that amended Claim 1 disclaims.
The examiner is not persuaded because fig. 16 is embodiment wherein the active antenna pattern 408 and the parasitic antenna pattern 410 are separated by the dielectric layer 100A without any physical electrical connection structure therebetween; par [0068] of Tsai discloses that the antenna structure 400 also includes parasitic patch antennas 410 and directly-driven patch antennas 408 that are electrically connected to feedline vias 409. Note that the directly-driven patch antennas 408 that are electrically connected to feedline vias 409, and not 410.
It is argued by the applicant that because Tsai's element 410 is physically and electrically fed through via 409 - and is therefore not a purely parasitic element in the electromagnetic sense - Tsai does not disclose an antenna structure in which the active antenna pattern and the parasitic antenna pattern are "separated by the dielectric layer without any physical electrical connection structure therebetween,".
The examiner is not persuaded because nowhere Tsai specification nor fig. 16 drawing discloses that element 410 is physically and electrically fed through via 409.
It is argued by the applicant that additionally, Applicant's revised claim 1 further requires that "the dielectric layer of the antenna structure is a carrier on which the first rewiring structure, the molding body, the semiconductor chip, and the second rewiring structure are formed." This limitation reflects another key aspect of the claimed invention: the transparent dielectric layer (glass carrier) serves a dual function - it is both the dielectric substrate of the antenna structure and the carrier upon which the entire semiconductor package is directly built up, eliminating the need for a separate carrier substrate.
The examiner is not persuade as shown below, Tsai discloses wherein the dielectric layer 100A of the antenna structure is a carrier on which the first rewiring structure, the molding body, the semiconductor chip, and the second rewiring structure are formed.
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Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 4-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tsai et al. 20200058606.
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Regarding claim 1, fig. 16 of Tsai discloses a semiconductor package, comprising:
an antenna structure 400 which comprises a dielectric layer 100A that is made of a transparent material (par [0016] – glass), an active antenna pattern 408 (par [0068] - patch antennas 408) that is formed on one surface of the dielectric layer and a parasitic antenna pattern 410 (par [0068] - parasitic patch antennas 410) that is formed on the other surface of the dielectric layer opposite to the one surface;
a first rewiring structure 409 (par [0068]) which is electrically connected to the active antenna pattern 408 of the antenna structure;
a molding body 302 which is formed on one surface of the first rewiring structure;
a semiconductor chip 220 which is placed within the molding body;
a second rewiring structure 210 which is formed on one surface of the molding body;
a vertical connection conductor 214 (fig. 14) which is laterally spaced from the semiconductor chip, penetrates the molding layer, and electrically connects the second rewiring structure and the first rewiring structure; and
an external connection terminal 306 which is formed on one surface of the second rewiring structure,
wherein the active antenna pattern 408 and the parasitic antenna pattern 410 are separated by the dielectric layer 100A without any physical electrical connection structure therebetween; and
wherein the dielectric layer 100A of the antenna structure is a carrier on which the first rewiring structure, the molding body, the semiconductor chip, and the second rewiring structure are formed.
Regarding claim 2, Tsai discloses wherein the dielectric layer of the antenna structure is made of a glass material (par [0016] – glass).
Regarding claim 4, Tsai discloses wherein the thickness of the dielectric layer is between 100 micrometers and 500 micrometers (par [0016] …The core substrate 101 may have a thickness between about 200 μm and about 1000 μm, such as about 400 μm or about 900 μm).
Regarding claim 5, fig. 16 of Tsai discloses further comprising: a protective layer 116 for covering and protecting the other surface of the dielectric layer and the parasitic antenna pattern (see 116 surround 410 and acts as protecting walls).
Allowable Subject Matter
Claims 6 and 9 are allowed.
Claim 9 recites “an inversion step of inverting the carrier and the first rewiring structure, molding body, semiconductor chip and second rewiring structure that are built up on the carrier; a parasitic antenna pattern formation step of forming a parasitic antenna pattern on the other surface of the inverted carrier by aligning the same with the active antenna pattern”, this limitation is not taught by prior of record.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VONGSAVANH SENGDARA whose telephone number is (571)270-5770. The examiner can normally be reached 9AM-6PM EST.
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/VONGSAVANH SENGDARA/ Primary Examiner, Art Unit 2893
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