DETAILED ACTION
Claims 1-19 and 21 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 5, 6, 8, 9, 12, 13, 15, 16, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Iyigun et al. (US 2013/0159662 A1).
Iyigun was cited in the previous Office Action.
Regarding claim 1, Iyigun teaches a method comprising:
initializing, for an active address space, a shadow address space ([0015-16]; [0017] As used herein, the term working set may refer to a set of pages for a process.; [0018] As used herein, the term swap file may refer to space reserved on secondary storage (e.g., a hard drive) and used for swapping pages into or out of physical memory; [0020] An OS component such as a memory manager may then identify one or more pages of the working set 102 that are candidate pages for swapping out, such as the private pages of the working set. The total size of the identified candidate pages may be calculated. Then, reserved space 106 may be reserved in swap file 104 in an operation 108, the reserved space sufficient to store the candidate pages. Further, a location for each candidate page may be reserved in the reserved space 106; [0038] At 406 space is reserved in the swap file based on a calculated total size of the identified candidate pages (e.g., reserved space 106). At 408 a location is assigned or reserved in the reserved space of the swap file for each candidate page. In some embodiments, locations are reserved in virtual address order according to the virtual addresses of the candidate pages in the working set.; [0055] the swap file is initialized with a predetermined size (e.g., 256 MB) when the computing system boots. In other embodiments, the swap file is initialized when the memory manager determines that swapping operations are to occur, and may be initialized with an initial size sufficient to accommodate the pages to be swapped.; wherein the working set corresponds to the active address space and the swap file corresponds to the shadow address space);
receiving a request to swap from the active address space to the shadow address space ([0022] In some embodiments, the decision to swap out and remove one or more pages from the working set of a process may be made by a policy manager or other component of the OS, based on various conditions. For example, a determination may be made that a process is suspended, inactive, or for some reason less active (e.g., accessing fewer pages) than other active processes on the computing device.; [0056] receiving requests for page swapping);
in response to the request, copying state information from the active address space to the shadow address space ([0003] This application describes techniques for efficiently swapping one or more pages to and from a working set of pages for a process; [0019] Embodiments provide for outswapping of pages from a working set for a process, and for writing one or more swapped out pages from the working set to the swap file in secondary storage. [0015] As used herein, the term page may refer to a block of memory used by a process while it is executing. When the process is active, a page may be in physical memory where it is accessible to the process. A memory manager or other component of an operating system (OS) may remove one or more pages out of physical memory and write them to secondary storage; [0037] Once the decision to outswap has been made, at 404 one or more candidate page(s) are identified for swapping from a working set of the process.; [0038] At 406 space is reserved in the swap file based on a calculated total size of the identified candidate pages (e.g., reserved space 106). At 408 a location is assigned or reserved in the reserved space of the swap file for each candidate page. In some embodiments, locations are reserved in virtual address order according to the virtual addresses of the candidate pages in the working set.; [0042] At 416 the candidate pages are written to the swap file. In some embodiments, the candidate pages are written to their reserved locations that are sequentially ordered in the swap file according to their virtual address order); and
swapping usage of the active address space to the shadow address space ([0019] Embodiments provide for outswapping of pages from a working set for a process, and for writing one or more swapped out pages from the working set to the swap file in secondary storage.; [0039] Once the locations have been reserved and the list updated, at some later time the memory manager may choose to write some or all of the outswapped pages to their reserved locations in the swap file.).
Iyigun does not explicitly teach state information.
However, Iyigun does teach
[0001] “The operating system (OS) may assign to each process a number of pages of memory to use while the process is executing in physical memory.”
[0003] “This application describes techniques for efficiently swapping one or more pages to and from a working set of pages for a process”
As such, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to interpret Iyigun’s pages of memory used by a process while executing to correspond to the claimed state information. Accordingly, Iyigun reasonably teaches the claimed limitations.
Regarding claim 2, Iyigun teaches further comprising quiescing, in response to the request, active work associated with the active address space ([0036] In some cases, the decision to outswap may be based on a determination that a process is inactive or suspended, that one or more threads associated with the process have not been active for a certain time period, that the process has been in the background for a period of time, that the process has not used a certain number of pages during a period of time, or that the computing system as a whole has been suspended and/or is inactive.).
Regarding claim 5, Iyigun teaches wherein swapping I/O resources from the active address space to the shadow address space comprises updating a data structure associating jobs with address spaces to indicate the shadow address space instead of the active address space ([0003]; [0038] Once locations for the candidate pages have been reserved at 408, those candidate pages may be said to have been outswapped. At 410 a list (or other data structure) of the outswapped candidate pages is updated. In some embodiments, this list is updated when the locations are reserved at 408).
Regarding claim 6, Iyigun teaches wherein swapping I/O resources from the active address space to the shadow address space comprises:
unregistering the active address space from a group of a plurality of systems, and registering the shadow address space with the group of the plurality of systems ([0034] Memory manager 304 may also include modified list 308 and/or standby list 310. In some embodiments, after candidate pages have been outswapped (i.e., unregistering) from the working set and locations have been reserved for them in the swap file, at some point later those candidate pages may be removed from the working set and be placed on modified list 308 to be written by a writer (e.g., page writer 312). Then, as each page is written to swap file 320 the address information for the page may be moved from the modified list 308 to the standby list 310. In some embodiments, standby list 310 keeps track of pages that have not yet been removed from physical memory even though they have been written to the swap file. In such cases, if the process seeks to access these pages they can still be accessed directly in physical memory without being swapped back in. However, if memory manager 304 requires more pages of physical memory for other processes it may allocate those pages that are on the standby list. In some embodiments, memory manager 304 also includes page writer 312 that operates to write pages from working set(s) 322 to pagefile(s) 318 and/or swap file(s) 320 (e.g., swap out pages), and/or read pages back into working set(s) 322 (e.g., swap in pages).).
Regarding claim 8, it is a system type claim having similar limitations as claim 1 above. Therefore, it is rejected under the same rationale above. Further the additional limitations a processing device; and memory operatively coupled to the processing device, wherein the memory stores computer program instructions that, when executed, cause the processing device to are taught by Iyigun in at least [0023] “FIG. 2 depicts a diagram for an example computer system architecture in which embodiments may operate. As shown, computing system 200 includes processing unit 202. Processing unit 202 may encompass multiple processing units, and may be implemented as hardware, software, or some combination thereof. Processing unit 202 may include one or more processors. As used herein, processor refers to a hardware component. Processing unit 202 may include computer-executable, processor-executable, and/or machine-executable instructions written in any suitable programming language to perform various functions described herein”.
Regarding claim 9, it is a system type claim having similar limitations as claim 2 above. Therefore, it is rejected under the same rationale above.
Regarding claim 12, it is a system type claim having similar limitations as claim 5 above. Therefore, it is rejected under the same rationale above.
Regarding claim 13, it is a system type claim having similar limitations as claim 6 above. Therefore, it is rejected under the same rationale above.
Regarding claim 15, it is a media/product type claim having similar limitations as claim 1 above. Therefore, it is rejected under the same rationale above.
Regarding claim 16, it is a media/product type claim having similar limitations as claim 2 above. Therefore, it is rejected under the same rationale above.
Regarding claim 19, it is a media/product type claim having similar limitations as claim 5 above. Therefore, it is rejected under the same rationale above.
Regarding claim 20, it is a media/product type claim having similar limitations as claim 6 above. Therefore, it is rejected under the same rationale above.
Claims 3, 10, and 17are rejected under 35 U.S.C. 103 as being unpatentable over Iyigun et al. (US 2013/0159662 A1) in further view of Ammann et al. (US 5,642,495).
Ammann was cited in the previous Office Action.
Regarding claim 3, Iyigun does not explicitly teach wherein copying the state information from the active address space to the shadow address space comprises:
copying the state information from private storage of the active address space to a common storage area; and copying the state information from the common storage area to private storage of the shadow address space.
However, Ammann teaches wherein copying the state information from the active address space to the shadow address space comprises:
copying the state information from private storage of the active address space to a common storage area, and copying the state information from the common storage area to private storage of the shadow address space (Col. 3, lines 21-33: The processor associated with the private storage area 20 can access, and possibly modify, portion 24 of the private storage area 20. Then, portion 24 of the private storage area 20 can be copied to the common storage area 28. From there, the processor associated with private storage area 21 can in turn copy the common storage area 28 to its assigned portion 25 of the private storage area 21. The processor can now process and modify the data in portion 25 of the private storage area 21. Portion 25 may then be copied to the common storage area 28 and later rewritten to portion 24. In this way the processor associated with private storage area 20 and the processor associated with private storage area 21 can exchange data via the common storage area 28.; Col. 5, lines 1-11).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Ammann with the teachings of Iyigun to allow data to be copied to and from a common storage to a private area and allowed to be copied to other address spaces. The modification would have been motivated by the desire of combining known elements to yield predictable results.
Regarding claim 10, it is a system type claim having similar limitations as claim 3 above. Therefore, it is rejected under the same rationale above.
Regarding claim 17, it is a media/product type claim having similar limitations as claim 3 above. Therefore, it is rejected under the same rationale above.
Claims 4, 11 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Iyigun et al. (US 2013/0159662 A1) in further view of Zhou et al. (US 20230185666 A1)
Zhou was cited in the previous Office Action.
Regarding claim 4, Iyigun does not explicitly teach wherein copying the state information from the active address space to the shadow address space comprises restarting, in response to detecting an event affecting the state information, the copying the state information from the active address space to the shadow address space.
However, Zhou teaches wherein copying the state information from the active address space to the shadow address space comprises restarting, in response to detecting an event affecting the state information, the copying the state information from the active address space to the shadow address space ([0059] In this approach, to swap-out a span, a compute node can break the span into data fragments, generate the associated parity fragments, and then write the entire set of fragments to remote nodes. During the swap-in of a span, a compute node can fetch multiple fragments to reconstruct the target span. With this scheme, which can be referred to as EC-Split, handling the failure of memory nodes during swap-out or swap-in is straightforward; the compute node who is orchestrating the swap-out or swap-in can detect the memory node failure, select a replacement memory node, trigger span reconstruction, and then restart the swap-in or swap-out.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Zhou with the teachings of Iyigun to restart copy operations upon detecting a node/status failure. The modification would have been motivated by the desire of combining known elements to yield predictable results.
Regarding claim 11, it is a system type claim having similar limitations as claim 4 above. Therefore, it is rejected under the same rationale above.
Regarding claim 18, it is a media/product type claim having similar limitations as claim 4 above. Therefore, it is rejected under the same rationale above.
Claims 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Iyigun et al. (US 2013/0159662 A1) in further view of Cheston et al. (US 6,195,695 B1).
Cheston was cited in the previous Office Action.
Regarding claim 7, Iyigun does not teach wherein initializing the shadow address space comprises assigning a shadow designation to the shadow address space, and wherein the method further comprises removing the shadow designation from the shadow address space.
However, Cheston teaches wherein initializing the shadow address space comprises assigning a shadow designation to the shadow address space, and wherein the method further comprises removing the shadow designation from the shadow address space (Claim 14: means for removing the designation of the second storage as a hidden section of memory in response to the corruption of the working copy and the backup copy becoming the working copy of the executable application.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Cheston of removing a designation of a shadow/hidden section of memory to a working memory in response to a change in status. The modification would have been motivated by the desire of allowing continuous availability of data despite corrupted files.
Regarding claim 14, it is a system type claim having similar limitations as claim 7 above. Therefore, it is rejected under the same rationale above.
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Iyigun et al. (US 2013/0159662 A1) in further view of Van Hook et al. (US 6,675,239 B1).
Regarding claim 21, Iyigun teach wherein the shadow address space comprises a range of virtual memory addresses allocated for a job corresponding to the active address space (Abstract: process (i.e., job) and virtual addresses in a process X working set and a Swap file). Iyigun does not explicitly teach wherein swapping usage of the active address space to the shadow address space comprises causing the job to use the shadow address space instead of the active address space.
However, Van Hook teaches wherein swapping usage of the active address space to the shadow address space comprises causing the job to use the shadow address space instead of the active address space (Col. 3, lines 15-29: In another embodiment of the invention, it is possible to identify which of a number of applications are writing commands to the command memory by having each application write to an associated address range. When commands are written to one of the address ranges, that range becomes a current context. A shadow memory is used for writes to address ranges other than the current context. When the context changes, commands from the shadow memory is swapped into the command processor as appropriate, with commands from the address range that was previously a current context being swapped to shadow memory. It is also possible to associate a graphics mode with each address range. In this way, mode can be indicated without specifically sending mode information with each command.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Van Hook with the teachings of Iyigun to allow for an application/job/task to upon a context switch, utilize a second set of memory defined by a different address range than the current address range or context. The modification would have been motivated by the desire of combining known methods to yield predictable results.
Response to Arguments
Applicant's arguments filed on 06/11/2026 have been fully considered but they are not persuasive.
In Remarks Applicant argues:
(I) Iyigun fails to disclose all of the features of any of the rejected claims. For example, Iyigun fails to disclose or suggest "receiving a request to swap from the active address space to the shadow address space," as recited in claim 1, and as similarly recited in claims 8 and 15, though each claim has its own scope.
Instead, Iyigun describes that the decision to swap out pages is made based on a determination that a process is suspended, inactive, or otherwise less active than other processes (Iyigun, paragraph 0022). Iyigun does not describe receiving a request to swap out pages. Nor does Iyigun describe that the decision to swap out pages is made in response to a request.
The swap file of Iyigun, which is reserved on secondary storage, is not a shadow address space to which usage of an active address space is swapped (Iyigun, paragraph 0018). And Applicant notes that the Application describes that, after the swap, the job references the shadow address space in place of the active address space (Application, Figure 2).
(II) Iyigun further fails to disclose or suggest all the features of claim 2. For example, Iyigun fails to disclose or suggest "quiescing, in response to the request, active work associated with the active address space", as recited in claim 2, and as similarly recited in claims 9 and 16, though each claim has its own scope.
The Office Action relies on the description in Iyigun of a decision to outswap that is based on a determination that a process is inactive or suspended (Office Action, page 5; Iyigun, paragraph 0036). However, this portion of Iyigun describes process inactivity as a condition that prompts the decision to outswap pages, rather than quiescing active work in response to a request to swap (Iyigun, paragraphs 0022 and 0036). Applicant notes that the Application describes quiescing active work in response to the request so that the copied state information reflects work that was active when the request was received (Application, Figure 3).
(III) Iyigun further fails to disclose or suggest all the features of claim 5. For example, Iyigun fails to disclose or suggest "updating a data structure associating jobs with address spaces to indicate the shadow address space instead of the active address space", as recited in claim 5, and as similarly recited in claims 12 and 19, though each claim has its own scope.
The Office Action relies on the description in Iyigun of updating a list of outswapped candidate pages for this feature (Office Action, page 5; Iyigun, paragraphs 0003 and 0038).
However, this portion of Iyigun describes a list that tracks candidate pages that have been outswapped and the locations reserved for the pages in the swap file, rather than a data structure associating jobs with address spaces that is updated to indicate a shadow address space instead of an active address space (Iyigun, paragraph 0038).
(IV) Iyigun also fails to disclose or suggest all the features of claim 6. For example, Iyigun
fails to disclose or suggest "unregistering the active address space from a group of a plurality of systems" and "registering the shadow address space with the group of the plurality of systems", as recited in claim 6, and as similarly recited in claim 13, though each claim has its own scope.
Instead, the sections of Iyigun, cited in the Office Action, as disclosing these features describe a modified list and a standby list that are structures maintained by a single memory manager to track pages as the pages are written to the swap file and leave physical memory (Iyigun, paragraph 0034). The modified list and the standby list are not described as, for example, a group of a plurality of systems with which an address space is registered or unregistered. The Application describes registering and unregistering address spaces with a logical grouping of multiple systems so that the systems can access the address spaces of one another (Application, Figure 8).
Accordingly, Applicant respectfully asserts that Iyigun fails to disclose or suggest all of the features of any of claims 1, 8, and 15. Iyigun also fails to disclose all of the features of any of claims 2, 5, 6, 9, 12, 13, 16, and 19, for their respective dependencies and the features recited therein. The withdrawal of these rejections is therefore respectfully requested.
(V) A combination of Iyigun and Ammann also fails to disclose all of the features of claim 3. For example, Iyigun and Ammann fail to describe or suggest "copying the state information from private storage of the active address space to a common storage area" and "copying the state information from the common storage area to private storage of the shadow address space", as recited in claim 3, and as similarly recited in claims 10 and 17.
(VI) A combination of Iyigun and Zhou fails to disclose all of the features of any of the rejected claims. For example, Iyigun and Zhou fail to describe or suggest "receiving a request to swap from the active address space to the shadow address space; in response to the request, copying state information from the active address space to the shadow address space; and swapping usage of the active address space to the shadow address space", as recited in claim 1, and as similarly recited in claims 8 and 15, though each claim has its own scope.
(VII) A combination of Iyigun and Cheston fails to disclose all of the features of any of the rejected claims. For example, Iyigun and Cheston fail to describe or suggest "receiving a request to swap from the active address space to the shadow address space; in response to the request, copying state information from the active address space to the shadow address space; and swapping usage of the active address space to the shadow address space", as recited in claim 1, and as similarly recited in claims 8 and 15, though each claim has its own scope.
In view of the above, examiner submits the following:
As to point (I)
Examiner respectfully disagrees with the Applicant. Iyigun as cited in [0056] recites “If more space is needed, then the swap file size may be dynamically increased at 608. In some embodiments, the decision to increase the swap file size may be based on the memory manager receiving requests for page swapping […]” Therefore, the decision is made in response to a request for page swapping. Further In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., “Applicant notes that the Application describes that, after the swap, the job references the shadow address space in place of the active address space (Application, Figure 2)”) are not recited in the rejected claim. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Accordingly, Applicant’s arguments are not persuasive and the rejection is maintained.
As to point (II)
Examiner respectfully disagrees with the Applicant. Iyigun as cited and underlined teaches that the decision to outswap may be based on a suspension of execution. Examiner submits that a suspension is a command to suspend execution and the outswap follows. Accordingly, Applicant’s argument is not persuasive and the rejection is maintained.
As to point (III)
Examiner respectfully disagrees with the Applicant. The cited portion refers to Fig. 4A which describes outswapping pages for an active process using a list or data structure which is updated when locations are reserved. Accordingly, Applicant’s argument is not persuasive and the rejection is maintained.
As to point (IV)
Examiner respectfully disagrees with the Applicant. Iyigun as cited in par [0034] discusses swapping in/out pages to working sets reasonably correspond to the unregistering and registering address spaces as they are assigned and removed for the active process. Further In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., “The Application describes registering and unregistering address spaces with a logical grouping of multiple systems so that the systems can access the address spaces of one another (Application, Figure 8)”) are not recited in the rejected claim. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Accordingly, Applicant’s arguments are not persuasive and the rejection is maintained.
As to point (V)
Examiner respectfully disagrees with the Applicant. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Iyigun as cited in [0001] and [0003] disclose swapping in/out memory pages used by a working process while executing correspond to the state information. Ammann was cited to copy memory contents from one area to the other. As such, the combination teaches the limitations as claimed. Accordingly, Applicant’s argument is not persuasive and the rejection is maintained.
As to point (VI)
Examiner respectfully disagrees with the Applicant. Claim 4 recites “restarting, in response to detecting an event affecting the state information, the copying the state information…” Zhou as cited detects failure during swap-out or swap-in and upon detecting failure reconstructs the span. As such, under its broadest reasonable interpretation, Zhou teaches the limitations as claimed. Accordingly, Applicant’s arguments are not persuasive and the rejection is maintained.
As to point (VII)
Examiner respectfully disagrees with the Applicant. Claim 7 recites "receiving a request to swap from the active address space to the shadow address space; in response to the request, copying state information from the active address space to the shadow address space; and swapping usage of the active address space to the shadow address space" Cheston as cited removes the designation of hidden section of memory to allow the backup copy to become the working copy of the application. As such, under its broadest reasonable interpretation, Cheston teaches the limitations as claimed. Accordingly, Applicant’s arguments are not persuasive and the rejection is maintained.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORGE A CHU JOY-DAVILA whose telephone number is (571)270-0692. The examiner can normally be reached Monday-Friday, 6:00am-5:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Aimee J Li can be reached at (571)272-4169. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JORGE A CHU JOY-DAVILA/Primary Examiner, Art Unit 2195
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