Prosecution Insights
Last updated: July 17, 2026
Application No. 18/536,021

RULE-BASED SOFT BUFFER MANAGEMENT

Final Rejection §103
Filed
Dec 11, 2023
Examiner
HAN, CLEMENCE S
Art Unit
2414
Tech Center
2400 — Computer Networks
Assignee
Qualcomm Incorporated
OA Round
2 (Final)
91%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
1025 granted / 1128 resolved
+32.9% vs TC avg
Moderate +5% lift
Without
With
+5.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
23 currently pending
Career history
1150
Total Applications
across all art units

Statute-Specific Performance

§101
3.0%
-37.0% vs TC avg
§103
50.7%
+10.7% vs TC avg
§102
17.6%
-22.4% vs TC avg
§112
17.5%
-22.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1128 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 14, 15, 25, 26 and 28 are rejected under 35 U.S.C. 103 as being unpatentable over Uchino et al. (US Pub. 2017/0280447) in view of Hsieh (US Pub. 2015/0256296). Regarding claims 1 and 26, Uchino teaches a user equipment (UE), comprising: one or more memories storing processor-executable code; and one or more processors coupled with the one or more memories and individually or collectively operable to execute the code to cause the UE to: attempt to decode a transport block received at the UE from a network entity (step S102 in Figure 5); store in a buffer, based at least in part on occurrence of a decoding failure during decoding of the transport block, information from the transport block (“in the case where the decoding of the DL data item has failed, the data item is stored in a soft buffer” in [0059]); apply a buffer management rule to manage capacity of the buffer (“The soft buffer in the user apparatus UE has a predetermined size according to the capability of the user apparatus UE. In the related art, the soft buffer is divided evenly by the number of cells (CC number), and received data items (DL MAC PDU, TB) are stored in the corresponding evenly divided areas” in [0016]), wherein the buffer management rule is common to both the UE and the network entity (see after ue sharing “soft buffer size” to eNB in step S301 in Figure 13, the ”soft buffer size” is common to both the UE and the eNB); transmit one or more negative acknowledgment (NACK) messages to the network entity, the one or more NACK messages indicative of the decoding failure of the transport block (step S103 in Figure 5); and receive one or more additional transport blocks responsive to the one or more NACK messages (“Retransmission Data” in step S105 in Figure 5). Uchino, however, does not teach information included in the one or more additional transport blocks is in accordance with the buffer management rule. Hsieh teaches information included in the one or more additional transport blocks is in accordance with the buffer management rule (“retransmit the TB to a receiver (e.g., UE), wherein the number of bits transmitted within the TTI may be determined according to a soft buffer size” in [0007]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Uchino to have information included in the one or more additional transport blocks is in accordance with the buffer management rule as taught by Hsieh in order to increase a probability of successful decoding [0007]. Regarding claim 2, Uchino teaches resources allocated to the buffer include a shared resource pool that is available for storage that pertains to a plurality of component carriers in carrier aggregation (see “In carrier aggregation, communications are performed by having a predetermined bandwidth as a basic unit and using a plurality of carriers at the same time” in [0004] and “appropriately divide a buffer used for controlling retransmission of downlink data in a user apparatus which performs the carrier aggregation” in [0150]). Regarding claims 14 and 25, Uchino teaches the one or more processors are individually or collectively further operable to execute the code to cause the UE to: receive control signaling from the network entity indicating the buffer management rule for managing the buffer (see “the base station eNB transmits the determined dividing number to the user apparatus UE. The transmission may be performed by an RRC signal, a MAC signal, or a PHY signal” in [0108] and “the user apparatus UE that has received the dividing number divides the soft buffer by using the buffer control unit 156, and performs HARQ control of DL data by using the divided soft buffer” in [0109]. Regarding claims 15 and 28, Uchino teaches a network entity, comprising: one or more memories storing processor-executable code; and one or more processors coupled with the one or more memories and individually or collectively operable to execute the code to cause the network entity to: transmit a transport block to a user equipment (UE) over a downlink shared channel (“DATA (PDSCH)” in step S101 in Figure 5); receive one or more negative acknowledgment (NACK) messages, the one or more NACK messages associated with the transport block (step S103 in Figure 5); determine, based at least in part on receipt of the one or more NACK messages, that information from the transport block is stored at a buffer at the UE (“The soft buffer in the user apparatus UE has a predetermined size according to the capability of the user apparatus UE. In the related art, the soft buffer is divided evenly by the number of cells (CC number), and received data items (DL MAC PDU, TB) are stored in the corresponding evenly divided areas” in [0016]) based at least in part on a buffer management rule that is common to both the network entity and the UE (see after ue sharing “soft buffer size” to eNB in step S301 in Figure 13, the ”soft buffer size” is common to both the UE and the eNB); and transmit, to the UE, one or more additional transport blocks responsive to the one or more NACK messages (“Retransmission Data” in step S105 in Figure 5). Uchino, however, does not teach information included in the one or more additional transport blocks is in accordance with the buffer management rule. Hsieh teaches information included in the one or more additional transport blocks is in accordance with the buffer management rule (“retransmit the TB to a receiver (e.g., UE), wherein the number of bits transmitted within the TTI may be determined according to a soft buffer size” in [0007]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Uchino to have information included in the one or more additional transport blocks is in accordance with the buffer management rule as taught by Hsieh in order to increase a probability of successful decoding [0007]. Claims 3-5, 16, 17 and 27 are rejected under 35 U.S.C. 103 as being unpatentable over Uchino et al. in view of Hsieh and further in view of Zhu et al. (US Pub. 2022/0159768). Regarding claims 3 and 27, Uchino in view of Hsieh teaches the limitations in claims 1 and 26 as shown above. Uchino in view of Hsieh, however, does not teach the buffer management rule indicates that the buffer is associated with a timer-based storage of transport blocks, and an individual transport block is removed from the buffer after a timer expires for the individual transport block. Zhu teaches the buffer management rule indicates that the buffer is associated with a timer-based storage of transport blocks, and an individual transport block is removed from the buffer after a timer expires for the individual transport block (see “Removing one or more UE data packets from buffer based on timer” in step 1602 in Figure 16). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Uchino in view of Hsieh to have the buffer management rule indicates that the buffer is associated with a timer-based storage of transport blocks, and an individual transport block is removed from the buffer after a timer expires for the individual transport block as taught by Zhu in order to keep a UE's uplink data packet in its buffer until the indicated maximum time [0221]. Regarding claim 4, Zhu teaches the timer begins at a reference time that is associated with one of receipt of a downlink control information message that schedules the transport block, transmission of the transport block (“removing one or more UE data packets from a buffer based on a timer (e.g., an uplink retransmission timer that is to indicate a maximum time that the relay node will keep a UE's uplink data packet in its buffer)” in [0221]), or an acknowledgment (ACK) or NACK reporting time for the transport block. Regarding claims 5 and 17, Zhu teaches the one or more processors are individually or collectively further operable to execute the code to cause the UE to: receive a value of the timer via a radio resource configuration (RRC) message (“a control message (e.g., F1-AP, RRC, etc.) to configure the timer” in [0222]). Regarding claim 16, Uchino in view of Hsieh teaches the limitations in claim 15 as shown above. Uchino in view of Hsieh, however, does not teach the buffer management rule indicates that the buffer is associated with a timer-based storage of transport blocks, wherein purging of the buffer is based on a duration of individual transport blocks in the buffer with respect to a timer. Zhu teaches the buffer management rule indicates that the buffer is associated with a timer-based storage of transport blocks, wherein purging of the buffer is based on a duration of individual transport blocks in the buffer with respect to a timer (see “Removing one or more UE data packets from buffer based on timer” in step 1602 in Figure 16). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Uchino in view of Hsieh to have the buffer management rule indicates that the buffer is associated with a timer-based storage of transport blocks, wherein purging of the buffer is based on a duration of individual transport blocks in the buffer with respect to a timer as taught by Zhu in order to keep a UE's uplink data packet in its buffer until the indicated maximum time [0221]. Claims 7, 19 and 29 are rejected under 35 U.S.C. 103 as being unpatentable over Uchino et al. in view of Hsieh and further in view of Aweya et al. (US 6,788,697). Regarding claims 7, 19 and 29, Uchino in view of Hsieh teaches the limitations in claims 1, 15 and 28 as shown above. Uchino in view of Hsieh, however, does not teach the buffer management rule indicates that the buffer is associated with a buffer size threshold for storage of transport blocks, and an individual transport block is removed from the buffer based on the buffer size threshold being exceeded and based on a relative time duration of the individual transport block in the buffer with respect to other individual transport blocks in the buffer. Aweya teaches the buffer management rule indicates that the buffer is associated with a buffer size threshold for storage of transport blocks, and an individual transport block is removed from the buffer based on the buffer size threshold being exceeded and based on a relative time duration of the individual transport block in the buffer with respect to other individual transport blocks in the buffer (see “each queue is only allowed to grow up to a maximum length which is statically defined. Arriving packets destined to a queue whose length is equal to their threshold are discarded” in Column 2 Line 6-9, the newly arrived packet with respected to other packets in the queue is discarded). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Uchino in view of Hsieh to have the buffer management rule indicates that the buffer is associated with a buffer size threshold for storage of transport blocks, and an individual transport block is removed from the buffer based on the buffer size threshold being exceeded and based on a relative time duration of the individual transport block in the buffer with respect to other individual transport blocks in the buffer. as taught by Aweya in order to ensure fairness (Column 2 Line 14). Claims 8, 11, 20, 23 and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Uchino et al. in view of Hsieh and further in view of Elshafie et al. (US Pub. 2022/0103304). Regarding claims 8, 20 and 30, Uchino in view of Hsieh teaches the limitations in claims 1, 15 and 28 as shown above. Uchino in view of Hsieh, however, does not teach the buffer management rule indicates that the buffer is associated with a priority-based storage of transport blocks, wherein a purging of individual transport blocks from the buffer is based at least in part on respective priorities of the individual transport blocks. Elshafie teaches the buffer management rule indicates that the buffer is associated with a priority-based storage of transport blocks, wherein a purging of individual transport blocks from the buffer is based at least in part on respective priorities of the individual transport blocks (“the UE may drop the L2 HARQ-ACK/NACK feedback packets selected from the low priority buffer 610” in [0108]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Uchino in view Hsieh to have the buffer management rule indicates that the buffer is associated with a priority-based storage of transport blocks, wherein a purging of individual transport blocks from the buffer is based at least in part on respective priorities of the individual transport blocks as taught by Elshafie in order to handle uplink resource overlap with packets with different priorities [0108]. Regarding claims 11 and 23, Uchino teaches a buffer storage allocation of the buffer is allocated based at least in part on different priority levels that include at least a first priority level and a second priority level, wherein a first portion of the buffer is allocated for the first priority level (“a low priority buffer 610” in [0108]) and a second portion of the buffer is allocated for the second priority level (“high priority buffer 605” in [0108]). Claims 9 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Uchino et al. in view of Hsieh and Elshafie et al. and further in view of Lei (US Pub. 2025/0150211). Regarding claims 9 and 21, Uchino in view of Hsieh and Elshafie teaches the limitations in claims 8 and 20 as shown above. Uchino in view of Hsieh and Elshafie, however, does not teach the one or more processors are individually or collectively further operable to execute the code to cause the UE to: receive indications of the respective priorities via respective downlink control information messages that schedule the individual transport blocks. Lei teaches the one or more processors are individually or collectively further operable to execute the code to cause the UE to: receive indications of the respective priorities via respective downlink control information messages that schedule the individual transport blocks (“The priority of a TB or PDSCH carrying the TB may be indicated in the scheduling DCI” in [0098]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Uchino in view of Hsieh and Elshafie to have the one or more processors are individually or collectively further operable to execute the code to cause the UE to: receive indications of the respective priorities via respective downlink control information messages that schedule the individual transport blocks as taught by Lei in order to decode TBs based on the priorities associated with the respective TBs [0098]. Claims 10 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Uchino et al. in view of Hsieh and Elshafie et al. and further in view of Zhu et al.. Regarding claims 10 and 22, Uchino in view of Hsieh and Elshafie teaches the limitations in claims 8 and 20 as shown above. Elshafie also teaches the purging of individual transport blocks from the buffer is based at least in part on the respective priorities (“the UE may drop the L2 HARQ-ACK/NACK feedback packets selected from the low priority buffer 610” in [0108]). Uchino in view of Hsieh and Elshafie, however, does not teach the buffer management rule further indicates that the buffer is associated with a timer-based storage of transport blocks, wherein the purging of individual transport blocks from the buffer is based at least in part on a duration of the individual transport blocks in the buffer. Zhu teaches the buffer management rule further indicates that the buffer is associated with a timer-based storage of transport blocks, wherein the purging of individual transport blocks from the buffer is based at least in part on a duration of the individual transport blocks in the buffer (see “Removing one or more UE data packets from buffer based on timer” in step 1602 in Figure 16). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Uchino in view of Hsieh and Elshafie to have the buffer management rule further indicates that the buffer is associated with a timer-based storage of transport blocks, wherein the purging of individual transport blocks from the buffer is based at least in part on a duration of the individual transport blocks in the buffer as taught by Zhu in order to keep a UE's uplink data packet in its buffer until the indicated maximum time [0221]. Claims 12, 13 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Uchino et al. in view of Hsieh and Elshafie et al. and further in view of Chakravorty (US Pub. 2010/0008228). Regarding claims 12 and 24, Uchino in view of Hsieh and Elshafie teaches the limitations in claims 11 and 23 as shown above. Uchino in view of Hsieh and Elshafie, however, does not teach the one or more processors are individually or collectively further operable to execute the code to cause the UE to: receive an indication of the buffer storage allocation indicative of the first portion and the second portion. Chakravorty teaches the one or more processors are individually or collectively further operable to execute the code to cause the UE to: receive an indication of the buffer storage allocation indicative of the first portion and the second portion (see “a predetermined minimum allocation of network resources dedicated to the buffer to ensure unencumbered high-priority data transfer between the communication device and a destination within the network system” in [0026] and “The remaining queue space, if any, may be allocated to low-priority traffic” in [0029]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Uchino in view of Hsieh and Elshafie to have the one or more processors are individually or collectively further operable to execute the code to cause the UE to: receive an indication of the buffer storage allocation indicative of the first portion and the second portion as taught by Chakravorty in order to ensure unencumbered high-priority data transfer between the communication device and a destination within the network system [0029]. Regarding claim 13, Chakravorty teaches the one or more processors are individually or collectively further operable to execute the code to cause the UE to: allocate the buffer storage allocation dynamically between the first portion and the second portion (“the high-priority data buffer adjusts dynamically (e.g., via dynamic threshold level 330)” in [0030] and “The remaining queue space, if any, may be allocated to low-priority traffic” in [0029]). Allowable Subject Matter Claims 6 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CLEMENCE S HAN whose telephone number is (571)272-3158. The examiner can normally be reached Monday-Friday 8AM-5PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Edan Orgad can be reached at (571)272-7884. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CLEMENCE S HAN/ Primary Examiner, Art Unit 2414
Read full office action

Prosecution Timeline

Dec 11, 2023
Application Filed
Jan 08, 2026
Non-Final Rejection mailed — §103
Mar 31, 2026
Response Filed
Jun 17, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
91%
Grant Probability
96%
With Interview (+5.3%)
2y 4m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1128 resolved cases by this examiner. Grant probability derived from career allowance rate.

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