DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application is being examined under the pre-AIA first to invent provisions.
For reissue applications filed before September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the law and rules in effect on September 15, 2012. Where specifically designated, these are “pre-AIA ” provisions.
For reissue applications filed on or after September 16, 2012, all references to 35 U.S.C. 251 and 37 CFR 1.172, 1.175, and 3.73 are to the current provisions.
Reissue Applications
The instant application is a broadening reissue of U.S. Patent No. 9,383,792 to Fujimoto (hereinafter the ‘792 patent), granted on 5 July 2016. In response to the previous office action, claim 15 has been amended and claims 16-23 have been added. Claims 15-23 have been examined.
Applicant is reminded of the continuing obligation under 37 CFR 1.178(b), to timely apprise the Office of any prior or concurrent proceeding in which the ‘792 patent or its child reissue patents are or were involved. These proceedings would include any trial before the Patent Trial and Appeal Board, interferences, reissues, reexaminations, supplemental examinations, and litigation.
Applicant is further reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is material to patentability of the claims under consideration in this reissue application.
These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04.
Applicant is notified that any subsequent amendment to the specification and/or claims must comply with 37 CFR 1.173(b). In addition, for reissue applications filed before September 16, 2012, when any substantive amendment is filed in the reissue application, which amendment otherwise places the reissue application in condition for allowance, a supplemental oath/declaration will be required. See MPEP § 1414.01.
Priority
The instant application is a continuation reissue of Application Nol. 17/890,773, now U.S. Patent No. RE49,829 (hereinafter the ‘829 reissue), filed on 18 August 2022. The ‘829 reissue was filed as a continuation reissue of Application No. 17/135,608, now U.S. Patent No. RE49,235 (hereinafter the ‘235 reissue), filed on 28 December 2020. The ‘235 reissue was filed as a continuation reissue of Application No. 16/249,093, now U.S. Patent No. RE48,418 (hereinafter the ‘418 reissue), filed on 16 January 2019. The ‘418 reissue was filed as a continuation reissue of Application No. 15/463,738, now U.S. Patent No. RE47,308 (hereinafter the ‘308 reissue), filed on 20 March 2017. The ‘308 reissue was filed as a reissue of Application No. 14/312,543, now U.S. Patent No. 9,383,792 (hereinafter the ‘’792 patent), filed 23 June 2014. The ’792 patent was filed as a continuation of Application No. 13/667,285, now U.S. Patent No. 8,799,689 (hereinafter the ‘689 patent), filed 2 November 2012. The ‘689 patent was filed as a continuation of Application No. 12/933,586, now U.S. Patent No. 8,321,697 (hereinafter the ‘697 patent), filed 20 September 2010. The ‘697 patent was the national stage entry under 35 U.S.C. 371 of Application No. PCT/JP2008/06618, filed 9 September 2008 (hereinafter the ‘618 PCT). The ‘618 PCT claimed priority to Japan Applications Nos. 2008-072429, filed 19 March 2008, and 2008-099740, filed 7 April 2008.
Application Data Sheet
The Application Data Sheet filed on 22 December 2025 is acceptable.
Oath/Declaration
The reissue declaration filed with this application is defective (see 37 CFR 1.175 and MPEP § 1414) because of the following:
The error statement points to a new limitation in claim 15 (“an interface with first-third pins”) that, in and of itself, is further limiting, rather than broadening in scope. The error statement should point to an aspect of the new claims that is broadening in scope over the original claims.
Claim Rejections - 35 USC § 251
Claims 15-23 are rejected as being based upon a defective reissue declaration under 35 U.S.C. 251 as set forth above. See 37 CFR 1.175.
The nature of the defect(s) in the declaration is set forth in the discussion above in this Office action.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 15-23 are rejected under 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the applicant regards as the invention.
Claim 15 recites the limitations “third pins” in line 5. It is unclear how many pins would be needed to satisfy this limitation. For purposes of the prior art search, it is being presumed that this reads “a plurality of pins.”
Claim 15 further recites “each of the third pins corresponds to a third signal line.” It is unclear from this wording as to whether the third pins each correspond to a separate signal line, or if they all correspond to a common signal line. For purposes of the prior art search, it is being presumed that each corresponds to a separate signal line.
Claim 15 further recites “operate the writing or reading of the data at the first voltage when the switching is not possible and sends to the host device the second response signal for handshake processing to operate the writing or reading when the switching is possible” in lines 21-24. This lacks proper antecedent basis because there is no previous recitation as to whether or not the switching is possible.
Claim 19 recites the limitations "the processing for the switching of the signal voltage," “the ground level,” and “the switched signal voltage” in lines 3, 4, and 5, respectively. There is insufficient antecedent basis for these limitations in the claim.
Claims 20 and 21 each recite the limitations “the switched signal voltage” and “the ground level” in lines 3 and 6-7, respectively. There is insufficient antecedent basis for these limitations in the claims.
Claims 16-23 are dependent upon base claim 15 and incorporate all of its limitations, rendering them likewise indefinite.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 15-23 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 15-23 of the ‘829 reissue. Although the claims at issue are not identical, they are not patentably distinct from each other because:
Claim 15 of the ‘829 reissue recites a memory storage device connectable to a host device comprising: a memory that stores data; a memory controller that controls the memory; an interface that includes a regulator that outputs a first voltage and a second voltage which is lower than the first voltage, a first signal line, a second signal line, and a third signal (data) lines; the interface receives a command signal from the host device via the first signal line, the command signal requesting switching of a signal voltage for operation of writing or reading of the data, receives a clock signal from the host device via the second signal line, transmits either one of a first response signal or a second response signal to the host device via the first signal line, receives data signals from the host device to store data in the memory via the third signal lines, and transmits data signals corresponding to the data stored in the memory via the third signal lines, the receiving and transmitting of the data signal being performed at the signal voltage of the first voltage or the second voltage which is lower than the first voltage; and after receiving the command signal, the memory controller sends to the host device the first response signal to operate the writing or reading of the data at the first voltage when the switching is not possible and sends to the host device the second response signal for handshake processing to operate the writing or reading of the data at the second voltage when the switching is possible.
Although claim 15 of the ‘829 reissue does not explicitly recite pins that correspond to the respective signal lines, Official notice is given that it is well-known in the art to use pins on semiconductor devices to connect to signaling circuitry in order to communicate, and that it would be obvious to one of ordinary skill in the art to so implement the ‘829 reissue’s device to communicate.
Claims 16-23 are essentially the same as claims 16-23 of the ‘829 reissue.
Claim 15 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 16 of the ‘235 reissue. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims are directed to the same invention of transmitting/receiving a signal between a host device and a memory card at a first voltage or a second voltage. Claim 16 of the ‘235 reissue recites a method comprising: wherein the interface receives a command signal from the host device via the first signal line, the command signal requesting switching of a signal voltage for operation of writing or reading of the data, receives a clock signal from the host device via the second signal line, transmits either one of a first response signal or a second response signal to the host device via the first signal line, receives data signals from the host device to store data in the memory via the third signal (data) lines, and transmits data signals corresponding to the data stored in the memory via the third signal lines, the receiving and transmitting of the data signal being performed at the signal voltage of the first voltage or the second voltage which is lower than the first voltage; and after receiving the command signal, the memory controller sends to the host device the first response signal to operate the writing or reading of the data at the first voltage when the switching is not possible and sends to the host device the second response signal for handshake processing to operate the writing or reading of the data at the second voltage when the switching is possible.
Although claim 16 of the ‘235 reissue does not explicitly recite pins that correspond to the respective signal lines, a memory that stores data; a memory controller that controls the memory; and a regulator that outputs a first voltage and a second voltage which is lower than the first voltage. Official notice is given that it is well-known in the art to use pins on semiconductor devices to connect to signaling circuitry in order to communicate, and that it would be obvious to one of ordinary skill in the art to so implement the ‘235 reissue’s device to communicate. The remaining limitations would be implicitly required for execution of the method of claim 16 of the ‘235 reissue.
Claim 15 and 20-23 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 15 and 17-20 of the ‘418 reissue. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims are directed to the same invention of transmitting/receiving a signal between a host device and a memory card at a first voltage or a second voltage. Claim 15 of the ‘418 reissue recites a memory storage device connectable to a host device comprising: a memory that stores data; a memory controller that controls the memory; an interface; and a regulator that outputs a first voltage and a second voltage which is lower than the first voltage, a first signal line, a second signal line, and third signal lines (data); the interface receives a command signal from the host device via the first signal line, the command signal requesting switching of a signal voltage for operation of writing or reading of the data, receives a clock signal from the host device via the second signal line, transmits either one of a first response signal or a second response signal to the host device via the first signal line, receives data signals from the host device to store data in the memory via the third signal lines, and transmits data signals corresponding to the data stored in the memory via the third signal lines, the receiving and transmitting of the data signal being performed at the signal voltage of the first voltage or the second voltage which is lower than the first voltage (i.e. ground); and after receiving the command signal, the memory controller sends to the host device the first response signal to operate the writing or reading of the data at the first voltage when the switching is not possible and sends to the host device the second response signal for handshake processing to operate the writing or reading of the data at the second voltage when the switching is possible.
Although claim 15 of the ‘418 reissue does not explicitly recite pins that correspond to the respective signal lines, Official notice is given that it is well-known in the art to use pins on semiconductor devices to connect to signaling circuitry in order to communicate, and that it would be obvious to one of ordinary skill in the art to so implement the ‘418 reissue’s device to communicate.
Claims 20-23 are essentially the same as claims 17-20, respectively, of the ‘418 reissue.
Claim 15 and 20-23 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 15 and 17-20 of the ‘308 reissue. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims are directed to the same invention of transmitting/receiving a signal between a host device and a memory card at a first voltage or a second voltage. Claim 15 of the ‘308 reissue recites a memory storage device connectable to a host device comprising: a memory that stores data; a memory controller that controls the memory; an interface; and a regulator that outputs a first voltage and a second voltage which is lower than the first voltage, a first signal line, a second signal line, and third signal lines (data); the interface receives a command signal from the host device via the first signal line, the command signal requesting switching of a signal voltage for operation of writing or reading of the data, receives a clock signal from the host device via the second signal line, transmits either one of a first response signal or a second response signal to the host device via the first signal line, receives data signals from the host device to store data in the memory via the third signal lines, and transmits data signals corresponding to the data stored in the memory via the third signal lines, the receiving and transmitting of the data signal being performed at the signal voltage of the first voltage or the second voltage which is lower than the first voltage (i.e. ground); and after receiving the command signal, the memory controller sends to the host device the first response signal to operate the writing or reading of the data at the first voltage when the switching is not possible and sends to the host device the second response signal for handshake processing to operate the writing or reading of the data at the second voltage when the switching is possible.
Although claim 15 of the ‘308 reissue does not explicitly recite pins that correspond to the respective signal lines, Official notice is given that it is well-known in the art to use pins on semiconductor devices to connect to signaling circuitry in order to communicate, and that it would be obvious to one of ordinary skill in the art to so implement the ‘418 reissue’s device to communicate.
Claims 20-23 are essentially the same as claims 17-20, respectively, of the ‘308 reissue.
Allowable Subject Matter
Claims 15-23 would be allowable if rewritten or amended to overcome the rejection(s) under non-statutory double patenting and 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
No art was found that discloses or render obvious the memory storage device such that:
“the receiving and transmitting of the data signal being performed at the signal voltage of the first voltage or the second voltage which is lower than the first voltage; and after receiving the command signal, the memory controller sends to the host device the first response signal to operate the writing or reading of the data at the first voltage when the switching is not possible and sends to the host device the second response signal for handshake processing to operate the writing or reading of the data at the second voltage when the switching is possible.”
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW E HENEGHAN whose telephone number is (571)272-3834. The examiner can normally be reached M-F 8-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michael Fuelling can be reached at (571)270-1367. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MATTHEW E HENEGHAN/Primary Examiner, Art Unit 3992
Conferees:
/Ovidio Escalante/
Primary Examiner, Art Unit 3992
/M.F/Supervisory Patent Examiner, Art Unit 3992