Prosecution Insights
Last updated: July 17, 2026
Application No. 18/537,469

METHODS AND APPARATUS FOR MAKING A TIME-SYNCHRONISED PHASOR MEASUREMENT

Final Rejection §101§103§112
Filed
Dec 12, 2023
Priority
Jun 28, 2018 — GB 1810680.7 +3 more
Examiner
SUN, XIUQIN
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Synaptec Limited
OA Round
2 (Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
8m
Est. Remaining
76%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
435 granted / 599 resolved
+4.6% vs TC avg
Minimal +4% lift
Without
With
+3.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
30 currently pending
Career history
634
Total Applications
across all art units

Statute-Specific Performance

§101
16.1%
-23.9% vs TC avg
§103
67.9%
+27.9% vs TC avg
§102
10.1%
-29.9% vs TC avg
§112
3.0%
-37.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 599 resolved cases

Office Action

§101 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments 2. Applicant's arguments received 02/16/2026 have been considered but are moot in view of the new ground(s) of rejection. Detailed response is given in sections 3-10 as set forth below in this Office action. Regarding the claim eligibility, Applicant argues (REMARKS, p.6-7): PNG media_image1.png 477 732 media_image1.png Greyscale Examiner respectfully disagrees. Examiner reminds to the Applicant that during patent examination, the pending claims must be given the broadest reasonable interpretation consistent with the specification. Under a broadest reasonable interpretation (BRI), words of the claim must be given their plain meaning, unless such meaning is inconsistent with the specification. The plain meaning of a term means the ordinary and customary meaning given to the term by those of ordinary skill in the art at the relevant time. See MPEP 2111.01. Moreover, although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). With these principles in mind, Examiner holds the position that: focusing on what the inventors have invented exactly, the pending claims 1, 3-4, 6-7, 9-11 and 14-16 are directed to an abstract idea of making a time-synchronised phasor measurement in a power network, but without reciting any additional limitation/element that amounts to significantly more. As discussed in details in section 6 below, each of the limitations S3, S4, S5 and S6 or their combination recited in the bolded portion of the representative claim 1 encompasses a judicial exception falling within a combination of the “Mathematical Concepts” and “Mental Process” Groupings of Abstract Ideas defined by the 2019 PEG. The claim recites “an interrogator” at a high level of generality. Under the BRI, it reads on an electronic device comprising a general-purpose microprocessor, a memory, and an optical fiber link interface. Such “an interrogator” is well-understood and/or conventional in the field (see discussion of the DIONNE reference in section 8 below). The claimed “interrogator” is merely used to gather/transmit data/information and perform data manipulation via basic functions of the general-purpose microprocessor. The claim does not specify how the “interrogator” operates to transmit the data/information in a unique way that is never done before and that improves the application of the data/information. Further, according to the MPEP 2106.04(a)(2), if a claim limitation, under its broadest reasonable interpretation, covers mental processes except for the mention of generic computer components performing computing activities via basic function of the computer, then the claim is likely considered to be directed to an ineligible abstract idea, as it essentially describes a mental process that could be performed by a human without the computer components adding any significant practical application beyond the abstract concept itself. SRI International, Inc. v. Cisco Systems, Inc., 930 F.3d 1295 (Fed. Cir. 2019), affirmed that network security claims involving multi-level monitoring are patent-eligible under 35 U.S.C. § 101 because they improve computer network functionality rather than just collecting data. The court distinguished this from purely abstract ideas by focusing on specific, technological improvements in detecting network intruders. SiRF Technology, Inc. v. International Trade Commission, 601 F.3d 1319 (Fed. Cir. 2010), affirmed that the claims for "processing" and "representing" data in a GPS receiver were not abstract ideas because they were tied to a specific machine (the GPS receiver) to improve. The claim SiRF is patentable subject matter because it explicitly required the use of a GPS receiver and could not be performed without it. In the instant case, with the BRI to the claimed “interrogator”, the bolded portion of representative claim 1 is not necessarily tied to the use of a particular machine/device such as a GPS receiver. Moreover, the representative claim 1 as a whole does not transform the output (e.g., the time-stamped phasor) of the identified abstract idea into a different physical state or thing, nor does it feedback the output of the abstract idea to the claimed “interrogator” to improve its functionality. As such, the decisions in those two cases which were fact specific are not analogous to the instant claims of the present application. CyberSource Corp. v. Retail Decisions, Inc., 654 F.3d 1366 (Fed. Cir. 2011) affirmed that methods for detecting fraud via internet transaction analysis are unpatentable "abstract ideas" under 35 U.S.C. § 101, as they can be performed mentally. The ruling established that merely implementing a mental process on a computer or storing it on a computer-readable medium does not render the method patent-eligible. The court decision of CyberSource is in fact in favor of Examiner’s position for the pending claims of the present application. Accordingly, Examiner maintains that the limitations of the “interrogator” in question do not amount to “significantly more” in either Step 2A or Step 2B of the Alice framework. The rest of the Applicant’s arguments with respect to the subject matter eligibility are reliant upon the issues discussed above or have been fully addressed in the detailed response as set forth in sections 5-6 below in this Office action. Regarding the 103 rejection, Applicant argues (REMARKS, p.10): PNG media_image2.png 284 715 media_image2.png Greyscale Examiner respectfully disagrees. Examiner recognizes that obviousness can only be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988) and In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992). Examiner further recognizes that the test for obviousness is not whether the features of a second reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). In this case, it is deemed that both DIONNE and Wang are in the same field of endeavor and deal with related subject matter (i.e., making a time-synchronised phasor measurement, see DIONNE’s para. 0014 and Wang’s para. 0015). The Examiner considers that: the teaching of DIONNE includes receiving, at an interrogator (master device 102 in Fig. 2), an optical signal from a voltage and/or current sensor (DSM 116 of the slave device 110 in Fig. 2) via an optical fibre (para. 0015, 0031-0032: “The master device 102 and each slave device 110 communicate over a dedicated isochronous link 130. … The physical links (130) may include optical fiber …”; see also para, 0034: “a plurality of DMS 116 for generating delta-sigma bitstreams each representing the power system signal (current or voltage) for one phase of a multi-phase system”), and calculating, at the interrogator, a condition quantity (e.g., synchrophasor measurements of the power system fundamental) representing measurements of power quantity from the received sensor signal (para. 0015-0016, 0020, 0023, 0029, 0033). DIONNE does not mention explicitly: determining, at the interrogator, a sensed voltage and/or current from the received optical signal. Thus, the subject matter of the instant claim 1 differs from DIONNE in that: said interrogator is configured to provide an additional function for determining the sensed voltage and/or current from the received optical signal. To remedy this deficiency, Examiner looks into the Wang reference, which includes: providing an interrogator (e.g., apparatus 40 comprising processor 42, see Fig. 2) having a plurality of remotely-connected (via network 32 Fig. 2) voltage and/or current sensor (36/38 Fig. 2); configuring and/or programming the interrogator to perform: receiving, at the interrogator, an optical signal from at least one voltage and/or current sensor (36 or 38 Fig. 2) via an optical fibre (para. 0048, 0049, 0065), wherein said optical signal comprising time-stamped measurements of power quantity (measurements of voltage and/or current information; see para. 0015, 0040); and determining, at the interrogator, a sensed voltage and/or current from the received optical signal (para. 0049: “At least one of the first and second measurement units may be in signal communication with the processor, for example, by way of a copper, optical fibre or wireless link, whereby the processor may receive measurements from a measurement unit. The processor may be operative to provide at least one of the first and second quantities in dependence on received measurements. More specifically the processor may be operative to receive raw measurements, for example in the form of voltage phasor measurements, and to provide in dependence on the received measurements first and second quantities as described above with reference to the first aspect of the present invention, such as voltage or current amplitudes and voltage or current phase angles”). Based on one of the KSR v. Teleflex rationales, Examiner considers that it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to modify DIONNE in view of Wang’s teaching of the interrogator’s capability of determining a sensed voltage and/or current from the received optical signal to arrive the claimed invention. It is deemed that such a modification involves merely adding Wang’s additional function of data manipulation into the DIONNE’s interrogator, but would not undermine or contradict the operation of the DIONNE’s interrogator. Further, the combination of DIONNE and Wang is based on a real, plausible motivation to combine, that is: doing so would avoid providing for full or partial signal processing capabilities in every power measurement device, thus reduce the cost of the entire power measurement system (DIONNE, para. 0018). Applicant’s arguments in this regard are therefore not persuasive. The rest of the Applicant’s arguments with respect to the 103 rejection are reliant upon the issue discussed above or have been fully addressed in the detailed response as set forth in sections 7-10 below in this Office action. Rejections - 35 USC § 112 3. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.--The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 4. Claims 15 and 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claims 15 and 16 recite the limitation “the phasor”. There is insufficient antecedent basis for this limitation in the claims. Therefore, the examiner comprehends the claims based on her best interpretations to these phrases. Claim Rejections - 35 USC § 101 5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 101 that form the basis for the rejections under this section made in this Office action: 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. 6. Claims 1, 3-4, 6-7, 9-11 and 14-16 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Under the 2019 PEG (now been incorporated into MPEP 2106), the revised procedure for determining whether a claim is "directed to" a judicial exception requires a two-prong inquiry into whether the claim recites: (1) any judicial exceptions, including certain groupings of abstract ideas (i.e., mathematical concepts, certain methods of organizing human interactions such as a fundamental economic practice, or mental processes); and (2) additional elements that integrate the judicial exception into a practical application (see MPEP § 2106.05(a)-(c), (e)-(h)). Only if a claim (1) recites a judicial exception and (2) does not integrate that exception into a practical application, do we then look to whether the claim: (3) adds a specific limitation beyond the judicial exception that is not "well-understood, routine, conventional" in the field (see MPEP § 2106.0S(d)); or (4) simply appends well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception. Claims 1, 3-4, 6-7, 9-11 and 14-16 are directed to an abstract idea of making a time-synchronised phasor measurement in a power network. Specifically, representative claim 1 recites: A method of making a time-synchronised phasor measurement comprising: (S1) receiving, at an interrogator, an optical signal from a voltage and/or current sensor via an optical fibre; (S2) receiving, at the interrogator, a time synchronisation signal; (S3) determining a time t at which the signal is received from the voltage and/or current sensor; (S4) determining, at the interrogator, a phase delay p corresponding to the voltage and/or current sensor; (S5) determining, at the interrogator, a sensed voltage and/or current from the received optical signal; (S6) calculating, at the interrogator, a phasor, wherein the phase of the phasor is offset by the phase delay p; and (S7) time-stamping the phasor with the time t at the interrogator. The claim limitations in the abstract idea have been highlighted in bold above; the remaining limitations are “additional elements”. The highlighted portion of the claim constitutes an abstract idea under the 2019 Revised Patent Subject Matter Eligibility Guidance and the additional elements are NOT sufficient to amount to significantly more than the judicial exceptions, as analyzed below: Step Analysis 1. Statutory Category ? Yes. Method 2A - Prong 1: Judicial Exception Recited? Yes. Under its broadest reasonable interpretation (BRI), each or the combination of the steps S3, S4, S5 and S6 in the bolded portion encompasses mathematical concepts, namely a series of calculations leading to one or more numerical results or answers (see Spec. US 20240125827 A1, para. 0151, 0123, 0128-0130, 0148), which can also be performed in the human mind or with pen and paper. Note, the courts consider a mental process (thinking) that "can be performed in the human mind, or by a human using a pen and paper" to be an abstract idea. See CyberSource Corp. v. Retail Decisions, Inc., 654 F.3d 1366, 1372, 99 USPQ2d 1690, 1695 (Fed. Cir. 2011). See also to MPEP 2106.04(a)(2).III The limitation of “an interrogator” is recited at a high level of generality. Under the BRI, it encompasses a general-purpose computer and related computing components. According to the MPEP 2106.04(a)(2), if a claim limitation, under its broadest reasonable interpretation, covers mental processes except for the mention of generic computer components performing computing activities via basic function of the computer, then the claim is likely considered to be directed to an ineligible abstract idea, as it essentially describes a mental process that could be performed by a human without the computer components adding any significant practical application beyond the abstract concept itself. Nothing in these steps precludes said “determining …” and said “calculating …” from practically being performed in the mind and/or using a pen and paper. Further, although it does not spell out any particular equation or formula being used, the lack of specific equations for individual steps merely indicates that the claim would monopolize all possible calculations in performing the steps. As such, the bolded portion of instant claim 1 falls within a combination of the “Mathematical Concepts” and “Mental Process” Groupings of Abstract Ideas defined by the 2019 PEG. 2A - Prong 2: Integrated into a Practical Application? No. Each of the steps S1 and S2 reads on merely a process of gathering the data/information necessary for performing the abstract idea identified above in 2A - Prong 1. According to MPEP 2106.05(g)(3): … that were described as mere data gathering in conjunction with a law of nature or abstract idea. As such, it represents an extra-solution activity to the judicial exception. The step S7 is considered an insignificant post-solution activity to the judicial exception, which is not qualified for meaningful limitations to integrate the identified judicial exception into a practical application. MPEP 2106.05(g) and 2106.04(d). In general, the claim as a whole does not meet any of the following criteria to integrate the abstract idea into a practical application: An additional element reflects an improvement in the functioning of a computer, or an improvement to other technology or technical field; an additional element that applies or uses a judicial exception to effect a particular treatment or prophylaxis for a disease or medical condition; an additional element implements a judicial exception with, or uses a judicial exception in conjunction with, a particular machine or manufacture that is integral to the claim; an additional element effects a transformation or reduction of a particular article to a different state or thing; and an additional element applies or uses the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception. Various considerations are used to determine whether the additional elements are sufficient to integrate the abstract idea into a practical application. However, in all of these respects, the claim fails to recite additional elements which might possibly integrate the claim into a particular practical application. Instead, based on the above considerations, the claim would tend to monopolize the algorithm across a wide range of applications. 2B: Claim provides an Inventive Concept? No. Focusing on what the inventors have invented exactly, it is considered that the “core” of pending claim 1 is directed to an abstract algorithm of calculating a phasor from the received signal. None of the additional elements recited in claim 1, e.g., “receiving an optical signal from a voltage and/or current sensor via an optical fibre”, “receiving a time synchronisation signal” and “time-stamping the phasor with the time t at the interrogator”, amounts to “significantly more” or an “inventive concept” under MPEP 2106.05. See also the prior art applied in sections 7-10 set forth below. The claim is therefore ineligible under 35 USC 101. The dependent claims 3-4, 6-7, 9-11 and 14 inherit attributes of the independent claim 1, but do not add anything which would render the claimed invention a patent eligible application of the abstract idea. These claims merely extend (or narrow) the abstract idea which do not amount for "significant more" because they merely add details to the algorithm which forms the abstract idea as discussed above. In particular, claim 14 recites “a monitoring system for making a time-synchronised phasor measurement comprising: an interrogator in optical communication with one or more voltage and/or current sensors via an optical fibre”. The additional elements recited in claim 14 do not amount to “significantly more” or an “inventive concept” under MPEP 2106.05 because they are all "well-understood, routine, conventional" in the field (see MPEP § 2106.0S(d)) or simply append well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception. See the prior art applied in sections 7-13 set forth below. Claims 15-16 are treated as ineligible subject matter under 35 U.S.C. § 101 for the same reasons as for claims 1, 3-4, 6-7, 9-11 and 14 discussed above. Claim Rejections - 35 USC § 103 7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 8. Claims 1, 3-4, 6-7 and 9-16 are rejected under 35 U.S.C. 103 as being unpatentable over DIONNE et al. (US 20150326387 A1) in view of Wang et al. (US 20160380433 A1) and KORBA et al. (US 20110126038 A1). Regarding claim 1, DIONNE discloses a method of making a time-synchronized phasor measurement (Abstract; para. 0014) comprising: receiving, at an interrogator (102 in Fig. 2), an optical signal from a voltage and/or current sensor (116 Fig. 2) via an optical fibre (para. 0015, 0031-0032: “The master device 102 and each slave device 110 communicate over a dedicated isochronous link 130. … The physical links (130) may include optical fiber …”; see also para, 0034: “a plurality of DMS 116 for generating delta-sigma bitstreams each representing the power system signal (current or voltage) for one phase of a multi-phase system”); receiving, at the interrogator, a time synchronization signal (e.g., a GPS-locked highly-accurate clock signal, see para. 0017, 0021) and determining a time t at which the signal is received from the voltage and/or current sensor (para. 0023: “In some such cases, only the master device needs to know the absolute time at which samples were taken so that it can properly align data from various sources/nodes in the network”; para. 0033: “The master device 102 extracts the delta-sigma modulated data and determines the time at which the sampling occurred …”); determining, at the interrogator, a phase delay (e.g., “near-real-time relative phase determinations between nodes of the system”, see para. 0014, 0016) corresponding to the voltage and/or current sensor (para. 0002, 0014, 0016); calculating, at the interrogator, a condition quantity (e.g., synchrophasor measurements of the power system fundamental) representing measurements of power quantity from the received sensor signal (para. 0015-0016, 0020, 0023, 0029, 0033), taking into account the phase delay (para. 0016: “the signal processor 20 is implemented to operate on the 1-bit DSM bitstream 14 directly. … The signal processor 20 also includes a transient capture and phase jump detection component 36. The transient capture and phase jump detection component 36 is configured to detect possible transients in the bitstream 14”); and time-stamping the calculated condition quantity with the time t at the interrogator (para. 0003, 0014, 0023, 0029, 0033: “The master device 102 extracts the delta-sigma modulated data and determines the time at which the sampling occurred from the sequence number …”; note, the calculated condition quantity is time-stamped based on the combination of “the time at which the sampling occurred from the sequence number, the associated time stamp and sequence pair stored in memory 107, a pre-measured transit time stored in memory 107, and the offset value extracted from the data frame”). DIONNE does not mention explicitly: determining, at the interrogator, a sensed voltage and/or current from the received optical signal; wherein the calculated condition quantity is a phasor; wherein the phase of the sensed voltage and/or current is offset by the phase delay. Wang discloses a method and system of making a time-synchronised phasor measurement (para. 0015), comprising: receiving, at an interrogator (para. 0048, 0065: “The computing apparatus 40 is operative to receive measurements made by the first and second PMUs 36, 38. Measurements are received by the computing apparatus 40 by way of a communications channel 48 between the computing apparatus 40 and each PMU with the communications channels 48 being of a copper, optical fibre or wireless form”), an optical signal from a voltage and/or current sensor (36/38 Fig. 2) via an optical fibre (para. 0049), wherein said optical signal comprising time-stamped measurements of power quantity (measurements of voltage and/or current information; see para. 0015, 0040: “The received first and second quantities may each correspond to a voltage signal amplitude and phase angle”); and calculating, at the interrogator (40), a phasor (e.g., a condition quantity representing a complex relationship between the voltage/current amplitudes and the phase angles) from the received optical signal (para. 0011, 0014: “The condition quantity is determined on the basis of amplitude information and phase angle information”, “The method according to the present invention may comprise determining the condition quantity in dependence on complex signals which reflect amplitude and phase information”; para. 0016; para. 0043, 0049); wherein calculating the phasor comprises determining the sensed voltage and/or current from the received optical signal (para. 0049). It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to modify DIONNE in view of Wang to arrive the claimed invention by programming the signal processor (104 in Fig. 2) and/or configuring the DIONNE’s interrogator (the master device 102) to perform functions of determining the sensed voltage and/or current from the received optical signal and calculating a phasor (e.g., a relationship between voltage/current amplitude and phase angle information) from the received optical signal. The skilled person in the art would apply such modification without needing inventive skill since the modification involves merely adding additional functions to the DIONNE’s master device (102 in Fig. 2) which includes all the hardware/software needed for implementing this additional function. And, doing so would avoid providing for full or partial signal processing capabilities in every power measurement device, thus reduce the cost of the entire power measurement system (DIONNE, para. 0018). The combination of DIONNE and Wang is silent on: wherein the phase of the sensed voltage and/or current is offset by the phase delay. KORBA discloses a method and system (Fig. 2) for compensating time delays in remote feedback signals in power system control (Abstract), wherein the time delay (i.e., the sum of .DELTA.t.sub.1 and .DELTA.t.sub.2, which represents the time elapsed from the time at which the measurement signal is originated from the PMU, or the point in time when the respective phasor was measured in the PMU, to the time point at which the measurement signal is received at the Phasor Data Concentrator 10) corresponding to each PMU (para. 0010: “PMUs provide time-stamped local information about the network, such as currents, voltages and load flows”) is defined by: a difference between a time at which a measurement signal is received at an interrogator (10) from the PMU and the time (i.e., the time stamp that represents the point in time when the respective phasor was measured in the system) at which the measurement signal originated from the PMU (Fig. 2; para. 0028). KORBA further teaches converting the time delay into a phase shift which compensates the delay in the phase of the sensed voltage and/or current (para. 0014). In view of the teaching of KORBA, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of DIONNE/Wang to determine the time point at which the optical signal is originated from the voltage and/or current sensor by subtracting the obtained time delay ts from a time t at which the optical signal is received at the interrogator (wherein said time t may, for example, rely upon a GPS-corrected clock signal or the time value distributed by another device in the network, see DIONNE, para. 0019). The skilled person in the art would apply such modification without needing inventive skill since the modification involves a straightforward arithmetic conversion. And, doing so would obviously simplify the derivation of the time point at which the optical signal originated from the voltage and/or current sensor and result in improvement of the claimed method/system (KORBA, Abstract). Regarding claim 3, the combination of DIONNE/Wang does not mention explicitly: wherein determining the phase delay comprises determining a time delay corresponding to the voltage and/or current sensor and calculating the phase delay from the time delay. The teaching of KORBA includes: converting the time delay into a phase delay which compensates the delay in the phase of the sensed voltage and/or current (para. 0014). In view of KORBA, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of DIONNE/Wang to calculate said phase delay from the time delay through which the delay in the phase of the sensed voltage and/or current is compensated. The skilled person in the art would conceive and apply such modification without needing inventive skill since the modification involves a straightforward arithmetic conversion. And, doing so would obviously make it more accurate to calculate the phasor and result in improvement of the claimed method/system. Regarding claim 4, DIONNE discloses: wherein a time delay is determined by transmitting a signal to the voltage and/or current sensor, receiving the signal after it has been reflected at the voltage and/or current sensor, and determining a round trip time 2ts for the signal (para. 0029). Regarding claim 6, DIONNE discloses: wherein the optical fibre is comprised in a power cable (Fig. 1; para. 0009, 0015, 0032). Regarding claim 7, DIONNE does not but Wang discloses: wherein calculating a phasor comprises determining the sensed voltage and/or current from the received optical signal (para. 0049). As such, the combination of DIONNE and Wang renders the claimed invention obvious. Regarding claims 9 and 10, the DIONNE/Wang combination renders the claimed invention obvious (the claimed limitations are considered merely as repeatedly and/or iteratively intended uses of the DIONNE/Wang combination for calculating and time-stamping a plurality of phasors based on a corresponding plurality of voltage and/or current sensors). Regarding claim 11, DIONNE discloses: periodically determining a time delay corresponding to each voltage and/or current sensor (para. 0021, 0029). As such, the combination of DIONNE/Wang renders the claimed invention obvious. Regarding claim 12, DIONNE discloses: delivering one or more control signals (e.g., the packet containing the sequence number from 150 and/or the packet containing the offset counter from 160 in Fig. 3) to one or more locations along the optical fibre and receiving at least one control signal at a control module (e.g., the master device; see Figs. 1 and 3; para. 0042); wherein the control signal is delivered to the one or more locations responsive to analysis performed on one or more measured synchrophasors (from the data buffer 170; see para. 0033, 0041-0042). Regarding claim 13, DIONNE discloses: wherein the optical signal and the time synchronisation signal are received at an interrogator (102 Fig. 2; see para. 0015, 0031-0032); wherein the interrogator calculates the condition quantity from the received signal, taking into account the phase delay and time-stamps the phasor with the time t, and determining a phase delay corresponding to the voltage and/or current sensor (para. 0016, 0025, 0072). Further, the combination of DIONNE/Wang renders it obvious that: wherein the calculated condition quantity is a phasor (see discussion of claim 1 above). The combination of DIONNE/Wang does not mention explicitly: wherein the interrogator determines the time at which the signal is received from the voltage and/or current sensor. KORBA discloses: compensating time delays in remote feedback signals in power system control (Abstract), wherein the time delay (i.e., the sum of .DELTA.t.sub.1 and .DELTA.t.sub.2, which represents the time elapsed from the time at which the measurement signal is originated from the PMU, or the point in time when the respective phasor was measured in the PMU, to the time point at which the measurement signal is received at the Phasor Data Concentrator 10) corresponding to each PMU (para. 0010: “PMUs provide time-stamped local information about the network, such as currents, voltages and load flows”) is defined by: a difference between a time at which a measurement signal is received at the interrogator (10) from the PMU and the time (i.e., the time stamp that represents the point in time when the respective phasor was measured in the system) at which the measurement signal originated from the PMU (Fig. 2; para. 0028). In view of the teaching of KORBA, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of DIONNE/Wang to determine the time point at which the optical signal is originated from the voltage and/or current sensor by subtracting the obtained time delay ts from a time t at which the optical signal is received at the interrogator, wherein said time t may, for example, rely upon a GPS-corrected clock signal or the time value distributed by another device in the network (DIONNE, para. 0019). The skilled person in the art would conceive and apply such modification without needing inventive skill since the modification involves a straightforward arithmetic conversion. And doing so would obviously simplify the derivation of the time point at which the optical signal originated from the voltage and/or current sensor and result in improvement of the claimed method/system (KORBA, Abstract). Regarding claim 14, the combination of DIONNE and Wang teaches or renders it obvious: a monitoring system for making a time-synchronised phasor measurement comprising: an interrogator (DIONNE, 102 Fig. 2) in optical communication with one or more voltage and/or current sensors via an optical fibre, the interrogator configured to perform the method of claim 1 (see discussion of claim 1 above). Regarding claims 15 and 16, DIONNE discloses a method and system (e.g., Fig. 2) of time-stamping a measurement (para. 0003, 0014, 0023) from a voltage and/or current sensor (116 in Fig. 2; see also para. 0034) comprising: receiving, at an interrogator (102 in Fig. 2), an optical signal (para. 0032: “The physical links may include optical fiber,”) from the voltage and/or current sensor (para. 0015, 0031-0032, 0034); determining, at the interrogator, a time t at which the optical signal is received from the voltage and/or current sensor (para. 0023: “In some such cases, only the master device needs to know the absolute time at which samples were taken so that it can properly align data from various sources/nodes in the network”; para. 0033: “The master device 102 extracts the delta-sigma modulated data and determines the time at which the sampling occurred …”); determining, at the interrogator, a phase delay (e.g., “near-real-time relative phase determinations between nodes of the system”, see para. 0014, 0016) corresponding to the voltage and/or current sensor (para. 0002, 0014, 0016); determining, at the interrogator, a phase measurement from the received optical signal (para. 0015-0016, 0020, 0023, 0029, 0033), taking into account the phase delay (para. 0016); and time-stamping the phase measurement with the time t at the interrogator (para. 0003, 0014, 0023, 0029, 0033). DIONNE does not mention explicitly: determining, at the interrogator, a sensed voltage and/or current from the received optical signal; wherein the phase of said phase measurement is offset by the phase delay for each voltage and/or current sensor. Wang discloses a method and system of making a time-synchronised phasor measurement (para. 0015), comprising: receiving, at an interrogator (para. 0048, 0065: “The computing apparatus 40 is operative to receive measurements made by the first and second PMUs 36, 38. Measurements are received by the computing apparatus 40 by way of a communications channel 48 between the computing apparatus 40 and each PMU with the communications channels 48 being of a copper, optical fibre or wireless form”), an optical signal from a voltage and/or current sensor (36/38 Fig. 2) via an optical fibre (para. 0049), wherein said optical signal comprising time-stamped measurements of power quantity (measurements of voltage and/or current information; see para. 0015, 0040: “The received first and second quantities may each correspond to a voltage signal amplitude and phase angle”); and calculating, at the interrogator (40), a phasor measurement (e.g., a condition quantity representing a complex relationship between the voltage/current amplitudes and the phase angles) from the received optical signal (para. 0011, 0014: “The condition quantity is determined on the basis of amplitude information and phase angle information”, “The method according to the present invention may comprise determining the condition quantity in dependence on complex signals which reflect amplitude and phase information”; para. 0016; para. 0043, 0049); wherein calculating the phasor measurement comprises determining the sensed voltage and/or current from the received optical signal (para. 0049). It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to modify DIONNE in view of Wang to arrive the claimed invention by programming the signal processor (104 in Fig. 2) and/or configuring the DIONNE’s interrogator (the master device 102) to perform functions of determining the sensed voltage and/or current from the received optical signal and calculating a phasor (e.g., a relationship between voltage/current amplitude and phase angle information) from the received optical signal. The skilled person in the art would apply such modification without needing inventive skill since the modification involves merely adding additional functions to the DIONNE’s master device (102 in Fig. 2) which includes all the hardware/software needed for implementing this additional function. And, doing so would avoid providing for full or partial signal processing capabilities in every power measurement device, thus reduce the cost of the entire power measurement system (DIONNE, para. 0018). The combination of DIONNE and Wang is silent on: wherein the phase of said phase measurement is offset by the phase delay. KORBA discloses a method and system (Fig. 2) for compensating time delays in remote feedback signals in power system control (Abstract), wherein the time delay (i.e., the sum of .DELTA.t.sub.1 and .DELTA.t.sub.2, which represents the time elapsed from the time at which the measurement signal is originated from the PMU, or the point in time when the respective phasor was measured in the PMU, to the time point at which the measurement signal is received at the Phasor Data Concentrator 10) corresponding to each PMU (para. 0010: “PMUs provide time-stamped local information about the network, such as currents, voltages and load flows”) is defined by: a difference between a time at which a measurement signal is received at an interrogator (10) from the PMU and the time (i.e., the time stamp that represents the point in time when the respective phasor was measured in the system) at which the measurement signal originated from the PMU (Fig. 2; para. 0028). KORBA further teaches converting the time delay into a phase shift which compensates the delay in the phase of said measurement signal (para. 0014). In view of the teaching of KORBA, it would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of DIONNE/Wang to determine the time point at which the optical signal is originated from the voltage and/or current sensor by subtracting the obtained time delay ts from a time t at which the optical signal is received at the interrogator (wherein said time t may, for example, rely upon a GPS-corrected clock signal or the time value distributed by another device in the network, see DIONNE, para. 0019). The skilled person in the art would apply such modification without needing inventive skill since the modification involves a straightforward arithmetic conversion. And, doing so would obviously simplify the derivation of the time point at which the optical signal originated from the voltage and/or current sensor and result in improvement of the claimed method/system (KORBA, Abstract). 9. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over DIONNE in view of Wang and KORBA as applied to claim 3 above, further in view of KUROSAWA et al. (JP 2003130896 A, machine translation). Regarding claim 5, the combination of DIONNE/Wang/KORBA does not mention explicitly: introducing a perturbation to the amplitude of a light source illuminating the optical fibre, and detecting an effect of the perturbation on light reflected by the voltage and/or current sensor. KUROSAWA teaches: introducing a perturbation to the amplitude of a light source illuminating an optical fibre, and detecting an effect of the perturbation on light reflected by a current sensor (para. 0015, 0048, 0056). It would have been obvious to one ordinary skill in the art to modify the DIONNE/Wang/KORBA combination to arrive the claimed invention by incorporating KUROSAWA’s teaching of perturbing the amount of incident light and detecting an effect of the perturbation on light reflected by the current sensor. Doing so would provide, for example, a mechanism through which stabilities or sensitivities of the voltage/current measurement can be validated in an effort to maximize the amount of light that can be incident on the light receiving element (KUROSAWA, p.9, 4th-5th paragraphs: “Due to such characteristics, stable characteristics can be given to various disturbances to the optical fiber sensor, and the sensitivity can be improved by improving the modulation degree”). 10. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over DIONNE in view of Wang and KORBA as applied to claim 1 above, further in view of DANTE et al. (WO 2017152246 A1, machine translation). Regarding claim 8, the combination of DIONNE/Wang/KORBA does not mention explicitly: wherein the voltage and/or current sensor comprises a fibre Bragg grating in contact with a piezoelectric element which expands and contracts responsive to a sensed voltage and/or current, and wherein the sensed voltage and/or current is determined from a spectral position of a peak reflection wavelength from the fibre Bragg grating. DANTE discloses a voltage and/or current sensor (100 Fig. 1a; see also Abstract and para. 0008) for measuring applied voltage in the form of an optical signal modulated by a mechanical deformation of a piezoelectric material (para. 0012), comprising: a fibre Bragg grating (5a) in contact with a piezoelectric element (6) which expands and contracts responsive to a sensed voltage and/or current (para. 0012, 0058-0060), and wherein the sensed voltage and/or current is determined from a spectral position of a peak reflection wavelength from the fibre Bragg grating (para. 0067-0069, 0075-0080). It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of DIONNE/Wang/KORBA to arrive the claimed invention by substituting DIONNE’s voltage and/or current sensor (116) with a passive voltage and/or current sensor that does not need any active power source to drive its measurement operation as taught by DANTE (para. 0012). Doing so would provide the sensor with benefits of immunity to electromagnetic interference, high electrical insulation, etc. (DANTE, para. 0007). Conclusion 11. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Contact Information 12. Any inquiry concerning this communication or earlier communications from the examiner should be directed to XIUQIN SUN whose telephone number is (571)272-2280. The examiner can normally be reached 9:30am-6:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Shelby A. Turner can be reached on (571) 272-6334. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /X.S/Examiner, Art Unit 2857 /SHELBY A TURNER/Supervisory Patent Examiner, Art Unit 2857
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Prosecution Timeline

Dec 12, 2023
Application Filed
Sep 15, 2025
Non-Final Rejection mailed — §101, §103, §112
Feb 16, 2026
Response Filed
Jun 03, 2026
Final Rejection mailed — §101, §103, §112 (current)

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