Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 12-14, 16, and 18 are objected to because of the following informalities:
Claims 12-14 and 18: “further comprising” in line 1 should be written as “further comprising:” (addition of a semi-colon), in order to maintain consistent claim language;
Claim 16: “plurality layers” in line 2 should be written as “plurality of layers”.
Appropriate correction is required.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention; or
Claims 1-2, 4, 6, 8-12, 14, 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sun et al. (US 20200364118 A1), hereinafter Sun.
Regarding claim 1, Sun teaches a Data Storage Device (DSD), comprising: an interface configured to communicate with a host device (Paragraph 37; Fig. 3A, computing device 310 [host] communicates over host interface 360);
at least one Non-Volatile Memory (NVM) configured to store weights for a plurality of layers of a neural network executed at least in part by the host device (Paragraphs 30-31, 42, 46; Figs. 2 and 3A, non-volatile memory 340 stores weight data 343 of weights corresponding to layers 210, 220, 230 of neural network 313, which is executed by computing device 310 [host]) ; and
one or more controllers, individually or in combination (Paragraph 34; Fig. 3A, controller 330), configured to:
receive the weights for the plurality of layers with layer information associating the received weights with one or more layers of the plurality of layers (Paragraphs 30-31, 37, 46; Figs. 2 and 3A, controller 330 receives data for non-volatile memory 340, which includes weight data 343 that identifies the nodes, connections [layer information], and weights of neural network 313 that correspond to layers 210, 220, 230); and
store the received weights in the at least one NVM using different storage characteristics based at least in part on the received layer information (Paragraphs 51-52, 54; Fig. 3A, storing weight data 343 into different portions of non-volatile memory 340 corresponding to different reliability and access time properties [storage characteristics], based on the information received by controller 330),
wherein the different storage characteristics include at least one of different storage locations (Paragraph 51; Fig. 3A, storing weight data 343 in different portions [locations] of non-volatile memory 340), different storage techniques, and different maintenance settings for retaining the weights in the at least one NVM.
Regarding claim 2, Sun teaches the DSD of Claim 1, wherein the at least one NVM includes a first type of storage media and a second type of storage media (Paragraph 54; Fig. 3A, storing data into different portions of memory device 320 which include a [first] type of memory with a faster access time or a [second] type of memory with a higher reliability),
the first storage media having a lower read latency than the second type of storage media (Paragraph 54, storing data into a [first] type of memory with faster access times/lower latency); and
wherein the one or more controllers, individually or in combination, are further configured to: store a first group of weights for one or more first layers of the plurality of layers in the first type of storage media (Paragraphs 31, 38, 54; Fig. 3A, controller 330 stores weight data 343 including weights corresponding to layers with a high access frequency in a [first] type of memory with a lower access time); and
store at least one other group of weights for at least one other layer of the plurality of layers in the second type of storage media (Paragraphs 31, 38, 54; Fig. 3A, controller 330 stores weight data 343 including weights corresponding to layers with a higher importance in a [second] type of memory with a higher reliability).
Regarding claim 4, Sun teaches the DSD of Claim 1, wherein the one or more controllers, individually or in combination, are configured to store weights for a particular layer of the plurality of layers across multiple dies of the at least one NVM to reduce a read latency for the weights of the particular layer (Paragraphs 31, 38, 59; Fig. 3A, controller 330 stores weight data 343 of weights corresponding to layers across different dies of non-volatile memory 340, allowing faster access [reduced read latency] to weight data 343).
Regarding claim 6, Sun teaches the DSD of Claim 1, wherein the one or more controllers, individually or in combination, are configured to: receive a first request from the host device via the interface for a first batch of weights for one or more layers of the plurality of layers (Paragraphs 30-31, 37-38, 46; Fig. 3A, controller 330 receives a data command from computing device 310 [host] over host interface 360 to read weight data 343 of weights corresponding to layers);
send the first batch of weights to the host device via the interface (Paragraphs 37-38, 46; Fig. 3A, in response to a read request, sending weight data 343 to computing device 310 over host interface 360);
receive a second request from the host device via the interface for a second batch of weights for one or more additional layers of the plurality of layers (Paragraphs 30-31, 37-38, 46; Fig. 3A, controller 330 receives another data command from computing device 310 [host] over host interface 360 to read another weight data 343 of weights corresponding to layers); and
send the second batch of weights to the host device via the interface (Paragraphs 37-38, 46; Fig. 3A, in response to another read request, sending another weight data 343 to computing device 310 over host interface 360).
Regarding claim 8, Sun teaches the DSD of Claim 1, wherein the one or more controllers, individually or in combination, are configured to: store a first group of weights in the at least one NVM for one or more first layers of the plurality of layers using a first storage technique (Paragraphs 31, 54, 57; Fig. 3A, storing weight data 343 of weights corresponding to layers into an SLC portion of non-volatile memory 340 [stored using a first storage technique]); and
store a second group of weights in the at least one NVM for one or more additional layers of the plurality of layers using a second storage technique (Paragraphs 31, 54, 57; Fig. 3A, storing another weight data 343 of different weights corresponding to different layers into a pMLC portion of non-volatile memory 340 [stored using a second storage technique]),
wherein the first storage technique differs from the second storage technique in at least one of how many bits are stored per cell in the at least one NVM (Paragraphs 35, 57; Fig. 3A, the first portion of non-volatile memory 340 includes single-level cell SLC memory [first storage technique] and the second portion includes multi-level cell MLC memory [second storage technique]), an amount of parity data used to store a predetermined amount of data, a write speed in storing the weights, and a data size for each weight.
Regarding claim 9, Sun teaches the DSD of Claim 1, wherein the different maintenance settings for retaining weights in the at least one NVM includes at least one of different power levels for different layers, different frequencies of read threshold calibration for different layers, and different frequencies of rewriting data for different layers (Paragraphs 31, 71; Fig. 3A, storing weights in different portions of non-volatile memory 340 based on the different modification frequencies [frequencies of rewriting data] of the weights corresponding to layers).
Regarding claim 10, Sun teaches method for loading weights for a neural network into at least one memory (Paragraphs 46, 48, 97; Fig. 3A, processing device 311 of (host) computing device 310 receives weight data 343 for neural network 313 and stores the weights into a host memory), the method comprising:
requesting a first group of weights from a Data Storage Device (DSD) for one or more first layers of the neural network (Paragraphs 30-31, 37-38, 46; Figs. 2 and 3A, memory device 320 receives a data command to read weight data 343 of weights corresponding to layers 210, 220, 230 of neural network 200);
receiving the first group of weights from the DSD (Paragraph 46; Fig. 3A, processing device 311 of computing device 310 receives weight data 343 from non-volatile memory 340 of memory device 320);
loading the first group of weights into the at least one memory (Paragraphs 46, 48, 97; Fig. 3A, processing device 311 receives the weight data into a host memory of (host) computing device 310);
initiating computations of the one or more first layers of the neural network using weights from the first group of weights loaded into the at least one memory (Paragraphs 31, 48; Fig. 3A, processing device 311 processes an initial set of weights corresponding to layers obtained from weight data 343); and
requesting a second group of weights from the DSD for processing one or more additional layers of the neural network before computations complete for the one or more first layers of the neural network (Paragraphs 31, 48, 74; Fig. 3A, processing device 311 can simultaneously retrieve a second group of weight data 343 corresponding to a layer for processing at the same time it retrieves a first group of weight data 343 corresponding to another layer for processing [requesting before computations complete for the first layer(s)]).
Regarding claim 11, Sun teaches the method of Claim 10, wherein the first group of weights is retrieved from the DSD quicker than the second group of weights due to different storage characteristics for the first group of weights and the second group of weights (Paragraph 54; Fig. 3B, storing different weight data 343 into different portions of memory device 320 wherein a portion may be configured to have a faster access time).
Regarding claim 12, Sun teaches the method of Claim 10, further comprising setting different storage characteristics for storing different groups of weights in the DSD based at least in part on the layer or layers of the neural network that use the weights (Paragraphs 31, 54; Fig. 3A, determining different levels of access times [storage characteristics] for storing different weight data 343 based on the characteristics of the weights corresponding to layers of the neural network).
Regarding claim 14, Sun teaches the method of Claim 10, further comprising storing weights for a particular layer of the neural network across multiple dies of at least one Non-Volatile Memory (NVM) of the DSD to reduce a read latency for the weights of the particular layer (Paragraphs 31, 38, 59; Fig. 3A, controller 330 stores weight data 343 of weights corresponding to layers across different dies of non-volatile memory 340, allowing faster access [reduced read latency] to weight data 343).
Regarding claim 17, Sun teaches the method of Claim 10, further comprising: storing the first group of weights in the DSD using a first storage technique (Paragraphs 54, 57; Fig. 3A, storing weight data 343 of weights into an SLC portion of non-volatile memory 340 [stored using a first storage technique]); and
storing the second group of weights in the DSD using a second storage technique (Paragraphs 54, 57; Fig. 3A, storing another weight data 343 of different weights into a pMLC portion of non-volatile memory 340 [stored using a second storage technique]),
wherein the first storage technique differs from the second storage technique in at least one of how many bits are stored per cell in at least one Non-Volatile Memory (NVM) of the DSD (Paragraphs 35, 57; Fig. 3A, the first portion of non-volatile memory 340 includes single-level cell SLC memory [first storage technique] and the second portion includes multi-level cell MLC memory [second storage technique]), an amount of parity data used to store a predetermined amount of data, a write speed in storing each weight, and a data size for each weight.
Regarding claim 18, Sun teaches the method of Claim 10, further comprising determining maintenance settings for retaining weights in the DSD based on the layer or layers using the weights (Paragraphs 31, 54; Fig. 3A, determining different levels of storage reliability [maintenance settings] for storing different weight data 343 based on the characteristics of the weights corresponding to layers).
Regarding claim 19, Sun teaches a host device (Paragraph 34; Fig. 3A, computing device 310), comprising:
an interface configured to communicate with a Data Storage Device (DSD) storing weights for a neural network executed at least in part by the host device (Paragraphs 37, 42, 46; Fig. 3A, host interface 360 communicates with controller 330 of memory device 320 [DSD] which stores weight data 343 for neural network 313 executed by computing device 310 [host device]);
at least one memory (Paragraph 97, the host computing device includes system memory); and means for:
requesting a first group of weights from the DSD for one or more first layers of the neural network (Paragraphs 30-31, 37-38, 46; Figs. 2 and 3A, memory device 320 receives a data command to read weight data 343 of weights corresponding to layers 210, 220, 230 of neural network 200);
receiving the first group of weights from the DSD; loading the first group of weights into the at least one memory (Paragraphs 46, 48, 97; Fig. 3A, processing device 311 receives the weight data into a host memory of (host) computing device 310);
initiating computations of the one or more first layers of the neural network using weights from the first group of weights loaded into the at least one memory (Paragraphs 31, 48; Fig. 3A, processing device 311 processes an initial set of weights corresponding to layers obtained from weight data 343); and
requesting a second group of weights from the DSD for processing one or more additional layers of the neural network before computations complete for the one or more first layers of the neural network (Paragraphs 31, 48, 74; Fig. 3A, processing device 311 can simultaneously retrieve a second group of weight data 343 corresponding to a layer for processing at the same time it retrieves a first group of weight data 343 corresponding to another layer for processing [requesting before computations complete for the first layer(s)]).
Regarding claim 20, Sun teaches the host device of Claim 19, wherein the first group of weights is retrieved from the DSD quicker than the second group of weights due to different storage characteristics for the first group of weights and the second group of weights (Paragraph 54; Fig. 3B, storing different weight data 343 into different portions of memory device 320 wherein a portion may be configured to have a faster access time).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3, 7, 13, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Sun in view of Rom et al. (US 20200185027 A1), hereinafter Rom.
Regarding claim 3, Sun teaches the DSD of claim 1 and the one or more controllers (Paragraph 34; Fig. 3A, controller 330).
Sun does not explicitly teach wherein the one or more controllers, individually or in combination, are further configured to store a logical to physical mapping associating logical identifiers for the weights of the plurality of layers with their storage locations in the at least one NVM, and wherein the logical to physical mapping further includes at least one indicator for weights of a particular layer.
However, Rom teaches wherein the one or more controllers, individually or in combination, are further configured to store a logical to physical mapping associating logical identifiers for the weights of the plurality of layers with their storage locations in the at least one NVM (Paragraphs 41, 45, an SSD controller stores flash translation layer FTL tables which map neural network weights to virtual block IDs [logical identifiers], which further correspond to physical locations in the NAND storage), and
wherein the logical to physical mapping further includes at least one indicator for weights of a particular layer (Paragraphs 45, 61; Fig. 3, storing the weights into corresponding virtual block IDs of NAND blocks 3061-N [indicator] which correspond to N layers of a neural network).
Sun and Rom are analogous art because they are in the same field of endeavor, that being non-volatile storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the DSD of Sun to further include the logical to physical mapping according to the teachings of Rom. The motivation for doing so would have been to reduce translation overhead (Rom, Paragraph 45).
Regarding claim 7, Sun teaches the DSD of claim 1 and the one or more controllers (Paragraph 34; Fig. 3A, controller 330).
Sun does not explicitly teach wherein the one or more controllers, individually or in combination, are configured to: receive a request to modify one or more weights for one or more layers that are less than all of the plurality of layers; determine one or more storage locations in the at least one NVM for the one or more weights; and modify the one or more weights stored in the at least one NVM for the one or more layers without accessing weights stored in the at least one NVM for other layers of the plurality of layers.
However, Rom teaches wherein the one or more controllers, individually or in combination, are configured to: receive a request to modify one or more weights for one or more layers that are less than all of the plurality of layers (Paragraphs 43, 58, a storage device controller receives an off-chip read-modify-write operation for specific weights of a specific layer [less than all of the plurality of layers]);
determine one or more storage locations in the at least one NVM for the one or more weights (Paragraph 44, determining the physical block address PBA [storage location] of the relevant weights during a read); and
modify the one or more weights stored in the at least one NVM for the one or more layers without accessing weights stored in the at least one NVM for other layers of the plurality of layers (Paragraphs 43-44, 58, performing operations on the weights stored in blocks of the NAND die separately from other weights corresponding to other layers stored in other blocks).
Sun and Rom are analogous art because they are in the same field of endeavor, that being non-volatile storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the DSD of Sun to further include the modify request according to the teachings of Rom. The motivation for doing so would have been to provide a high performance neural network system while reducing a load on a host device (Rom, Paragraphs 42-43).
Regarding claim 13, Sun teaches the method of claim 10, but does not explicitly teach further comprising storing a logical to physical mapping associating logical identifiers for the weights of the neural network with their storage locations in the DSD, wherein the logical to physical mapping further includes at least one indicator for weights of a particular layer.
However, Rom teaches further comprising storing a logical to physical mapping associating logical identifiers for the weights of the neural network with their storage locations in the DSD (Paragraphs 41, 45, storing flash translation layer FTL tables which map neural network weights to virtual block IDs [logical identifiers], which further correspond to physical locations in the NAND storage),
wherein the logical to physical mapping further includes at least one indicator for weights of a particular layer (Paragraphs 45, 61; Fig. 3, storing the weights into corresponding virtual block IDs of NAND blocks 3061-N [indicator] which correspond to N layers of a neural network).
Sun and Rom are analogous art because they are in the same field of endeavor, that being non-volatile storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the DSD of Sun to further include the logical to physical mapping according to the teachings of Rom. The motivation for doing so would have been to reduce translation overhead (Rom, Paragraph 45).
Regarding claim 16, Sun teaches the method of claim 10, wherein the DSD stores weights in at least one non-volatile memory (NVM) of the DSD for a plurality layers of the neural network (Paragraphs 30-31, 42, 46; Figs. 2 and 3A, non-volatile memory 340 stores weight data 343 of weights corresponding to layers 210, 220, 230 of neural network 313).
Sun does not explicitly teach wherein the method further comprises: receiving a request to modify one or more weights for one or more layers that are less than all of the layers of the plurality of layers; determining one or more storage locations in the at least one NVM for the one or more weights; and modifying the one or more weights stored in the at least one NVM for the one or more layers without accessing weights stored in the at least one NVM for other layers of the plurality of layers.
However, Rom teaches wherein the method further comprises: receiving a request to modify one or more weights for one or more layers that are less than all of the layers of the plurality of layers (Paragraphs 43, 58, receiving an off-chip read-modify-write operation for specific weights of a specific layer [less than all of the plurality of layers]);
determining one or more storage locations in the at least one NVM for the one or more weights (Paragraph 44, determining the physical block address PBA [storage location] of the relevant weights during a read); and
modifying the one or more weights stored in the at least one NVM for the one or more layers without accessing weights stored in the at least one NVM for other layers of the plurality of layers (Paragraphs 43-44, 58, performing operations on the weights stored in blocks of the NAND die separately from other weights corresponding to other layers stored in other blocks).
Sun and Rom are analogous art because they are in the same field of endeavor, that being non-volatile storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the DSD of Sun to further include the modify request according to the teachings of Rom. The motivation for doing so would have been to provide a high performance neural network system while reducing a load on a host device (Rom, Paragraphs 42-43).
Claims 5 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Sun in view of Lassa (US 20130265825 A1).
Regarding claim 5, Sun teaches the DSD of Claim 1, wherein the one or more controllers, individually or in combination (Paragraph 34; Fig. 3A, controller 330), are configured to:
determine a first number of dies of the at least one NVM for storing a first group of weights for one or more first layers of the plurality of layers (Paragraphs 31, 54, 57; Fig. 3A, determining different portions of non-volatile memory 340 to store weight data 343 of weights corresponding to layers, wherein the different portions may be different groups of memory dies); and
determine a second number of dies of the at least one NVM for storing a second group of weights for one or more additional layers of the plurality of layers (Paragraphs 31, 54, 57; Fig. 3A, determining different portions of non-volatile memory 340 to store weight data 343 of other [second] weights corresponding to other [additional] layers, wherein the different portions may be another group [second number] of memory dies).
Sun does not explicitly teach storing a first group based on a first storage size of the first group; and storing a second group based on a second storage size of the second group.
However, Lassa teaches storing a first group based on a first storage size of the first group (Paragraph 43, storing a [first] data-unit [group] into a particular tier of memory based on the [first] size of the data-unit); and
storing a second group based on a second storage size of the second group (Paragraph 43, storing a [second] data-unit [group] into a particular tier of memory based on the [second] size of the data-unit).
Sun and Lassa are analogous art because they are in the same field of endeavor, that being tiered storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the DSD of Sun to further include the storing based on a storage size of a data group according to the teachings of Lassa. The motivation for doing so would have been to optimize storage allocation based on data characteristics (Lassa, Paragraph 43).
Regarding claim 15, Sun teaches the method of Claim 10, further comprising: determining a first number of dies of at least one Non-Volatile Memory (NVM) of the DSD for storing the first group of weights (Paragraphs 54, 57; Fig. 3A, determining different portions of non-volatile memory 340 to store weight data 343, wherein the different portions may be different groups of memory dies); and
determining a second number of dies of the at least one NVM of the DSD for storing the second group of weights (Paragraphs 54, 57; Fig. 3A, determining different portions of non-volatile memory 340 to store other [second] weight data 343, wherein the different portions may be another group [second number] of memory dies).
Sun does not explicitly teach storing a first group based on a first storage size of the first group; and storing a second group based on a second storage size of the second group.
However, Lassa teaches storing a first group based on a first storage size of the first group (Paragraph 43, storing a [first] data-unit [group] into a particular tier of memory based on the [first] size of the data-unit); and
storing a second group based on a second storage size of the second group (Paragraph 43, storing a [second] data-unit [group] into a particular tier of memory based on the [second] size of the data-unit).
Sun and Lassa are analogous art because they are in the same field of endeavor, that being tiered storage management. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the DSD of Sun to further include the storing based on a storage size of a data group according to the teachings of Lassa. The motivation for doing so would have been to optimize storage allocation based on data characteristics (Lassa, Paragraph 43).
Conclusion
The prior art made of record and not relied upon is considered pertinent to the applicant’s disclosure.
Park et al. (US 20230385622 A1) teaches methods for storing neural network data to particular memory units.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Pinga whose telephone number is (571) 272-2620. The examiner can normally be reached on M-F 8:30am-6pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan Savla, can be reached on (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/J.M.P./Examiner, Art Unit 2137
/TRACY A WARREN/Primary Examiner, Art Unit 2137
Prosecution Insights