Prosecution Insights
Last updated: July 05, 2026
Application No. 18/538,994

SINGLE-INDUCTOR MULTIPLE-OUTPUT DC-DC CONVERTER AND A METHOD FOR OPERATING A SINGLE-INDUCTOR MULTIPLE-OUTPUT DC-DC CONVERTER

Final Rejection §103
Filed
Dec 13, 2023
Priority
Dec 15, 2022 — EU 22213959.4
Examiner
NOVAK, PETER MICHAEL
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SEMTECH Corporation
OA Round
2 (Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
607 granted / 688 resolved
+20.2% vs TC avg
Moderate +9% lift
Without
With
+8.7%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
39 currently pending
Career history
723
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
75.5%
+35.5% vs TC avg
§102
4.0%
-36.0% vs TC avg
§112
15.4%
-24.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 688 resolved cases

Office Action

§103
DETAILED ACTION The instant action is in response to application 13 December 2023. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments The abstract is not in proper format. All other specification objections have been withdrawn. The drawing objections have been withdrawn. The 112(b) rejection has been withdrawn. Applicant’s remarks on the merits have been considered but are moot for not considering the present references. Specification The specification is objected to for the following informalities: The abstract is not in proper format. The abstract should be no longer than 150 words and should not have legal language (eg. comprising). See MPEP 608.01(b). The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Objections Claims 10-12 are objected to under 37 CFR 1.75 as being a substantial duplicate of claims 18-20. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m). Priority Acknowledgment is made of applicant's claim for foreign priority based on an application filed in the European Union on 15 December 2022. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. For method claims, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore the previous rejections based on the apparatus will not be repeated. (The claims have been condensed.) The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1, 2, 5, 6, 17 are rejected under 35 U.S.C. 103 as being unpatentable over Ma (US 20040201281) in view of Wei (US 10622900). As to claim 1, Ma discloses (Fig. 6D, see image below) Single-inductor multiple-output (SIMO) DC-DC converter (1), comprising: - an electrical DC voltage source switchable sectioning the cycle of operation into a plurality of consecutive time segments (Fig. 3), each with a duration, wherein in one time segment the inductor the control structure includes a time estimator configured to evaluate for each output a suppliable output current required to keep the corresponding load voltage constant and a corresponding discharge time, an actual current demand (Fig. 5a-5C, ¶30 specifying current settings) of the plurality of loads that is the sum of the summable output currents and a duration of the one time inductor (L) through the input switch for the duration of the one time segment; based onthe actual current demandenergize the inductor (L) through the input switch for the duration of the one time segment; Though strongly implied, he does not explicitly teach feedback, or more specifically prior to a start of the cycle of operation or de-energize the inductor by sequentially connecting each to the output node, for the corresponding discharge time. Wei teaches Single-inductor multiple-output (SIMO) DC-DC converter, comprising: an electrical DC voltage source (Vin) connected to an input node through an input switch (SP); a plurality of loads(Vo1, Vo2, …, Vok) each being connected to an output node through one output switch of a plurality of output switches (S1, S2, … Sk), wherein the electrical DC voltage source and the loads are sectioning the cycle of operation into a plurality of consecutive time segments (Fig. 2b), each with a duration, wherein in one time segment the inductor is energized (Fig. 2B, SP conducting), wherein the control structure includes a time estimator ( Col. 4, lines 35-45 “The plurality of EAs are respectively put in the feedback loops of the multiple outputs (VO.sub.1, VO.sub.2, . . . ,VO.sub.K) to sense their voltage level and each of them having an input reference voltage level (VR.sub.1, VR.sub.2, . . . , or VR.sub.K) to individually control their error accordingly.”) configured to evaluate for each output a suppliable output current required to keep the corresponding load voltage constant and a corresponding discharge time,an actual current demand (Wei senses a voltage demand with an RC load, which is regarded as similar applicant’s Figure 1) of the plurality of loads that is the sum of the suppliable output currents and a duration of the one time segment based on the actual current demand, energize the inductor (L) through the input switch for the duration of the one time segment;de-energize the inductor by sequentially connecting each to the output node, for the corresponding discharge time (Col. 5, lines 20-30 “A full range current sensing circuit (not shown) is used to provide sensing current for the energy distributing unit 203 in the control circuit 201. At the same time, a generated current by the current sensor input into the energy generating unit 205. The energy generating unit 205 measures the total voltage error at all the outputs through a feedback loop to provide an adequate amount of energy for the inductor L. The energy distributing unit 203 produces the control signals for the switches S.sub.1, S.sub.2 to S.sub.K, and signals VO.sub.1, VO.sub.2 to VO.sub.K which contain the information of energy required by the output channels.”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device above to use peak current control as disclosed in Eirea to prevent overheating. As to claim 2, Ma in view of Wei teaches wherein the SIMO DC-DC converter (1) being configured as buck-boost converter. PNG media_image1.png 825 570 media_image1.png Greyscale As to claim 5, Ma in view of Wei teaches wherein the control structure being configured to operate the inductor in discontinuous or continuous conduction mode (Ma, Fig. 5C), dependent on the the acutal current demand (Wei, Fig. 2C/2D), and wherein the consecutive cycles of operation having a predetermined duration. As to claim 6, Ma in view of Wei teaches is configured to determine the duration of further time segments based on individual suppliable output currents (Ma, Fig. 5A-C, Wei, Fig. 2B). Claims 3, 4, 8, 9 (as best understood) are rejected under 35 U.S.C. 103 as being unpatentable over Ma (US 20040201281) in view of Wei (US 10622900) and Liang (US 202101195333). As to claim 3, Ma in view of Eirea teaches measuring an inductor current. They do not teach a resistor connected in parallel to the inductor (L) through an inductor switch for measuring current. Liang teaches a resistor connected (Fig. 2, Rsense/116) in parallel to the inductor (106) through an inductor switch (102) for measuring current. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device above to use the CSR sensor to have a linear current sensor. As to claim 4, Ma in view of Eirea and Liang teaches a first voltage sensor configured to determine a voltage (Vcsense) across the resistor (Rsesnse), and a plurality of second voltage sensors, each being configured to determine one load voltage (Ma and Eira both measure output output voltages) of a plurality of load voltages. As to claim 8, Ma in view of Eirea and Liang teaches wherein the control structure comprises a digital controller adapted to receive the load voltages from the second voltage sensors (Eirea, state machine). As to claim 9, Ma in view of Eirea and Liang do not explicitly teach wherein the digital controller (13) comprises a plurality of PI compensators (5), wherein each PI compensator (5) being configured to compensate a deviation between a load voltage (V-V4) and a corresponding load voltage setpoint. This however is for two reasons. First, Eirea explicitly teaches an analog low pass filter which acts as an integrator. Analog and digital controllers are both old and well known in the art, and therefore not patentable (See MPEP 2144.03 and US 5045774 Col. 3, lines 64-67; US 5138250 Claim 6; US 5574635, Col. 5 lines 41-45). The advantages of each are known. Digital control elements are generally easier to synchronize, whereas analog components are generally less bandwidth do not lose data when signals are digitized. The advantages and disadvantages of each are well known to ordinary skill, and therefore choosing one over the other is not patentable. Second, PID controllers are also extremely well known in the art and not patentable (MPEP 2144.03 and US 20120139509 Claim 7; US 20110178189 Claim 6; US 20220181974). Allowable Subject Matter Claims 10-12 would be allowable if rewritten to overcome the above objecition include all of the limitations of the base claim and any intervening claims. Claims 13-16 would be allowable if rewritten to include all of the limitations of the base claim and any intervening claims. Claims 18-23 allowed. The following is a statement of reasons for the indication of allowable subject matter: As to claim 10, the prior art fails to disclose: “wherein the digital controller being configured to determine the duration of the said one time segment for energizing the inductor (L) by implementing the following equation Tu= SQRT(c/a) with a=VDC/2Li, and C=Ireq*Tcycle wherein VDC denotes a voltage of the electrical DC voltage source (Vi),Li denotes an inductance of the inductor (L), Ireq denotes the sum of currents suppliable to the plurality of loads (R-R, R,tu, denotes the duration of the said one time segment, and Tcycie denotes a predetermined duration of the cycle of operation.” in combination with the additionally claimed features, as are claimed by the Applicant. As to claim 13, the prior art fails to disclose: “wherein the control structure comprises an analog circuit with a first capacitor, wherein a voltage of the first capacitor being directly proportional to a current conducted by the inductor in the said one time segment” in combination with the additionall18y claimed features, as are claimed by the Applicant. As to claim 10, the prior art fails to disclose: “wherein the digital controller being configured to determine the duration of the said one time segment for energizing the inductor (L) by implementing the following equation Tu= SQRT(c/a) with a=VDC/2Li, and C=Ireq*Tcycle wherein VDC denotes a voltage of the electrical DC voltage source (Vi),Li denotes an inductance of the inductor (L), Ireq denotes the sum of currents suppliable to the plurality of loads (R-R, R,tu, denotes the duration of the said one time segment, and Tcycie denotes a predetermined duration of the cycle of operation.” in combination with the additionally claimed features, as are claimed by the Applicant. Please note: while objected or allowed claims have been indicated, only the presented claims have been examined for compliance with form and 35 USC 112 consideration. As a reminder, claims that are dependent upon objected claims still require examination for form and 35 USC 112 issues even if they overcome 35 USC 102 and 103 rejections. Similarly, amendments incorporating allowable subject matter into independent claims requires reconsideration for dependent claim form and any possible 35 USC 112 issues that arise through amendments even if the 35 USC 102 and 103 rejections are overcome. As such, applicant is advised that while examiner can enter previously allowed claims or previously objected claims rewritten into independent form after final rejection, any other claims may not be entered. Conclusion Examiner has cited particular column, paragraph, and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER M NOVAK whose telephone number is (571)270-1375. The examiner can normally be reached on 9AM-5PM,Monday through Thursday, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal Hammond can be reached on 571-270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PETER M NOVAK/ Primary Examiner, Art Unit 2839
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Prosecution Timeline

Dec 13, 2023
Application Filed
Nov 05, 2025
Non-Final Rejection mailed — §103
Mar 31, 2026
Response Filed
Apr 22, 2026
Final Rejection mailed — §103
Jun 30, 2026
Applicant Interview (Telephonic)
Jul 02, 2026
Examiner Interview Summary

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
97%
With Interview (+8.7%)
2y 0m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 688 resolved cases by this examiner. Grant probability derived from career allowance rate.

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