Prosecution Insights
Last updated: April 19, 2026
Application No. 18/540,065

INTERFERENCE CANCELLATION CIRCUIT AND OPERATING METHOD THEREOF

Non-Final OA §102§103
Filed
Dec 14, 2023
Examiner
KIM, YEWON
Art Unit
2465
Tech Center
2400 — Computer Networks
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
3y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
66 granted / 75 resolved
+30.0% vs TC avg
Moderate +12% lift
Without
With
+11.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
13 currently pending
Career history
88
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
50.3%
+10.3% vs TC avg
§102
33.3%
-6.7% vs TC avg
§112
12.6%
-27.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 75 resolved cases

Office Action

§102 §103
DETAILED ACTION This office action is a response to 12/14/2023. Claims 1-20 are pending. Claims 1-20 are rejected. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in the instant application. Information Disclosure Statement The information disclosure statement (IDS) submitted on 12/14/2023 and 7/1/2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 9-12 and 14-16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kolodziej US 20220094512 A1 (as cited in IDS), hereinafter Kolodziej. Regarding Claim 9, Kolodziej discloses an operating method performed by an interference cancellation circuit, the operating method comprising: receiving a transmission path signal and a reception path signal; generating an activation control signal based on the transmission path signal and the reception path signal (Kolodziej [0056] discloses that the tuning module 112 may use the signal propagating on the transmit signal path and/or the signal on the receive signal path 120 as inputs to generate the coefficients); setting a forgetting factor to a smallest first value from among a set of a first value to an N-th value based on the activation control signal; and comparing a control metric with a plurality of threshold values and setting the forgetting factor up to the N-th value based on the control metric compared with the plurality of threshold values (Kolodziej Fig. 7 and [0119] discloses process 700 for tuning an SI canceller. Steps are taken to progressively tune the cancellation coefficients and the SI controller uses the tuned cancellation coefficients to mitigate the interference. [0122] Step factor in box 718 may be a time-based forgetting factor. The time-based factor may operate to reduce the size of the step over time and/or over the number of tuning iterations that have already occurred during the tuning process). Regarding Claim 10, Kolodziej discloses the method of claim 9 and further discloses wherein the control metric corresponds to any one of time, mean square error (MSE) and mean square residual (MSR) (Kolodziej Fig. 7, [0122]: Step factor in box 718 may be a time-based forgetting factor). Regarding Claim 11, Kolodziej discloses the method of claim 9 and further discloses wherein the setting the forgetting factor up to the N-th value comprises a comparison of the control metric with a first threshold value being smallest among the plurality of threshold values; and based on the control metric being less than the first threshold value, setting the forgetting factor as the first value (Kolodziej Fig. 7 and [0122] Step factor in box 718 may be a time-based forgetting factor. The time-based factor may operate to reduce the size of the step over time and/or over the number of tuning iterations that have already occurred during the tuning process). Regarding Claim 12, Kolodziej discloses the method of claim 11 and further discloses further comprising: based on the control metric being greater than the first threshold value, comparing the control metric with a second threshold value being greater than the first threshold value; and setting the forgetting factor to a second value based on the control metric being greater than the first threshold value and being less than the second threshold value (Kolodziej Fig. 7 and [0122] Step factor in box 718 may be a time-based forgetting factor. The time-based factor may operate to reduce the size of the step over time and/or over the number of tuning iterations that have already occurred during the tuning process). Regarding Claim 14, Kolodziej discloses the method of claim 9 and further discloses further comprising: based on the activation control signal being logic high, receiving interference environmental information; and setting the forgetting factor as a first value based on the interference environmental information (Kolodziej [0056] discloses that the tuning module 112 may use the signal propagating on the transmit signal path and/or the signal on the receive signal path 120 as inputs to generate the coefficients). Regarding Claim 15, Kolodziej discloses the method of claim 14 and further discloses wherein the interference environmental information comprises at least one of an ON/OFF signal on the transmission path and an ON/OFF signal on the reception path (Kolodziej [0056] discloses that the tuning module 112 may use the signal propagating on the transmit signal path and/or the signal on the receive signal path 120 as inputs to generate the coefficients). Regarding Claim 16, Kolodziej discloses the method of claim 9 and further discloses further comprising: generating an interference signal based on an algorithm of the adaptive filter, the algorithm comprising the forgetting factor and the transmission signal corresponding to the transmission path signal; and subtracting the interference signal from the reception signal (Kolodziej Fig. 2 and [0059] discloses the SI canceller 106 disposed to receive transmission signal and generate a cancellation signal 208. Then, the cancellation signal 208 may be added onto the receive signal path by a coupler 206 to cancel the signal interference). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-8, 13, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kolodziej in view of Chen et al. US 20180026775 A1, hereinafter Chen. Regarding Claim 1, Kolodziej discloses an interference cancellation circuit comprising: an activation circuit configured to receive at least one transmission path signal and a reception path signal (Kolodziej see at least Figs. 1-2 and [0022] A cancellation error module may be coupled to receive the transmitted signals and use the transmitted and received signals to generate the cancellation error) and configured to generate an activation control signal based on at least one of the reception path signal and the at least one transmission path signal (Kolodziej [0056] discloses that the tuning module 112 may use the signal propagating on the transmit signal path and/or the signal on the receive signal path 120 as inputs to generate the coefficients); a forgetting factor control circuit configured to compare a control metric with a plurality of threshold values and control a forgetting factor value based on the control metric compared with the plurality of threshold values (Kolodziej Fig. 7 and [0119] discloses process 700 for tuning an SI canceller. Steps are taken to progressively tune the cancellation coefficients and the SI controller uses the tuned cancellation coefficients to mitigate the interference. [0122] Step factor in box 718 may be a time-based forgetting factor. The time-based factor may operate to reduce the size of the step over time and/or over the number of tuning iterations that have already occurred during the tuning process); … an adaptive filter configured to … receive the forgetting factor value from the forgetting factor control circuit to cancel self-interference (Kolodziej Fig. 7 and [0119] discloses process 700 for tuning an SI canceller. Steps are taken to progressively tune the cancellation coefficients and the SI controller uses the tuned cancellation coefficients to mitigate the interference. [0122] Step factor in box 718 may be a time-based forgetting factor. The time-based factor may operate to reduce the size of the step over time and/or over the number of tuning iterations that have already occurred during the tuning process). Kolodziej fails to explicitly disclose a kernel generation circuit configured to receive a transmission signal corresponding to the at least one transmission path signal and configured to generate an interference model; and an adaptive filter configured to receive a kernel signal from the kernel generation circuit. However, in the same field of endeavor, Chen more specifically discloses a kernel generation circuit configured to receive a transmission signal corresponding to the at least one transmission path signal and configured to generate an interference model (Chen see at least Fig. 1 and [0053] disclosing the kernel generation circuit 114 may obtain baseband transmit signal s(t) from the receive path and employ kernelization, decomposing s(t) into samples Xt(1:K), to model the interference); and an adaptive filter configured to receive a kernel signal from the kernel generation circuit (Chen see at least Fig. 1 and [0049] disclosing filter circuits 118 and 120 applied to estimate the self-interference e(t), where the cancelation circuit 122 subtracts the estimated SI signal from the received signal y(t) to obtain a clean signal z(t)). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Kolodziej with the teachings of Chen as accurately modeling one or more adaptive filters to efficiently counter the leakage signals allows a clean signal free of interference. Regarding Claim 2, Kolodziej in view of Chen discloses the circuit of claim 1. In the obvious combination, Kolodziej further discloses wherein the activation control signal is generated based on both the reception path signal and the at least one transmission path signal (Kolodziej [0056] discloses that the tuning module 112 may use the signal propagating on the transmit signal path and/or the signal on the receive signal path 120 as inputs to generate the coefficients). Regarding Claim 3, Kolodziej in view of Chen discloses the circuit of claim 1. In the obvious combination, Kolodziej further discloses wherein the control metric corresponds to any one of time, mean square error (MSE), and mean square residual (MSR) (Kolodziej Fig. 7, [0122]: Step factor in box 718 may be a time-based forgetting factor). Regarding Claim 4, Kolodziej in view of Chen discloses the circuit of claim 1. In the obvious combination, Kolodziej further discloses wherein the forgetting factor control circuit is further configured to compare the control metric with a smallest first threshold value among the plurality of threshold values, and configured to set the forgetting factor to a first value based on the control metric being less than the first threshold value (Kolodziej Fig. 7 and [0122] Step factor in box 718 may be a time-based forgetting factor. The time-based factor may operate to reduce the size of the step over time and/or over the number of tuning iterations that have already occurred during the tuning process). Regarding Claim 5, Kolodziej in view of Chen discloses the circuit of claim 4. In the obvious combination, Kolodziej further discloses wherein the forgetting factor control circuit is further configured to compare the control metric with a second threshold value that is greater than the first threshold value based on the control metric being greater than the first threshold value, and wherein the forgetting factor control circuit is further configured to set the forgetting factor to a second value based on the control metric being greater than the first threshold value and being less than the second threshold value (Kolodziej Fig. 7 and [0122] Step factor in box 718 may be a time-based forgetting factor. The time-based factor may operate to reduce the size of the step over time and/or over the number of tuning iterations that have already occurred during the tuning process). Regarding Claim 6, Kolodziej in view of Chen discloses the circuit of claim 1. In the obvious combination, Chen further discloses wherein the adaptive filter is based on at least one of an algorithm comprising Recursive Least Square (RLS) and a Kalman filter (Chen [0037] Recursive Least Squares designs may offer extremely fast convergence). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Kolodziej with the teachings of Chen as accurately modeling one or more adaptive filters to efficiently counter the leakage signals allows a clean signal free of interference. Regarding Claim 7, Kolodziej in view of Chen discloses the circuit of claim 1. In the obvious combination, Kolodziej further discloses wherein the forgetting factor control circuit is further configured to receive interference environmental information based on the activation control signal being logic high, and wherein the forgetting factor control circuit is further configured to set the forgetting factor to a first value based on the received interference environmental information (Kolodziej [0056] discloses that the tuning module 112 may use the signal propagating on the transmit signal path and/or the signal on the receive signal path 120 as inputs to generate the coefficients). Regarding Claim 8, Kolodziej in view of Chen discloses the circuit of claim 7. In the obvious combination, Kolodziej further discloses wherein the interference environmental information comprises at least one of an ON/OFF signal on the transmission path and an ON/OFF signal on the reception path (Kolodziej [0056] discloses that the tuning module 112 may use the signal propagating on the transmit signal path and/or the signal on the receive signal path 120 as inputs to generate the coefficients). Regarding Claim 13, Kolodziej discloses the method of claim 12 but fails to explicitly disclose further comprising receiving the forgetting factor by an adaptive filter based on at least based on an algorithm comprising Recursive Least Square (RLS) and a Kalman filter. However, in the same field of endeavor, Chen more specifically discloses further comprising receiving the forgetting factor by an adaptive filter based on at least based on an algorithm comprising Recursive Least Square (RLS) and a Kalman filter (Chen [0037] Recursive Least Squares designs may offer extremely fast convergence). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Kolodziej with the teachings of Chen as accurately modeling one or more adaptive filters to efficiently counter the leakage signals allows a clean signal free of interference. Claims 17-20 are rejected on the same grounds set forth in the rejection of claims 1, 3, 4 and 5, and 6, respectively. Claims 17-20 recite similar features as in claims 1, 3, 4 and 5, and 6, respectively, in the perspective of an apparatus. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. LIU et al. US 20190013923 A1 Velazquez et al. US 20240080053 A1 Kim US 20250317334 A1 Kim et al. US 20240179033 A1 Any inquiry concerning this communication or earlier communications from the examiner should be directed to YEWON KIM whose telephone number is (571)272-6524. The examiner can normally be reached Monday - Friday 8:00 AM - 4:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, GARY MUI can be reached at (571)270-1420. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Y.K./ Examiner, Art Unit 2465 /GARY MUI/ Supervisory Patent Examiner, Art Unit 2465
Read full office action

Prosecution Timeline

Dec 14, 2023
Application Filed
Jan 16, 2026
Non-Final Rejection — §102, §103
Feb 23, 2026
Interview Requested
Mar 13, 2026
Interview Requested
Mar 31, 2026
Examiner Interview Summary
Mar 31, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+11.5%)
3y 4m
Median Time to Grant
Low
PTA Risk
Based on 75 resolved cases by this examiner. Grant probability derived from career allow rate.

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