Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Response to Amendment
1. Applicant's amendments, filed January 26, 2026 are respectfully acknowledged and have been fully considered. The following rejections and/or objections are either reiterated or newly applied. They constitute the complete set presently being applied to the instant application.
Applicants have amended their claims, filed January 26, 2026 and therefore rejections newly made in the instant office action have been necessitated by amendment.
Claims 1, 3-4, 6, 8, 10, 14-15, 19, 21-22, 24, 26, 28, 32, 35, and 36 are amended. Claims 2 and 20 are cancelled.
Claims 1, 3-19, and 21-42 are pending.
Claim Objections
The amendment to Claim 6 addressing informalities is respectfully acknowledged, and the objection to Claim 6 is withdrawn, as are the inherited objections to further depending claims not mentioned.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3-5, 14-15, 19, 21-23, 32-33, 35-36, and 40 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chang et al (China Patent Application Publication CN115527498A, hereinafter “Chang”).
Regarding Claim 1 (Currently Amended), Chang teaches a method for driving a display panel (par n0739 Fig 18), comprising:
receiving a first display data having a first data sequence (par n0740 Fig 18 S101 receiving original row display information, where the original row display information includes X display data arranged in sequence; par n0363-n0364 there are X data lines/channels/columns; the receiving module receives X original row display data in counting sequence of 1 to X; par n0371 Fig 8 m=X/2, that is, columns m and m+1 are the two center data columns of the display panel, and the number of data columns in the left side of the display is equal to the number of data columns on the right side of the display; n0342 Fig 7 shows the left half original display data 1 to m; par n0555 Fig 12 shows the right half original display data [m+1] to X), wherein
the first display data comprises a first part (n0342 Fig 7 first display data first part comprises portion of left half original display data from 1 to [c1+d1+c1*N1/I1]), a second part (par n0555 Fig 12 portion of right half original display data from m+3 to X), and a third part (n0342 Fig 8 first display data third part comprises portion of left half original display data from [c1+d1+c1*N1/I1]+1 to m and par n0555 Fig 12 portion of right half original display data from m+1 to m+2), and the third part is disposed between the first part and the second part which are configured to drive data lines located in opposite sides of the display panel (such is taught in Figs 7 and 12);
rearranging the first part and the second part of the first display data to generate a second display data having a second data sequence according to at least one setting signal (par n0741 Fig 18 S102 adjusting the order of the display data in the original row display information [except the third part, e.g. Figs 8C,13C] according to a preset adjustment algorithm to obtain new row display information; par n0738 the adjusting according to a setting signal received by the adjustment module 104 from algorithm setting module Fig 17 105); and
outputting the second display data to drive the display panel (par n0743-n0744 Fig 18 S103-S104 sending each display data to each voltage output channel according to the new row display information; outputting a corresponding data voltage through the voltage output terminal to the data lines DATA according to the received display data, par n0356),
wherein the second data sequence is different from the first data sequence (par n0742 Fig 18 sorting/sequence of the display data in the new row display information is different from the sorting/sequence of the display data in the original row display information).
Regarding Claim 3 (Currently Amended), Chang teaches the method for driving the display panel of claim 1, wherein
the step of rearranging the first part and the second part of the first display data to generate the second display data according to the at least one setting signal further comprises:
maintaining a data sequence of the third part unchanged according to the at least one setting signal (par n0392 e.g. Figs 8C,13C display data third part portion of left half original display data from [c1+d1+c1*N1/I1]+1 to m and par n0555 Fig 12 portion of right half original display data from m+1 to m+2], whose data sequence is unchanged).
Regarding Claim 4 (Currently Amended), Chang teaches the method for driving the display panel of claim 1, wherein
the first part of the first display data is configured to drive data lines located in a first edge region of the display panel (n0342 Fig 7 first display data first part comprises portion of left half original display data from 1 to [c1+d1+c1*N1/I1] is configured to drive data lines located in a first left edge region of the display panel), and
the second part of the first display data is configured to drive data lines located in a second edge region of the display panel (par n0555 Fig 12 portion of right half original display data from m+3 to X is configured to drive data lines located in a second right edge region of the display panel).
Regarding Claim 5 (Original), Chang teaches the method for driving the display panel of claim 4, wherein
the third part of the first display data is configured to drive data lines located in a center region of the display panel (n0342 Fig 8 first display data third part comprises portion of left half original display data from [c1+d1+c1*N1/I1]+1 to m and par n0555 Fig 12 portion of right half original display data from m+1 to m+2, and is configured to drive data lines located in a center region of the display panel), and
the first edge region and the second edge region are located at two opposite sides of the center region (n0342 Fig 7 first display data first part comprising portion of left half original display data from 1 to [c1+d1+c1*N1/I1] is configured to drive data lines located in a first left edge region of the display panel; par n0555 Fig 12 portion of right half original display data from m+3 to X is configured to drive data lines located in a second right edge region of the display panel; left and right edge regions are located at two opposite sides of the center region).
Regarding Claim 14 (Currently Amended), Chang teaches the method for driving the display panel of claim 1, wherein
the step of rearranging the first part and the second part of the first display data to generate the second display data having the second data sequence according to the at least one setting signal comprises:
shifting the third part relative to the first part according to the at least one setting signal (par n0508 Fig 11A the third part comprising [at least n0342 Fig 8 first display data third part comprises portion of left half original display data from [c1+d1+c1*N1/I1]+1 to m] is shifted leftward relative to the first part comprising n0342 Fig 8 portion of left half original display data from 1 to [c1+d1+c1*N1/I1]).
Regarding Claim 15 (Currently Amended), Chang teaches the method for driving the display panel of claim 14, wherein
the step of rearranging the first part and the second part of the first display data to generate the second display data having the second data sequence according to the at least one setting signal further comprises:
shifting the third part relative to the second part according to the at least one setting signal (par n0508 Fig 11A the third part comprising [at least par n0555 Fig 12 portion of right half original display data from m+1 to m+2] is shifted rightward relative to the second part comprising par n0555 Fig 12 portion of right half original display data from m+3 to X).
Regarding Claim 19 (Currently Amended), Chang teaches a driver circuit, configured to drive a display panel, the driver circuit (par n0738 Figs 1,17 source driver 1 comprising the receiving module 101, the adjustment module 104, the sending module 102 and the voltage output channel 103, and algorithm setting module 105) comprising:
a processing circuit (par n0738 Figs 1,17 e.g. combination of the adjustment module 104 and algorithm setting module 105), configured to
receive a first display data having a first data sequence (par n0740 Fig 18 S101 receiving original row display information, where the original row display information includes X display data arranged in sequence), wherein
the first display data comprises a first part, a second part, and a third part, and the third part is disposed between the first part and the second part which are configured to drive data lines located in opposite sides of the display panel,
rearrange the first part and the second part of the first display data to generate a second display data having a second data sequence according to at least one setting signal (par n0741 Fig 18 S102 adjusting the order of the display data in the original row display information according to a preset adjustment algorithm to obtain new row display information; par n0738 the adjusting according to a setting signal received by the adjustment module 104 from algorithm setting module Fig 17 105), and
output the second display data to drive the display panel (par n0743-n0744 Fig 18 S103-S104 sending each display data to each voltage output channel according to the new row display information; outputting a corresponding data voltage through the voltage output terminal to the data lines DATA according to the received display data, par n0356), wherein
the second data sequence is different from the first data sequence (par n0742 Fig 18 sorting/sequence of the display data in the new row display information is different from the sorting/sequence of the display data in the original row display information).
Claim 19 presents the limitations of Claim 1 in a different claim category, and therefore Claim 19 is rejected with a rationale similar to Claim 1, mutatis mutandis.
Claim 21 presents the limitations of Claim 3 in a different claim category, and therefore Claim 21 is rejected with a rationale similar to Claim 3, mutatis mutandis.
Claim 22 presents the limitations of Claim 4 in a different claim category, and therefore Claim 22 is rejected with a rationale similar to Claim 4, mutatis mutandis.
Claim 23 presents the limitations of Claim 5 in a different claim category, and therefore Claim 23 is rejected with a rationale similar to Claim 5, mutatis mutandis.
Claim 32 presents the limitations of Claim 14 in a different claim category, and therefore Claim 32 is rejected with a rationale similar to Claim 14, mutatis mutandis.
Claim 33 presents the limitations of Claim 15 in a different claim category, and therefore Claim 33 is rejected with a rationale similar to Claim 15, mutatis mutandis.
Regarding Claim 35 (Currently Amended), Chang teaches the driver circuit of claim 19, wherein
the at least one setting signal includes a first setting signal, and
the first setting signal is configured to set a number of data of the first part and the second part (paras n0377, n0392 Fig 8 c1 [number of data in the first part] is set as a positive integer and 1≤c1≤m-1, c1*N1/I1 [number of data in the second part] is set as a positive integer and N1/I1 is set as a positive integer).
Regarding Claim 36 (Currently Amended), Chang teaches the driver circuit of claim 19, wherein
the at least one setting signal includes a second setting signal, and
the second setting signal is configured to set the first part and the second part to be arranged in a negative sequence or a positive sequence (par n0401 Fig 8A, par n0419 Fig 8C, data are rearranged in normal or reverse order according to the setting from algorithm setting module 105).
Regarding Claim 40 (Original), Chang teaches the driver circuit of claim 32, wherein
the at least one setting signal includes a sixth setting signal, and
the sixth setting signal is configured to set a number of shifted data of the first part and the second part (par n0508 Fig 11A such is indicated in Fig 11A by the amount of shift of the of the first part comprising the left half to be processed interval and the second part comprising the left half to be inserted interval).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 16 and 34 are rejected under 35 U.S.C. 103 as being unpatentable over Chang et al (Japan Patent Application Publication CN115527498A, hereinafter “Chang”) in view of Yasui et al (United States Patent Publication 6680741 B1, hereinafter “Yasui”).
Regarding Claim 16 (Original), Chang teaches the method for driving the display panel of claim 1. However, Chang appears not to expressly teach further comprising:
storing data indexes of the second data sequence to a buffer circuit.
Yasui teaches the method further comprising
storing data indexes of the second data sequence to a buffer circuit (col 8 lines 50-60 Fig 7 in the Y index buffer, stored are the top addresses of links of polygon lists having fragment lines into each of which a minimum value Ymin of Y coordinates is written. In the Y sort buffer, polygon data are stored in the order along which the data are inputted. As LINK Y parameters in the Y sort buffer, the addresses of the next polygons belonging to the same line are stored).
Chang and Yasui are analogous art as they each pertain to display driving methods. It would have been obvious to a person of ordinary skill in the art to modify the method of Chang with the inclusion of the index buffering of Yasui. The motivation would have been in order to provide an efficient means of data rearrangement (col 10 lines 10-25).
Claim 34 presents the limitations of Claim 16 in a different claim category, and therefore Claim 34 is rejected with a rationale similar to Claim 16, mutatis mutandis.
Claims 17-18 and 41-42 are rejected under 35 U.S.C. 103 as being unpatentable over Chang et al (Japan Patent Application Publication CN115527498A, hereinafter “Chang”) in view of Zhuge et al (China Patent Application Publication CN107833560A, hereinafter “Zhuge”).
Regarding Claim 17 (Original), Chang teaches the method for driving the display panel of claim 1. However, Chang appears not to expressly teach wherein
the display panel comprises a plurality of pixels, and
each of the pixels comprises two subpixels, wherein
one of the two subpixels is a subpixel of a first color, and
the other one of the two subpixels is a subpixel of a second color or a third color (paras 0078-0080 Fig 2 pixels 222,224 each comprise two subpixels, wherein for pixel 222 one of the subpixels is a green subpixel 222b, for pixel 224 one of the subpixels is a green subpixel; for pixel 222 one of the subpixels is a red subpixel 222a, for pixel 224 one of the subpixels is a blue subpixel 224d).
Chang and Zhuge are analogous art as they each pertain to display driving methods. It would have been obvious to a person of ordinary skill in the art to modify the method of Chang with the inclusion of the sub-pixel definition of Zhuge. The motivation would have been in order to provide that the display device can be a display panel using subpixel rendering technology (SPR) (Zhuge par 0078).
Regarding Claim 18 (Original), Chang teaches the method for driving the display panel of claim 1. However, Chang appears not to expressly teach wherein
the display panel comprises a plurality of pixels, and
each of the pixels comprises three subpixels of a first color, a second color and a third color.
Zhuge teaches wherein
the display panel comprises a plurality of pixels, and
each of the pixels comprises three subpixels of a first color, a second color and a third color (par 0070 Fig 1 each first pixel 112 of the first display panel 110 includes three first sub-pixels 112a, 112b, and 112c which present red, green, and blue colors, respectively).
Chang and Zhuge are analogous art as they each pertain to display driving methods. It would have been obvious to a person of ordinary skill in the art to modify the method of Chang with the inclusion of the sub-pixel definition of Zhuge. The motivation would have been in order to provide that the display device 100 can display full-color images (Zhuge par 0070).
Claim 41 presents the limitations of Claim 17 in a different claim category, and therefore Claim 41 is rejected with a rationale similar to Claim 17, mutatis mutandis.
Claim 42 presents the limitations of Claim 18 in a different claim category, and therefore Claim 42 is rejected with a rationale similar to Claim 18, mutatis mutandis.
Response to Arguments
Applicant's arguments filed January 26, 2026 have been fully considered but they are not persuasive. Applicant argues that Chang fails to disclose "wherein the first display data comprises a first part, a second part, and a third part, and the third part is disposed between the first part and the second part which are configured to drive data lines located in opposite sides of the display panel" recited in amended claim 1 and similar claim 19. Examiner disagrees and provides citations at the claim rejection paragraphs wherein Chang teaches this amended limitation. As such, the rejections of independent claims 1 and 19 are maintained.
Allowable Subject Matter
Claims 6-13, 24-31, and 37-39 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 6:
While closest prior art Chang (CN115527498A) teaches a portion of the limitations of Claim 6, the prior art of record fails to teach or fairly suggest the particular limitations of Claim 6, namely "the first part of the first display data is arranged from a first edge region to a center region of the display panel in a negative sequence after rearrangement" in combination with all other limitations of the claim and of claims on which the claim depends.
Claim 8:
While closest prior art Chang (CN115527498A) teaches a portion of the limitations of Claim 8, the prior art of record fails to teach or fairly suggest the particular limitations of Claim 8, namely "the first part of the first display data is arranged from a first edge region to a center region of the display panel in a positive sequence after rearrangement" in combination with all other limitations of the claim and of claims on which the claim depends.
Claim 10:
While closest prior art Chang (CN115527498A) teaches a portion of the limitations of Claim 10, the prior art of record fails to teach or fairly suggest the particular limitations of Claim 10, namely "the first part of the first display data comprises a plurality of first data units, a second part of the first display data comprises a plurality of second data units, and the third part of the first display data comprises a plurality of third data units, and wherein the step of rearranging the data sequence of the first part and the data sequence of the second part according to the at least one setting signal comprises: interlacing the first data units with the third data units; and interlacing the second data units with the third data units" in combination with all other limitations of the claim and of claims on which the claim depends.
Claim 24:
While closest prior art Chang (CN115527498A) teaches a portion of the limitations of Claim 24, the prior art of record fails to teach or fairly suggest the particular limitations of Claim 24, namely "the first part of the first display data is arranged from a first edge region to a center region of the display panel in a negative sequence after rearrangement" in combination with all other limitations of the claim and of claims on which the claim depends.
Claim 26:
While closest prior art Chang (CN115527498A) teaches a portion of the limitations of Claim 26, the prior art of record fails to teach or fairly suggest the particular limitations of Claim 26, namely "the first part of the first display data is arranged from a first edge region to a center region of the display panel in a positive sequence after rearrangement" in combination with all other limitations of the claim and of claims on which the claim depends.
Claim 28:
While closest prior art Chang (CN115527498A) teaches a portion of the limitations of Claim 28, the prior art of record fails to teach or fairly suggest the particular limitations of Claim 28, namely "the first part of the first display data comprises a plurality of first data units, a second part of the first display data comprises a plurality of second data units, and the third part of the first display data comprises a plurality of third data units, and wherein the processing circuit is configured to interlace the first data units with the third data units, and interlace the second data units with the third data units" in combination with all other limitations of the claim and of claims on which the claim depends.
Claims 7, 9, 11-13, 25, 27, 29-31, and 37-39 would be allowable dependent on the allowability of the claims on which they depend.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/MARK EDWARDS/
Primary Examiner, Art Unit 2624