DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04/23/2026 has been entered.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-2 and 4-16 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Response to Amendment
Applicant’s Amendment filed on 04/23/2026 regarding claims 1-16 is fully considered. Of the above claims, claim 3 has been canceled; claims 1-2 and 4-16 have been amended.
Claim Objections
Claim 1 is objected to because of the following informalities:
Regarding claim 1, the recitations of “the reflector” in lines 14-15 lacks antecedent basis. It is recommended that lines 14-15 be amended to recite “the multifaceted reflector” to be consistent with the recitation at line 13.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 4 and 12-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Iwamoto (US 2008/0285095 A1) in view of Maeda (US 2003/0030718 A1).
Regarding claim 1, Iwamoto teaches an electrophotographic color image forming apparatus to develop an electrostatic latent image with a developer to form an image (tandem type color printer 100; Figs 1-2, 12; the development devices 84a, 84b, 84c and 84d contain toner, and adhere their toner of respective colors onto the electrostatic latent image formed on the photosensitive drums 82a, 82b, 82c and 82d so as to develop a toner image; [0034]), the apparatus comprising:
a plurality of photoconductors to bear the electrostatic latent image to be developed with the developer (photosensitive drums 82a, 82b, 82c and 82d; Figs 1-2); and
an optical writing device to expose the plurality of photoconductors (the scanning optical device 50 deflects/scans a plurality of laser light beams emitted from the semiconductor lasers 2, 3, 12 and 13 simultaneously with the single polygon mirror 10, and irradiates the laser light beams onto the plurality of photosensitive drums 82a, 82b, 82c and 82d; [0083]; Figs 1-2),
the optical writing device including:
a plurality of light-emitting elements to irradiate the plurality of photoconductors with light, the plurality of light-emitting elements including a first light-emitting element and a second light-emitting element (semiconductor lasers 2, 3, 12 and 13; FIG. 12);
a light emission control element to control light emission of the plurality of light-emitting elements (a laser driving unit causes the semiconductor laser 2 to emit light based on the pixel clock determined by the computation circuit 65; [0058]; laser driving units 66, 67, 68 and 69; FIG. 10);
a deflector element that is a multifaceted reflector disposed on an emission light path of the light from the plurality of light-emitting elements, the reflector to be rotated by a signal inputted from an external device and deflect the light with which a surface of the reflector is irradiated to scan the plurality of photoconductors with the light in one direction (the polygon mirror 10 is an example of a rotating polygonal mirror having a plurality of reflecting faces that reflect an incident light beam while the polygon mirror is rotated; [0035]; Figs 1-2, 12; the polygon mirror 10 is rotated at a predetermined speed by a motor to deflect/scan light beams emitted from the semiconductor lasers; [0045]; if a signal to start printing is entered, the polygon mirror 10 is rotationally driven by a motor; [0068]; the motor is controlled by a signal);
a plurality of mirrors, the plurality of mirrors including a first mirror and a second mirror (BD mirrors 20, 27, 30 and 37; FIG. 12);
a one synchronization detection plate (BD sensor 5 or BD sensor 15; FIG. 12) to detect:
light emitted from the first light-emitting element and reflected by the deflector element and the first mirror (the BD mirror 37 is a reflection mirror that reflects a light beam that is emitted from the semiconductor laser 12 and reflected by the polygon mirror 10 toward the BD sensor 15; [0090]; FIG. 12),
light emitted from the second light-emitting element and reflected by the second mirror (the BD mirror 20 that reflects, toward the BD sensor 15, a light beam deflected toward the scanning start side in the main scanning direction from among the light beams emitting from the semiconductor laser 2; [0100]; FIG. 12), and
a write start timing of the electrostatic latent image with the light with which the plurality of photoconductors is irradiated (the provision of the BD mirror 20 that reflects, toward the BD sensor 15, a light beam deflected toward the scanning start side in the main scanning direction from among the light beams emitting from the semiconductor laser 2; [0100]; FIG. 12);
a memory that stores an execution condition for correcting a color shift between a plurality of colors and a color shift correction value for correcting the color shift (the computation circuit 65 reads out the scan time A21 from the memory 63, and modulates the pixel clock such that the pixel clock becomes T0/A21, that is, 1/A21 times the reference scan time T0 serving as the reference; [0059]; the measured scan time Ani is stored in the memory 63; [0093]; FIG. 11; the exposure is performed while performing the jitter correction for each color, so that a shift of the exposure position in the main scanning direction is suppressed, and a high definition image having less color shift in the main scanning direction can be formed; [0082]); and
processing circuitry configured to correct the color shift by adjusting the write start timing from when the synchronization detection element detects light to when light emission control by the light emission control element according to image data is started (in accordance with this detection signal, the timing of the start of scanning from an end portion of an image for the semiconductor laser 2 and 3 is adjusted; [0073]-[0074], [0078]-; computation circuits 61, 62; FIG. 10).
Further regarding claim 1, Iwamoto does not teach the memory stores a first light amount of the plurality light-emitting element when a color shift is corrected; and the processing circuitry configured to correct a detection shift generated when a light amount of light incident on the synchronization detection plate fluctuates,
wherein the processing circuitry configured to calculate a detection shift correction value of the detection shift of the synchronization detection plate, using the first light amount and a second light amount determined as a lighting condition of the plurality of light-emitting elements, and add the detection shift correction value to the color shift correction value.
Further regarding claim 1, Maeda teaches a memory stores a first light amount of a plurality light-emitting element when a color shift is corrected (the image recording controlling circuit 2 is provided with a data table that stores a plurality of predetermined light amount values of the light source, determined in response to various conditions for the image forming, and a plurality of time shift amounts for an image recording position in response to the predetermined light amount values; [0057], [0100]); and a processing circuitry configured to correct a detection shift generated when a light amount of light incident on the synchronization detection plate fluctuates (Figs 5-8),
the processing circuitry configured to calculate a detection shift correction value of the detection shift of the synchronization detection plate, using the first light amount and a second light amount determined as a lighting condition of the plurality of light-emitting elements, and add the detection shift correction value to the color shift correction value (when the light amount is increased relative to the reference light amount P0, the timing of the sync detect signal /DETP is moved up and the start position of the image writing is shifted towards the default start position of the image writing; on the contrary, when the light amount is decreased relative to the reference light amount P0, the timing of the sync detect signal /DETP is delayed and the start position of the image writing is shifted towards the end position of the image writing; [0068]; Figs 5-8; this procedure is performed for at least one color or for every color in a similar manner; [0069]; the shifts in the colors are considered as color shifts) for the purpose of correcting for color shifts due to fluctuations in the light amount.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate the memory stores a first light amount of the plurality light-emitting element when a color shift is corrected; and the processing circuitry configured to correct a detection shift generated when a light amount of light incident on the synchronization detection plate fluctuates, wherein the processing circuitry configured to calculate a detection shift correction value of the detection shift of the synchronization detection plate, using the first light amount and a second light amount determined as a lighting condition of the plurality of light-emitting elements, and add the detection shift correction value to the color shift correction value, as taught by Maeda, into Iwamoto for the purpose of correcting for color shifts due to fluctuations in the light amount.
Regarding claim 4,Iwamoto does not teach wherein the memory stores a correction table that associates a light amount of light emitted from the first light-emitting element with a change amount of the write start timing, and the processing circuitry calculates the detection shift correction value, using a change amount of the write start timing associated with the second light amount in the correction table.
Further regarding claim 4, Maeda teaches wherein the memory stores a correction table that associates a light amount of light emitted from the first light-emitting element with a change amount of the write start timing, and the processing circuitry calculates the detection shift correction value, using a change amount of the write start timing associated with the second light amount in the correction table (the image recording controlling circuit 2 is provided with a data table that stores a plurality of predetermined light amount values of the light source, determined in response to various conditions for the image forming, and a plurality of time shift amounts for an image recording position in response to the predetermined light amount values; [0057], [0070]-[0073]; [0100]) for the purpose of correcting for color shifts due to fluctuations in the light amount.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate wherein the memory stores a correction table that associates a light amount of light emitted from the first light-emitting element with a change amount of the write start timing, and the processing circuitry calculates the detection shift correction value, using a change amount of the write start timing associated with the second light amount in the correction table, as taught by Maeda, into Iwamoto for the purpose of correcting for color shifts due to fluctuations in the light amount.
Regarding claim 12, Iwamoto teaches a plurality of fq lenses (a first imaging lens functions as an fq lens that scans and spot images laser light on the drums at a uniform speed in conjunction with second imaging lenses 22 and 23; [0046]; first imaging lens 31 and second imaging lenses 32 and 33; Figs 2, 12),
wherein both of the light that is emitted from the first light-emitting element and reflected by the deflector element and the first mirror and the light that is emitted from the second light-emitting element and reflected by the deflector element and the second mirror do not pass through the plurality of fq lenses (FIG. 12).
Regarding claim 13, Iwamoto teaches a plurality of lenses, the plurality of lenses includes a first lens and a second lens (BD lens 9, BD lens 19; FIG. 12),
wherein the light reflected by the first mirror passes through the first lens corresponding to the first mirror (FIG. 12), and
wherein the light reflected by the second mirror passes through the second lens corresponding to the second mirror (FIG. 12).
Regarding claim 14, Iwamoto teaches a plurality of lenses, the plurality of lenses includes a first lens and a second lens (BD lens 9, BD lens 19; FIG. 12),
wherein the light reflected by the first mirror passes through the first lens corresponding to the first mirror (FIG. 12), and
wherein the light reflected by the second mirror passes through the second lens corresponding to the second mirror (FIG. 12).
Regarding claim 15, Iwamoto teaches wherein the first mirror is disposed on an opposite side to the first light-emitting element with respect to the deflector element (BD mirror 37 is disposed on an opposite side to semiconductor laser 12 with respect to polygon mirror 10; FIG. 12), and
the second mirror is disposed on a same side as the second light-emitting element with respect to the deflector element (BD mirror 20 is disposed on a same side to semiconductor laser 2 with respect to polygon mirror 10; FIG. 12).
Regarding claim 16, Maeda teaches wherein the first mirror is disposed on an opposite side to the first light-emitting element with respect to the deflector element (BD mirror 37 is disposed on an opposite side to semiconductor laser 12 with respect to polygon mirror 10; FIG. 12), and
the second mirror is disposed on a same side as the second light-emitting element with respect to the deflector element (BD mirror 20 is disposed on a same side to semiconductor laser 2 with respect to polygon mirror 10; FIG. 12).
Claim(s) 2 and 5-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Iwamoto (US 2008/0285095 A1) as modified by Maeda (US 2003/0030718 A1) as applied to claim 1 above, and further in view of Furuta (US 2015/0002598 A1).
Regarding claim 2, Iwamoto as modified by Maeda does not teach wherein the light emission control element controls a light amount of the first light-emitting element to be constant while light reflected from one end to the other end of one surface of the deflection element scans the plurality of photoconductors in one direction.
Further regarding claim 2, Furuta teaches a light emission control element controls a light amount of a first light-emitting element to be constant while light reflected from one end to the other end of one surface of a deflection element scans a photoconductor in one direction (the optical scanning apparatuses 104Y, 104M, 104C, and 104Bk can adjust the density characteristic of the image to be formed, by adjusting the light power of the light beams emitted from the light source such that the densities of the toner images of respective colors detected by the density detection sensor 120 become a predetermined value; [0044]; Figs 1-2, 5; for a constant density over a scan line in one direction, the light power would be constant from one end to the other end of a surface of a polygon mirror 204) for the purpose of writing a latent image line having a constant density.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate wherein the light emission control element controls a light amount of the first light-emitting element to be constant while light reflected from one end to the other end of one surface of the deflection element scans the plurality of photoconductors in one direction, as taught by Furuta, into Iwamoto as modified by Maeda for the purpose of writing a latent image line having a constant density.
Regarding claim 5, Iwamoto as modified by Maeda does not teach wherein the processing circuitry calculates the detection shift correction value, using a detection shift correction curve of a polynomial for determining a change amount of the write start timing, and the memory stores a coefficient of the polynomial.
Further regarding claim 5, Furuta teaches a processing circuitry calculates a detection shift correction value, using a detection shift correction curve of a polynomial for determining a change amount of a write start timing, and a memory stores a coefficient of the polynomial (the coefficient K is a coefficient for performing weighting on the amount of change from the reference value for the detection time interval of laser beams by the BD sensor 207, and the coefficient K can be determined according to the characteristics of the optical system; [0096]-[0101]; the coefficient K may be stored in memory 406; FIG. 4) for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate wherein the processing circuitry calculates the detection shift correction value, using a detection shift correction curve of a polynomial for determining a change amount of the write start timing, and the memory stores a coefficient of the polynomial, as taught by Furuta, into Iwamoto as modified by Maeda for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
Regarding claim 6, Iwamoto as modified by Maeda does not teach wherein the one synchronization detection plate has a slit to limit an incident light path of light from the first light-emitting element.
Further regarding claim 6, Furuta teaches a synchronization detection plate has a slit to limit an incident light path of light from a first light-emitting element (light-receiving surface 207a has D3xD4 opening; FIG. 3C) for the purpose of allowing only one light-emitting element of a plurality of light-emitting elements to be detected at any one time.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate wherein the synchronization detection plate has a slit to limit an incident light path of light from the light-emitting element, as taught by Furuta, into Iwamoto as modified by Maeda for the purpose of allowing only one light-emitting element of a plurality of light-emitting elements to be detected at any one time.
Regarding claim 7, Iwamoto as modified by Maeda does not teach wherein the processing circuitry calculates the detection shift correction value, using the polynomial that is different for each of the plurality of light-emitting elements that irradiate the synchronization detection plate with light.
Further regarding claim 7, Furuta teaches the processing circuitry calculates the detection shift correction value, using the polynomial that is different for each of light-emitting elements that irradiate the synchronization detection plate with light (equations 1-4; [0089]-[0098]) for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate wherein the processing circuitry calculates the detection shift correction value, using the polynomial that is different for each of light-emitting elements that irradiate the synchronization detection plate with light, as taught by Furuta, into Iwamoto as modified by Maeda for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
Regarding claim 8, Iwamoto as modified by Maeda does not teach wherein the processing circuitry calculates, as the detection shift correction value, a value obtained by subtracting a first detection shift correction amount determined according to the first light amount from a second detection shift correction amount determined according to the second light amount.
Further regarding claim 8, Furuta teaches a processing circuitry calculates, as a detection shift correction value, a value obtained by subtracting a first detection shift correction amount determined according to a first light amount from a second detection shift correction amount determined according to a second light amount (equations 1-4; [0089]-[0098]; FIG. 9) for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate wherein the processing circuitry calculates, as the detection shift correction value, a value obtained by subtracting a first detection shift correction amount determined according to the first light amount from a second detection shift correction amount determined according to the second light amount, as taught by Furuta, into Iwamoto as modified by Maeda for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
Regarding claim 9, Iwamoto as modified by Maeda does not teach wherein the memory stores a correction table that associates a ratio obtained by dividing a light amount emitted from the first light-emitting element by a reference light amount with a change amount of the write start timing, and the processing circuitry calculates the detection shift correction value, based on a change amount of the write start timing associated with a ratio obtained by dividing the second light amount by the reference light amount in the correction table.
Further regarding claim 9, Furuta teaches a memory stores a correction table that associates a ratio obtained by dividing a light amount emitted from a light-emitting element by a reference light amount with a change amount of the write start timing, and a processing circuitry calculates a detection shift correction value, based on a change amount of the write start timing associated with a ratio obtained by dividing a second light amount by the reference light amount in the correction table (target light power value in % is associated with a ratio of the power values, 100% being the reference light amount; FIG. 9; equations 1-4 calculates change amount; [0089]-[0098]) for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate wherein the memory stores a correction table that associates a ratio obtained by dividing a light amount emitted from the first light-emitting element by a reference light amount with a change amount of the write start timing, and the processing circuitry calculates the detection shift correction value, based on a change amount of the write start timing associated with a ratio obtained by dividing the second light amount by the reference light amount in the correction table, as taught by Furuta, into Iwamoto as modified by Maeda for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
Regarding claim 10, Iwamoto as modified by Maeda does not teach wherein the memory stores the reference light amount, and the processing circuitry reads the reference light amount from the memory in a case of calculating the detection shift correction value, and calculates the detection shift correction value by subtracting a change amount of the write start timing associated with a ratio obtained by dividing the first light amount by the reference light amount from the change amount associated with the ratio obtained by dividing the second light amount by the reference light amount.
Further regarding claim 10, Furuta teaches the memory stores the reference light amount, and the processing circuitry reads the reference light amount from the memory in a case of calculating the detection shift correction value, and calculates the detection shift correction value by subtracting a change amount of the write start timing associated with a ratio obtained by dividing the first light amount by the reference light amount from the change amount associated with the ratio obtained by dividing the second light amount by the reference light amount (target light power value in % is associated with a ratio of the power values, 100% being the reference light amount; FIG. 9; equations 1-4 calculates by subtracting a change amount; [0089]-[0098]) for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate wherein the memory stores the reference light amount, and the processing circuitry reads the reference light amount from the memory in a case of calculating the detection shift correction value, and calculates the detection shift correction value by subtracting a change amount of the write start timing associated with a ratio obtained by dividing the first light amount by the reference light amount from the change amount associated with the ratio obtained by dividing the second light amount by the reference light amount, as taught by Furuta, into Iwamoto as modified by Maeda for the purpose of correcting the timing of a plurality of light emitting elements in a light emitting unit for a color.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Iwamoto (US 2008/0285095 A1) as modified by Maeda (US 2003/0030718 A1) as applied to claim 1 above, and further in view of Maeda (US 2004/0095454 A1).
Regarding claim 11, Iwamoto as modified by Maeda ‘718 does not teach wherein the processing circuitry skips updating the first light amount stored in the memory when color matching fails.
Further regarding claim 11, Maeda ‘454 teaches a processing circuitry skips updating a first light amount stored in the memory when color matching fails (when the pattern is not detectible in step S1603, compensation data is not updated in memory 700; FIG. 35; [0234]) for the purpose of updating compensation data only when the color patterns are aligned.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to incorporate wherein the processing circuitry skips updating the first light amount stored in the memory when color matching fails, as taught by Maeda ‘454, into Iwamoto as modified by Maeda ‘718 for the purpose of updating compensation data only when the color patterns are aligned.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENDRICK X LIU whose telephone number is (571)270-3798. The examiner can normally be reached MWFSa 10am-8pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Douglas X Rodriguez can be reached at (571) 431-0716. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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8 June 2026
/KENDRICK X LIU/Examiner, Art Unit 2853
/DOUGLAS X RODRIGUEZ/Supervisory Patent Examiner, Art Unit 2853
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