DETAILED ACTION
Response to Amendment
This is in response to Applicants Preliminary Amendment filed 03/01/2024 which has been entered. Claims 1-17 have been amended. No Claims have been cancelled. Claims 18-20 have been added. Claims 1-20 are still pending in this application, with Claims 1, 16 and 17 being independent.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-11 and 16-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Rajan et al (2017/0072876 A1).
As per Claim 1, Rajan teaches a device comprising: processing circuitry configured to: receive one or more ingress frames of bits, wherein each of the one or more ingress frames has one of multiple frame formats comprised in a set of frame formats (CAN/LIN/FlexRay: Figure 10; Page 4, Paragraphs [0047] – [0049]); and convert each of the one or more ingress frames into a normalized frame of bits, wherein the normalized frame has a normalized frame format (Ethernet: Figure 2 – Reference 214; Figure 10; Page 1, Paragraph [0017]; Page 3, Paragraph [0030]; Page 4, Paragraph [0047] – [0049]).
(Note: In paragraphs [0047] – [0049], Rajan describes the conversion of ingress frames of bits in multiple frame formats. In paragraph [0047], Rajan presents a use case for CAN/LIN/FlexRay to Ethernet message flow. The conversion process described in paragraphs [0047] – [0049] results in conversion to Ethernet which the Examiner is considering as the recited normalized frame format of the converted/normalized frame)
As per Claims 2 and 18, Rajan teaches wherein the multiple frame formats are based on the following protocols: Controller Area Network (CAN); CAN Flexible Data Rate; CAN XL; Local Interconnect Network (LIN); FlexRay; Media Oriented System Transport (MOST); Ethernet; Mobile Industry Processor Interface (MIPI); or Camera Serial Interface 2 as described in Claim 1.
As per Claims 3 and 19, Rajan teaches wherein the normalized frame comprises a plurality of fields, and wherein each of the fields is parameterized by a field index or by an offset parameter and a field size parameter as described in Claim 1. (Note: As described in Claim 1, the normalized frame utilizes the Ethernet protocol. The limitations of the claim are inherently taught by the use of the Ethernet protocol)
(Note: Ethernet frame fields are known to include: Field Name [i.e. 1: Destination MAC address, 2: Source MAC address, 3: Type/Length, 4: Data/Payload and 5: Frame Check Sequence/Cyclic Redundancy Check]; Offset – Number of bytes [i.e. 1: D MAC – 0-5, 2: S MAC – 6-11, 3: Type/Length – 12 and 13, 4: Data/Payload – 14 – 1513 and 5: FRC/CRC – 14+Payload]; Size – Bytes [i.e. 1: D MAC – 6, 2: S MAC – 6, 3: Type/Length – 2, 4: Data/Payload – 46 – 1500 and 5: FRC/CRC – 4]. This is found to read on the claimed language)
As per Claims 4 and 20, Rajan teaches wherein the normalized frame comprises a header, a payload, and a trailer, and wherein the payload comprises the respective a corresponding ingress frame as described in Claims 1 and 3.
As per Claim 5, Rajan teaches wherein the normalized frame comprises an instruction frame in a control plane and a data frame in a data plane, and wherein the data frame comprises a corresponding ingress frame. (Note: As described above the normalized frame is an Ethernet frame which in the data link layer acts a s a container for data transmission. The type field within the header indicates which protocol is encapsulated in the payload [i.e. IPv4 or IPv6] which allows for a receiver to properly handle the data)
As per Claim 6, Rajan teaches wherein the instruction frame comprises a header, a payload, and a trailer, and wherein the payload comprises an instruction to process the data frame in each of one or more processing stages of the processing circuitry (Note: This is inherently taught as described in Claim 1).
As per Claim 7, Rajan teaches wherein the instruction frame further comprises a length of the instruction one or more parameters of the instruction as metadata of the data frame as described in Claims 1 and 3.
As per Claim 8, Rajan teaches wherein the header and the payload comprises one or more of: a port number or a port identifier (ID) from which the corresponding ingress frame was received; a network type or protocol related to the corresponding ingress frame; a frame timestamp; a frame length; a frame priority; a number of bits of the normalized frame per clock; a counter of matches; or a gateway command or action to be executed on the corresponding ingress frame (Page 4, Paragraph [0044]).
(Note: In paragraph [0044], Rajan describes the priority treatment of messages [i.e. prioritizing high priority messages over low priority messages] which is a clear indication of frame priority. Additionally, as described above in Claim 3, the use of the Ethernet protocol inherently teaches a network type or protocol related to the corresponding ingress frame)
As per Claim 9, Rajan teaches wherein the trailer comprises a cyclic redundancy check (CRC) of the instruction, a checksum (CS) of the instruction, or a parity bit (PB) of the instruction as an integrity check mechanism of the instruction frame as described in Claim 3.
As per Claim 10, Rajan teaches wherein the processing circuitry comprises one or more ingress ports, wherein each of the one or more ingress ports is configured to receive the one or more ingress frames, and wherein a frame format of each of the one or more ingress frames is according to a protocol of the multiple frame formats as described in Claim 1 (See Page 4, Paragraph [0047] – [0049]).
As per Claim 11, Rajan teaches wherein the processing circuitry further comprises a set of registers configurable with a set of parameters for relating each of the one or more ingress ports to one or more networking features or protocols to be applied to one or more second ingress frames received at a corresponding ingress port to normalize the one or more second ingress frames as described in Claim 1 (See Page 4, Paragraph [0047] – [0049]).
As per Claim 16, Rajan teaches a method as described in Claim 1.
As per Claim 17, Rajan teaches a method as described in Claim 1. Rajan also teaches a computer program product comprising computer-executable instructions that are stored on a non-transitory computer-readable medium and that, when executed by one or more processors (Page 5, Paragraphs [0054] and [0055]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 12-15 are rejected under 35 U.S.C. 103 as being unpatentable over Rajan et al (2017/0072876 A1) in view of Kim et al (2023/0179443 A1).
As per Claim 12, Rajan teaches the device of Claim 10; but does not teach a first in, first out (FIFO) memory for each of the one or more ingress ports. However, Kim teaches a first in, first out (FIFO) memory for each of the one or more ingress ports (Page 2, Paragraphs [0038] and [0039]). (Note: In paragraph [0038], Kim describes the receipt of automotive CAN messages. In paragraph [0039], Kim describes a storage that includes reception FIFO memory)
The combination of Rajan and Kim also teaches receiving bits of one or more second ingress frames received at a corresponding ingress port; and forwarding the bits of the one or more second ingress frames as described in Claim 1. It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device taught by Rajan with the device taught by Kim to enable the aggregation of data from multiple CAN buses into a single high speed link which is essential for data intensive applications like automated driving assistance, camera feeds and infotainment systems which produce data volumes that far exceed CAN capacity.
As per Claims 13-15, the combination of Rajan and Kim teaches constructing an instruction frame for a corresponding ingress frame based on the corresponding ingress frame and a set of parameters for an ingress port from which the corresponding ingress frame is received; write or store data frame received at a corresponding ingress port in a first in, first out (FIFO) memory in a data plane; and concurrently generate an instruction frame in a control plane; and read the data frame from the FIFO memory; concurrently read the instruction frame from the control plane; and synchronously forward the data frame and the instruction frame to a next one or more processing stages of the processing circuitry as described in Claims 1 and 10 above.
(Note: In order to simultaneously manage the plurality of data intensive applications performed in real-time during vehicle operation [i.e. automated driving assistance, light detection and ranging – LIDAR, camera feeds and infotainment systems] the construction of instruction frames, writing and storage of data frames, concurrent generation of control instructions and the synchronized forwarding of information in the data plane must occur)
It would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the device taught by Rajan with the device taught by Kim to enable the aggregation of data from multiple CAN buses into a single high-speed link which is essential for data intensive applications like automated driving assistance, camera feeds and infotainment systems which produce data volumes that far exceed CAN capacity.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Park (2020/0366529 A1), JEON et al (2021/0185070 A1), TERAZAWA et al (2020/0220888 A1), JANG (2012/0327939 A1) or ARNDT et al (2021/0243047 A1) and Matuso et al (2006/0271694 A1). Each of these describes systems and methods of utilizing gateways to translate messages within a packet-based environment.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHARYE POPE whose telephone number is (571)270-5587. The examiner can normally be reached Monday - Friday 8AM - 4PM.
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KHARYE POPE
Primary Examiner
Art Unit 2693
/KHARYE POPE/Primary Examiner, Art Unit 2693