DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
This Office Action is in response to Applicant’s application 18/542,798 filed on December 18 2023 in which claims 1 to15 are pending.
Drawings
The drawings submitted on December 18 2023 have been reviewed and accepted by the Examiner.
Information Disclosure Statement
The Information Disclosure Statement (IDS), filed on December 18 2023 and February 28 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein has been considered by the Examiner.
Priority
Receipt is acknowledged of paper submitted under 35 U.S.C. 119(a)-(d) or under 35 U.S.C. 120, 121, 365(c), or 386(c) which has been placed of record in the file.
Notation
References to patents will be in the form of (C: L) where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of (¶ XXXX).
Claim Objections
Claim 1 is objected to because of the following informalities:
Line 15, after includes, insert “:’.
Claim 13 is objected to because of the following informalities:
Line 15, after includes, insert “:’.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 13 and 15 are rejected under AIA 35 U.S.C. 102(a)(1) as being anticipated by over Tanaka (US 2017/0104091 A1).
Regarding claim 13, Tanaka teaches a nitride semiconductor device (Fig.1; ¶ 0048), comprising:
an electron transit layer (4; Fig.1; ¶0053) composed of a nitride semiconductor (GaN; ¶ 0053);
an electron supply layer (5; ¶ 0055) formed on the electron transit layer (¶ 0055) and composed of a nitride semiconductor having a band gap that is larger than that of the electron transit layer (layer 5 has a n Al composition higher than that of the first nitride semiconductor layer; ¶ 0055);
a gate layer (7; ¶ 0058) formed on a portion of the electron supply layer (5) and composed of a nitride semiconductor including an acceptor impurity (¶ 0058);
a gate electrode (8; ¶ 0049) formed on the gate layer (7);
a passivation layer (9; Fig.1) covering the electron supply layer (5), the gate layer (7), and the gate electrode (8) and including a first opening (first opening formed on the side of 12a; Fig.1) and a second opening (second opening formed on the side of 11a; Fig.1);
a drain electrode (12; ¶ 0050) in contact (electrical or thermal contact) with the electron supply layer (5) through the first opening (12a); and
a source electrode (11; ¶ 0050) in contact with the electron supply layer (5) through the second opening (11a), wherein
the gate layer (7) is arranged between the first opening (12a) and the second opening (11a), the passivation layer includes
a first part formed on at least a portion of the electron supply layer (portion of passivation layer 9 formed on the sidewall between gate layer 7 and second opening 12a; annotated Figure 1 below) located between the first opening (12a) and the gate layer (7) in plan view, and
a second part (portion of 9 formed between gate layer 7 and second opening 11a; annotated Fig.1) formed on the electron supply layer (5) located between the second opening (11a) and the gate layer (7) in plan view, and
the second part is smaller in thickness than the first part (T2 is smaller than T1 as shown below).
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Regarding claim 15, Tanaka teaches wherein the electron transit layer is GaN (¶ 0053), the electron supply layer is AlxGa1-xN, where 0.2 < x <0.3 (¶ 0054), and the gate layer is GaN doped with at least one of Mg and Zn (¶ 0058).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Tanaka (US 2017/0104091 A1).
Regarding claim 14, Tanaka does not explicitly teach wherein a maximum rating of gate-source voltage is greater than or equal to 8 V during application of a positive bias, and a maximum rating of gate-source voltage is greater than or equal to 4 V during application of a negative bias.
However, Tanaka teaches the an ON voltage of 3V is applied to the gate and using the source electrode 11 as reference potential (0V) (¶ 0064).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention, to have a maximum rating of gate-source voltage is greater than or equal to 8 V during application of a positive bias, and a maximum rating of gate-source voltage is greater than or equal to 4 V during application of a negative bias in the device of Tanaka since claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. See MPEP § 2114, II.
Allowable Subject Matter
Claims 1-12 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 1 is allowed because the prior art reference does not teach the following limitations: “…passivation layer includes a first insulation layer formed on at least a portion of the electron supply layer located between the first opening and the gate layer in plan view, and a second insulation layer formed on the electron supply layer located between the second opening and the gate layer in plan view and covering the gate layer and the gate electrode, and the second insulation layer is formed of a material having a smaller Young's modulus than a material forming the first insulation layer.” With the rest and each of the limitations of claim 1.
The closest prior art reference Tanaka (US 2017/0104091 A1) teaches a passivation layer formed from one layer (9; Fig.1) and does not teach a first insulation and second insulation layer as claimed above in claim 1.
Second closest prior art reference Tanaka et al. (US 2017/0104092 A1) teaches a passivation layer with first insulating layer (15, Fig.1; ¶ 0056) and a second insulating layer (16; Fig.1; ¶ 0056) formed above a gate (7; Fig.1) but does not teach the exact limitation of allowable subject matter of claim 1 above.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure, included in the PTO-892 Notice of Cited References.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mounir S Amer whose telephone number is (571)270-3683. The examiner can normally be reached Monday-Friday 9:00-5:30.
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/Mounir S Amer/ Primary Examiner, Art Unit 2818